CN203492153U - Kilomega Ethernet video optical transceiver - Google Patents

Kilomega Ethernet video optical transceiver Download PDF

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Publication number
CN203492153U
CN203492153U CN201320656883.2U CN201320656883U CN203492153U CN 203492153 U CN203492153 U CN 203492153U CN 201320656883 U CN201320656883 U CN 201320656883U CN 203492153 U CN203492153 U CN 203492153U
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CN
China
Prior art keywords
chip
fpga chip
ethernet
transceiver
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201320656883.2U
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Chinese (zh)
Inventor
张天旸
万文庆
刘盼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HANGZHOU LAIBANG COMMUNICATION TECHNOLOGY Co Ltd
Original Assignee
HANGZHOU LAIBANG COMMUNICATION TECHNOLOGY Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HANGZHOU LAIBANG COMMUNICATION TECHNOLOGY Co Ltd filed Critical HANGZHOU LAIBANG COMMUNICATION TECHNOLOGY Co Ltd
Priority to CN201320656883.2U priority Critical patent/CN203492153U/en
Application granted granted Critical
Publication of CN203492153U publication Critical patent/CN203492153U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model discloses a kilomega Ethernet video optical transceiver. The transceiver comprises an FPGA chip, an AD chip that is used for sampling a signal processed by a video amplifier and connected with the FPGA chip, a parallel-serial conversion chip that is used for converting serial data to parallel data and connected between an optical module and the FPGA chip, a serial-parallel conversion chip that is used for converting parallel data to serial data and connected between the optical module and the FPGA chip, a DA chip in connection with the FPGA chip, and an Ethernet module that is connected with the FPGA chip and provided with a plurality of Ethernet interfaces. The transceiver can furthest meet the requirements of security protection, and enable one-fiber transmission of eight-channel positive high-definition video, one-channel 1000 M Ethernet, eight-channel audio/switching value/RS485/RS232/telephone and the like. Since the transceiver utilizes clock reusing technology, the transceiver is low in cost and then lower in price, in the premise of meeting the requirements of industrial standards.

Description

Gigabit Ethernet video optical multiplexer
Technical field
The utility model relates to a kind of gigabit Ethernet video optical multiplexer.
Background technology
Current gigabit Ethernet optical transmitter and receiver is mainly that 1 ∽16 road E1 interface is provided on point-to-point optical transmission device, and 1 road 10M/100M/1000M fastethernet interface and 1 railway digital official telephone interface can not meet the requirement of present security protection development far away in function.Technical solution of the present invention can farthest meet security protection demand, and our gigabit Ethernet optical transmitter and receiver can transmit 8 road forward HD videos, 1 road 1000M Ethernet, 8 road audio frequency/switching value/RS485/RS232/ phones etc. by single fiber.Owing to having adopted clock multiplex technique, then meet under the requirement of industry standard, cost has also reduced much, so price is lower.
Utility model content
The purpose of this utility model is exactly in order to address the above problem, and a kind of gigabit Ethernet video optical multiplexer is provided.
To achieve these goals, the utility model adopts following technical scheme:
A gigabit Ethernet video optical multiplexer, is characterized in that, has:
Fpga chip;
The AD chip that signal after the video amplifier is processed is sampled, it is connected in fpga chip;
For by serial data be converted to parallel data also-string conversion chip, it is connected between optical module and fpga chip;
For parallel data being converted to the string of serial data-and conversion chip, it is connected between optical module and fpga chip;
Be connected in the DA chip of fpga chip;
Be connected in the ethernet module of fpga chip, it has a plurality of Ethernet interfaces.
The beneficial effects of the utility model are:
(1) this optical transmitter and receiver can farthest meet security protection demand, and this gigabit Ethernet optical transmitter and receiver can transmit 8 road forward HD videos, 1 road 1000M Ethernet, 8 road audio frequency/switching value/RS485/RS232/ phones etc. by single fiber.
(2), owing to having adopted clock multiplex technique, under the requirement that meets industry standard, cost has also reduced much, so price is lower.
Accompanying drawing explanation
Fig. 1 is gigabit Ethernet video optical multiplexer structural representation.
Fig. 2 is ethernet module circuit theory diagrams.
Fig. 3 is optical module circuit theory diagrams.
Fig. 4 is fpga chip circuit diagram.
Embodiment
For technological means, creation characteristic that the utility model is realized, reach object and effect is easy to understand, below in conjunction with concrete diagram, further set forth the utility model.
As shown in Fig. 1~4, a kind of gigabit Ethernet video optical multiplexer, it has: fpga chip 1; The AD chip 2 that signal after the video amplifier is processed is sampled, it is connected in fpga chip; For by serial data be converted to parallel data also-string conversion chip 3, it is connected between optical module 4 and fpga chip; For parallel data being converted to the string of serial data-and conversion chip 5, it is connected between optical module 4 and fpga chip; Be connected in the DA chip 6 of fpga chip; Be connected in the ethernet module 7 of fpga chip, it has a plurality of Ethernet interfaces 8.
This optical transmitter and receiver adopts AD/DA chip with better function to carry out corresponding video sampling, has guaranteed the clear of video image quality.
For transmitter, video is first given AD chip 2 and is carried out the employing of 7 after the video amplifier, then after processing by fpga chip, pass to serial/parallel conversion chip, the serial data after conversion is delivered to light emission module (transmitting terminal of optical module 4) and is carried out in optical fiber, propagating after electric light conversion.
For receiver, the data that transmit are given after serial/parallel conversion chip is changed and are given fpga chip after the opto-electronic conversion of Optical Receivers (receiving terminal of optical module 4), fpga chip is given DA chip after logical process, and treated signal is exported to display device again after the video amplifier.
By Ethernet chip (being ethernet module 7) and fpga chip, carry out the processing of data, then by optical module, transmit, owing to having adopted Dai Weian connection, therefore, the transmission of data is more stable, more reliable.Because fpga chip has expansion port, accessible other business, such as audio frequency, phone etc., audio frequency, switching value, phone are mainly after processing by corresponding chip, to give fpga chip to carry out just can transmitting after logical process, RS485/RS232 gives fpga chip after corresponding chip is processed, and after processing, can transmit.
This optical transmitter and receiver meets optical transmitter and receiver industry standard completely through test.
The foregoing is only preferred implementation of the present utility model, protection range of the present utility model is not limited in above-mentioned execution mode, and every technical scheme that belongs to the utility model principle all belongs to protection range of the present utility model.For a person skilled in the art, some improvement of carrying out under the prerequisite that does not depart from principle of the present utility model, these improvement also should be considered as protection range of the present utility model.

Claims (1)

1. a gigabit Ethernet video optical multiplexer, is characterized in that, has:
Fpga chip;
The AD chip that signal after the video amplifier is processed is sampled, it is connected in fpga chip;
For by serial data be converted to parallel data also-string conversion chip, it is connected between optical module and fpga chip;
For parallel data being converted to the string of serial data-and conversion chip, it is connected between optical module and fpga chip;
Be connected in the DA chip of fpga chip;
Be connected in the ethernet module of fpga chip, it has a plurality of Ethernet interfaces.
CN201320656883.2U 2013-10-22 2013-10-22 Kilomega Ethernet video optical transceiver Expired - Fee Related CN203492153U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201320656883.2U CN203492153U (en) 2013-10-22 2013-10-22 Kilomega Ethernet video optical transceiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201320656883.2U CN203492153U (en) 2013-10-22 2013-10-22 Kilomega Ethernet video optical transceiver

Publications (1)

Publication Number Publication Date
CN203492153U true CN203492153U (en) 2014-03-19

Family

ID=50262948

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201320656883.2U Expired - Fee Related CN203492153U (en) 2013-10-22 2013-10-22 Kilomega Ethernet video optical transceiver

Country Status (1)

Country Link
CN (1) CN203492153U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106656350A (en) * 2016-12-06 2017-05-10 天津光电通信技术有限公司 Multi-service encryption optical transmitter and receiver

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106656350A (en) * 2016-12-06 2017-05-10 天津光电通信技术有限公司 Multi-service encryption optical transmitter and receiver

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GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20140319

Termination date: 20151022

EXPY Termination of patent right or utility model