CN203490706U

CN203490706U - Novel RFID card reader circuit

Info

Publication number: CN203490706U
Application number: CN201320586432.6U
Authority: CN
Inventors: 巫梦飞; 陈伟; 周卫民
Original assignee: CHENGDU NEWISLAND INFORMATION TECHNOLOGY Co Ltd
Current assignee: CHENGDU YINUO INFORMATION TECHNOLOGY CO., LTD.
Priority date: 2013-09-22
Filing date: 2013-09-22
Publication date: 2014-03-19
Anticipated expiration: 2023-09-22

Abstract

The utility model discloses a novel RFID card reader circuit, comprising first to fifth resistors, first to twelfth capacitors, first and second single-chip microcomputers, and an antenna. The second terminal of the first capacitor is connected with the first terminal of the second capacitor, the first terminal of the third capacitor, and the first terminal of the second resistor. The second terminal of the second capacitor is connected with the first terminal of the fourth capacitor, the first terminal of the fifth capacitor, and the first terminal of sixth capacitor. According to the novel RFID card reader circuit of the utility model, the second single-chip microcomputer is responsible for receiving an instruction from an upper computer, driving the first single-chip microcomputer, and decoding and calibrating data sent back by the first single-chip microcomputer; the second single-chip microcomputer sends a signal to the upper computer, and a control pin of the second single-chip microcomputer controls the work mode of the first single-chip microcomputer; and after the adjustment of the first single-chip microcomputer, data is outputted to the second single-chip microcomputer. By employing the card reader circuit, RFID labels in high-speed movements can be identified and multiple RFID labels can be identified at the same time. Moreover, the card reader circuit is convenient and rapid to operate.

Description

A kind of novel RFID card reader circuit

Technical field

The utility model relates to a kind of card reader circuit, relates in particular to a kind of novel RFID card reader circuit.

Background technology

RFID card reader is a kind of automatic identification equipment that can read electronic tag data, RFID radio-frequency (RF) identification is a kind of contactless automatic identification technology, it is automatically identified destination object and is obtained related data by radiofrequency signal, and identification work need not manual intervention, can work in various rugged surroundings.When RFID label fast moving, part RFID card reader can not be identified this label, or when a plurality of RFID labels pass through RFID card reader, can generating unit divide label skip.

Utility model content

The purpose of this utility model provides a kind of novel RFID card reader circuit with regard to being in order to address the above problem.

The utility model is achieved through the following technical solutions above-mentioned purpose:

A kind of novel RFID card reader circuit, comprise the first resistance to the five resistance, the first electric capacity to the 12 electric capacity, the first single-chip microcomputer, second singlechip and antenna, the first end ground connection of described the first electric capacity, the second end of described the first electric capacity respectively with the first end of described the second electric capacity, the first end of described the 3rd electric capacity is connected with the first end of described the second resistance, the second end of described the second electric capacity respectively with the first end of described the 4th electric capacity, the first end of described the 5th electric capacity is connected with the first end of described the 6th electric capacity, the second end of described the 3rd electric capacity is connected with the first end of described antenna, the second end of described the second resistance is connected with the detection input end of described the first single-chip microcomputer, the second end of described the 4th electric capacity is connected with the second end of described the 6th electric capacity and the secondary signal input end of described the first single-chip microcomputer respectively, the second end of described antenna is connected with the first end of described the first resistance with the second end of described the 5th electric capacity respectively, the second end of described the first resistance is connected with the first signal input end of described the first single-chip microcomputer, the first end ground connection of described the 7th electric capacity, the second end of described the 7th electric capacity is connected with the digital voltage end of described the first single-chip microcomputer, the power supply common end grounding of described the first single-chip microcomputer, the input end of clock of described the first single-chip microcomputer is connected with the first end of described the 3rd resistance, the second end of described the 3rd resistance is connected with the clock output pin of described second singlechip, the end of convert of described the first single-chip microcomputer is connected with the first end of described the 8th electric capacity, the reparation end of described the first single-chip microcomputer is connected with the first end of described the 9th electric capacity, ground connection after the second end of described the 9th electric capacity is connected with the second end of described the 8th electric capacity, the control signal input end of described the first single-chip microcomputer is connected with the control signal output terminal of described second singlechip, the detection output terminal of described the first single-chip microcomputer is connected with the first end of described the 4th resistance, the second end of described the 4th resistance is connected with the signal input part of described second singlechip, the trigger end of described the first single-chip microcomputer is connected with the first end of described the 5th resistance, the second end of described the 5th resistance is connected with the signal input part of second singlechip, the earth terminal of described the first single-chip microcomputer is connected with the first end of described the 12 electric capacity with the first end of described the 11 electric capacity respectively, ground connection after the second end of described the 11 electric capacity is connected with the second end of described the 12 electric capacity, the computing input end of described the first single-chip microcomputer is connected with the first end of described the tenth electric capacity, the computing output terminal of described the first single-chip microcomputer is connected with the second end of described the tenth electric capacity.

The beneficial effects of the utility model are:

A kind of novel RFID card reader circuit of the utility model, second singlechip is responsible for receiving the instruction of host computer, drive the first single-chip microcomputer and the decoding data that the first single-chip microcomputer is beamed back and verification, to host computer, start signal, the control pin of second singlechip is controlled the mode of operation of the first single-chip microcomputer, after the first single-chip microcomputer regulates, data are exported to second singlechip, adopt this card reader can identify the RFID label of high-speed motion and can identify a plurality of RFID labels simultaneously, convenient to operation.

Accompanying drawing explanation

Fig. 1 is the circuit diagram of a kind of novel RFID card reader circuit of the utility model.

Embodiment

Below in conjunction with accompanying drawing, the utility model is described in further detail:

As shown in Figure 1, a kind of novel RFID card reader circuit of the utility model, comprise that the first resistance R 1 is to the 5th resistance R 5, the first capacitor C 1 to the 12 capacitor C 12, the first single-chip microcomputer IC1, second singlechip IC2 and antenna ANT, the first end ground connection of the first capacitor C 1, the second end of the first capacitor C 1 respectively with the first end of the second capacitor C 2, the first end of the 3rd capacitor C 3 is connected with the first end of the second resistance R 2, the second end of the second capacitor C 2 respectively with the first end of the 4th capacitor C 4, the first end of the 5th capacitor C 5 is connected with the first end of the 6th capacitor C 6, the second end of the 3rd capacitor C 3 is connected with the first end of antenna ANT, the second end of the second resistance R 2 is connected with the detection input end of the first single-chip microcomputer IC1, the second end of the 4th capacitor C 4 is connected with the secondary signal input end of the first single-chip microcomputer IC1 with the second end of the 6th capacitor C 6 respectively, the second end of antenna ANT is connected with the first end of the first resistance R 1 with the second end of the 5th capacitor C 5 respectively, the second end of the first resistance R 1 is connected with the first signal input end of the first single-chip microcomputer IC1, the first end ground connection of the 7th capacitor C 7, the second end of the 7th capacitor C 7 is connected with the digital voltage end of the first single-chip microcomputer IC1, the power supply common end grounding of the first single-chip microcomputer IC1, the input end of clock of the first single-chip microcomputer IC1 is connected with the first end of the 3rd resistance R 3, the second end of the 3rd resistance R 3 is connected with the clock output pin of second singlechip IC2, the end of convert of the first single-chip microcomputer IC1 is connected with the first end of the 8th capacitor C 8, the reparation end of the first single-chip microcomputer IC1 is connected with the first end of the 9th capacitor C 9, ground connection after the second end of the 9th capacitor C 9 is connected with the second end of the 8th capacitor C 8, the control signal input end of the first single-chip microcomputer IC1 is connected with the control signal output terminal of second singlechip IC2, the detection output terminal of the first single-chip microcomputer IC1 is connected with the first end of the 4th resistance R 4, the second end of the 4th resistance R 4 is connected with the signal input part of second singlechip IC2, the trigger end of the first single-chip microcomputer IC1 is connected with the first end of the 5th resistance R 5, the second end of the 5th resistance R 5 is connected with the signal input part of second singlechip IC2, the earth terminal of the first single-chip microcomputer IC1 is connected with the first end of the 12 capacitor C 12 with the first end of the 11 capacitor C 11 respectively, ground connection after the second end of the 11 capacitor C 11 is connected with the second end of the 12 capacitor C 12, the computing input end of the first single-chip microcomputer IC1 is connected with the first end of the tenth capacitor C 10, the computing output terminal of the first single-chip microcomputer IC1 is connected with the second end of the tenth capacitor C 10.

The principle of work of a kind of novel RFID card reader circuit of the utility model is as follows:

The RFID card reader circuit that this is novel, the model of the first single-chip microcomputer IC1 is EM4095, the model of second singlechip IC2 is ATmega88, second singlechip IC2 is responsible for receiving the instruction of host computer, the decoding data and the verification that drive the first single-chip microcomputer IC1 and the first single-chip microcomputer IC1 is beamed back, to host computer, start signal, the control pin of second singlechip IC2 is controlled the mode of operation of the first single-chip microcomputer IC1, after the first single-chip microcomputer IC1 regulates, data are exported to second singlechip IC2, adopt this card reader can identify the RFID label of high-speed motion and can identify a plurality of RFID labels simultaneously, convenient to operation.

Claims

1. a novel RFID card reader circuit, it is characterized in that: comprise the first resistance to the five resistance, the first electric capacity to the 12 electric capacity, the first single-chip microcomputer, second singlechip and antenna, the first end ground connection of described the first electric capacity, the second end of described the first electric capacity respectively with the first end of described the second electric capacity, the first end of described the 3rd electric capacity is connected with the first end of described the second resistance, the second end of described the second electric capacity respectively with the first end of described the 4th electric capacity, the first end of described the 5th electric capacity is connected with the first end of described the 6th electric capacity, the second end of described the 3rd electric capacity is connected with the first end of described antenna, the second end of described the second resistance is connected with the detection input end of described the first single-chip microcomputer, the second end of described the 4th electric capacity is connected with the second end of described the 6th electric capacity and the secondary signal input end of described the first single-chip microcomputer respectively, the second end of described antenna is connected with the first end of described the first resistance with the second end of described the 5th electric capacity respectively, the second end of described the first resistance is connected with the first signal input end of described the first single-chip microcomputer, the first end ground connection of described the 7th electric capacity, the second end of described the 7th electric capacity is connected with the digital voltage end of described the first single-chip microcomputer, the power supply common end grounding of described the first single-chip microcomputer, the input end of clock of described the first single-chip microcomputer is connected with the first end of described the 3rd resistance, the second end of described the 3rd resistance is connected with the clock output pin of described second singlechip, the end of convert of described the first single-chip microcomputer is connected with the first end of described the 8th electric capacity, the reparation end of described the first single-chip microcomputer is connected with the first end of described the 9th electric capacity, ground connection after the second end of described the 9th electric capacity is connected with the second end of described the 8th electric capacity, the control signal input end of described the first single-chip microcomputer is connected with the control signal output terminal of described second singlechip, the detection output terminal of described the first single-chip microcomputer is connected with the first end of described the 4th resistance, the second end of described the 4th resistance is connected with the signal input part of described second singlechip, the trigger end of described the first single-chip microcomputer is connected with the first end of described the 5th resistance, the second end of described the 5th resistance is connected with the signal input part of second singlechip, the earth terminal of described the first single-chip microcomputer is connected with the first end of described the 12 electric capacity with the first end of described the 11 electric capacity respectively, ground connection after the second end of described the 11 electric capacity is connected with the second end of described the 12 electric capacity, the computing input end of described the first single-chip microcomputer is connected with the first end of described the tenth electric capacity, the computing output terminal of described the first single-chip microcomputer is connected with the second end of described the tenth electric capacity.