CN203324738U - Low-quiescent current level switching circuit and electronic equipment provided therewith - Google Patents
Low-quiescent current level switching circuit and electronic equipment provided therewith Download PDFInfo
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- CN203324738U CN203324738U CN2013204171471U CN201320417147U CN203324738U CN 203324738 U CN203324738 U CN 203324738U CN 2013204171471 U CN2013204171471 U CN 2013204171471U CN 201320417147 U CN201320417147 U CN 201320417147U CN 203324738 U CN203324738 U CN 203324738U
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Abstract
The utility model discloses a low-quiescent current level switching circuit and electronic equipment provided therewith, and relates to the technical field of electronic circuits. The level switching circuit comprises an MCU (Micro Control Unit) and a DCDC circuit, wherein the output terminal of the DCDC circuit is electrically connected with the power input pin of the MCU. The level switching circuit further comprises an LDO circuit and a logic control circuit, wherein the LDO circuit is connected in parallel with the DCDC circuit; the output terminal of the LDO circuit is electrically connected with the power input pin of the MCU; the input terminal of the logic control circuit is electrically connected with the control output pin MCU_EN of the MCU; the two output terminals of the logic control circuit are electrically connected with the LDO circuit and the DCDC circuit respectively; and logic control circuit controls the LDO circuit and the DCDC circuit to be on and off according to signals of the control output pin MCU_EN of the MCU. The level switching circuit in the utility model is capable of substantially reducing power consumption of the equipment; equipment endurance ability of is improved; and equipment electrification time is prolonged.
Description
Technical field
The utility model relates to the electronic circuit technology field, particularly a kind of low quiescent current level shifting circuit and be provided with the electronic equipment of this circuit.
Background technology
The smart mobile phone function is more and more now, and screen is also increasing.Although when the smart mobile phone of giant-screen is used, displaying contents is very abundant, effect is also very true to nature, but the mobile phone that volume is too large is hand held inner very inconvenient, particularly just see some simple information, such as: Time of Day, incoming information and note etc., also need to from bag, take out mobile phone and be operated, lose time also very inconvenient with energy.
So a kind of intelligent watch occurred, can with mobile phone, communicate by wireless mode, and the mode such as luminous, the sound by intelligent watch or vibration indicates or points out some simple cellphone informations, such as date, time, incoming call, quarter-bell or carry out the information such as note.Make the user need not take out mobile phone and just can complete some shirtsleeve operations, be user-friendly to.
At present, the level shifting circuit used in intelligent watch comprises the DCDC chip, and the characteristics of DCDC chip are that quiescent current is large, and hundreds of μ A is arranged.Yet the work characteristics of intelligent watch be most of time only for displaying time, most equipment is all in deep sleep, power consumption is very low.Particularly for example,, when the bistable state technology (Electronic Paper) of display screen employing, only has the electric current that maintains of several μ A during standby.If the quiescent current of hundreds of μ A is now arranged, with respect to the working current of several μ A, conversion efficiency is very low, and power consumption is larger.Due to the finite volume of intelligent watch, its battery can not be done too greatly, and this has just caused the flying power of intelligent watch relatively short.
The utility model content
First technical matters to be solved in the utility model is to provide a kind of low quiescent current level shifting circuit, this low quiescent current level shifting circuit can provide less working current when device standby, when working, equipment can provide larger working current, effectively save electric weight, improved the flying power of equipment.
Second technical matters to be solved in the utility model is to provide a kind of electronic equipment, and this electronic equipment flying power is strong, and electrification time is long.
For solving above-mentioned first technical matters, the technical solution of the utility model is:
A kind of low quiescent current level shifting circuit, comprise MCU(Micro Control Unit) and the DCDC circuit, the output terminal of described DCDC circuit is electrically connected to the power supply input pin of MCU, also comprise: the LDO circuit, described LDO circuit is in parallel with described DCDC circuit, and the output terminal of described LDO circuit is electrically connected to the power supply input pin of described MCU; Logic control circuit, the input end of described logic control circuit is electrically connected to the control output pin MCU_EN of described MCU, two output terminals of described logic control circuit are electrically connected to respectively described LDO circuit and described DCDC circuit, and described logic control circuit is according to the described LDO circuit of signal controlling of the control output pin MCU_EN of described MCU and leading to and breaking of described DCDC circuit.
Wherein, described LDO circuit comprises LDO chip U1, and the enable pin EN of described LDO chip U1 is electrically connected to an output terminal of described logic control circuit, and the output pin VOUT of described LDO chip U1 is electrically connected to the power supply input pin of described MCU.
Wherein, described logic control circuit comprises diode D1 and the diode D2 be electrically connected to the control output pin MCU_EN of described MCU simultaneously; The cathodic electricity of described diode D1 connects the control output pin MCU_EN of described MCU, and the anode of described diode D2 is electrically connected to the control output pin MCU_EN of described MCU; Described diode D1 two ends are parallel with resistance R 2, and described diode D2 two ends are parallel with resistance R 3; The anode of described diode D1 and described resistance R 2 are electrically connected with capacitor C 2 jointly, and described capacitor C 2 is in series with capacitor C 3, and described capacitor C 3 is electrically connected to negative electrode and the described resistance R 3 of described diode D2 simultaneously; The end that described capacitor C 2 is connected in series mutually with described capacitor C 3 is ground connection simultaneously; The anode of described diode D1, described resistance R 2 and described capacitor C 2 are electrically connected with negative circuit simultaneously, and described negative circuit is electrically connected to the enable pin EN of described LDO chip U1; The negative electrode of described diode D2, described resistance R 3 and described capacitor C 3 are electrically connected to described DCDC circuit simultaneously.
Wherein, described negative circuit comprises triode Q1; The base stage of described triode Q1 is electrically connected to anode, described resistance R 2 and the described capacitor C 2 of described diode D1 simultaneously, the collector of described triode Q1 is electrically connected to enable pin EN and the power end VBAT of described LDO chip U1, the grounded emitter of described triode Q1 simultaneously.
Wherein, described DCDC circuit comprises DCDC chip U2, and the enable pin RUN of described DCDC chip U2 is electrically connected to the negative electrode of described diode D2, described resistance R 3 and described capacitor C 3 simultaneously; The output pin SW of described DCDC chip U2 is electrically connected to the power supply input pin of described MCU.
Wherein, the model of described DCDC chip U2 is SGM6012.
Wherein, the model of described LDO chip U1 is SGM2300.
For solving above-mentioned second technical matters, the technical solution of the utility model is:
A kind of electronic equipment, comprise shell, is provided with described low quiescent current level shifting circuit in described shell.
Wherein, described electronic equipment is intelligent watch, earphone or mobile phone.
After having adopted technique scheme, the beneficial effects of the utility model are:
Because the utility model low quiescent current level shifting circuit comprises the DCDC circuit, also comprise LDO circuit and logic control circuit, DCDC circuit and the parallel connection of LDO circuit, logic control circuit is according to the signal controlling LDO circuit of the control output pin MCU_EN of MCU and leading to and breaking of DCDC circuit.Hour, logic control circuit is connected the LDO circuit according to the signal controlling of MCU to the working current needed when equipment, turn-offs the DCDC circuit, by the LDO circuit, it is the equipment power supply, the quiescent current of LDO circuit is little, only has 1.7 μ A left and right when low-power consumption, and under working condition, conversion efficiency can reach 95%.When the working current needed when equipment is larger, logic control circuit is connected the DCDC circuit according to the signal controlling of MCU, turn-offs the LDO circuit, by the DCDC circuit, is the equipment power supply.Visible, adopted the utility model low quiescent current level shifting circuit, can reduce greatly the power consumption of equipment, improve the flying power of equipment, the electrification time of extension device.
The accompanying drawing explanation
Fig. 1 is the structured flowchart of the utility model low quiescent current level shifting circuit;
Fig. 2 is the schematic diagram of the utility model low quiescent current level shifting circuit.
Embodiment
Below in conjunction with drawings and Examples, further set forth the utility model.
Embodiment mono-:
As shown in Figure 1, a kind of low quiescent current level shifting circuit, comprise MCU and DCDC circuit, the output terminal of DCDC circuit is electrically connected to the power supply input pin of MCU, also comprise the LDO circuit, the LDO circuit is in parallel with the DCDC circuit, and the output terminal of LDO circuit is electrically connected to the power supply input pin of MCU; Logic control circuit, the control output pin MCU_EN(of the input end electrical connection M CU of logic control circuit as shown in Figure 2), two output terminals of logic control circuit are electrically connected to respectively LDO circuit and DCDC circuit, and logic control circuit is according to the signal controlling LDO circuit of the control output pin MCU_EN of MCU and leading to and breaking of DCDC circuit.LDO circuit and DCDC circuit are electrically connected to same power supply, power supply is lithium polymer battery, lithium polymer battery has high, the ultra-thin characteristics of energy, all to be suitable for doing the power supply of miniaturized electronics from profile or capacity, certainly other battery also can be as the battery of miniaturized electronics, and lithium polymer battery is the preferred version of the present embodiment.
As shown in Figure 2, logic control circuit comprises diode D1 and the diode D2 be electrically connected to the control output pin MCU_EN of MCU simultaneously; The negative electrode of diode D1 is electrically connected to the control output pin MCU_EN of MCU and the anode of diode D2 simultaneously, and the anode of diode D2 is electrically connected to the control output pin MCU_EN of MCU and the negative electrode of diode D1 simultaneously; Diode D1 two ends are parallel with resistance R 2, and the resistance of resistance R 2 is 100K Ω, and diode D2 two ends are parallel with resistance R 3, and the resistance of resistance R 3 is 100K Ω; The anode of diode D1 and resistance R 2 are electrically connected with capacitor C 2 jointly, and the capacitance of capacitor C 2 is 470nF, and capacitor C 2 is in series with capacitor C 3, and the capacitance of capacitor C 3 is 470nF, and capacitor C 3 is electrically connected to negative electrode and the resistance R 3 of diode D2 simultaneously; The end that capacitor C 2 is connected in series mutually with capacitor C 3 is ground connection simultaneously.The anode of diode D1, resistance R 2 and capacitor C 2 are electrically connected with negative circuit simultaneously, and negative circuit is electrically connected to the LDO circuit.The negative electrode of diode D2, resistance R 3 and capacitor C 3 are electrically connected to the DCDC circuit simultaneously.Diode D1 and diode D2 are schottky diode.
As shown in Figure 2, negative circuit comprises the resistance R 6 be electrically connected to anode, resistance R 2 and the capacitor C 2 of diode D1 simultaneously, the resistance of resistance R 6 is 10K Ω, resistance R 6 is electrically connected with the base stage of triode Q1, the collector of triode Q1 is electrically connected to LDO circuit and resistance R 1 simultaneously, the resistance of resistance R 1 is 100K Ω, resistance R 1 electric connection of power supply end VBAT, and power end VBAT is electrically connected to lithium polymer battery; The grounded emitter of triode Q1.
As shown in Figure 2, the LDO circuit comprises LDO chip U1, and the enable pin EN of LDO chip U1 is electrically connected to collector and the resistance R 1 of triode Q1 simultaneously; The power supply input pin VIN of LDO chip U1 is electric connection of power supply end VBAT and filter capacitor C1 simultaneously, and the capacitance of capacitor C 1 is 1 μ F, capacitor C 1 ground connection; The output terminal VOUT of LDO chip is electrically connected with filter capacitor C5, and the capacitance of capacitor C 5 is 1 μ F, capacitor C 5 ground connection, and the output terminal of LDO chip is electrically connected with the output terminal VDD of level shifting circuit after being electrically connected to capacitor C 5.The ground pin GND ground connection of LDO chip U1.The model of LDO chip U1 is SGM2300.
As shown in Figure 2, the DCDC circuit comprises DCDC chip U2, and the enable pin RUN of DCDC chip U2 is electrically connected with resistance R 7, and the resistance of resistance R 7 is 10K Ω, and resistance R 7 is electrically connected to negative electrode, resistance R 3 and the capacitor C 3 of diode D2 simultaneously.The power supply input pin VIN of DCDC chip U2 is electric connection of power supply end VBAT and filter capacitor C4 simultaneously, and the capacitance of capacitor C 4 is 4.7 μ F, capacitor C 4 ground connection.The output pin SW of DCDC chip U2 is electrically connected with inductance L 1, the inductance value of inductance L 1 is 2.2 μ H, inductance L 1 is connected with the output terminal VDD of resistance R 4 and level shifting circuit simultaneously, the resistance of resistance R 4 is 300K Ω, resistance R 4 is electrically connected to Voltage Feedback pin FB and the resistance R 5 of DCDC chip U2 simultaneously, the resistance of resistance R 5 is 150K Ω, resistance R 5 ground connection, and resistance R 4 and resistance R 5 are divider resistance.Resistance R 4 two ends are parallel with capacitor C 6, and the capacitance of capacitor C 6 is 18pF.The model of DCDC chip U2 is SGM6012.
As shown in Figure 2, the output terminal VDD of level shifting circuit is electrically connected to MCU(as shown in Figure 1) the power supply input pin.The output terminal of level shifting circuit also is electrically connected with filter capacitor C7, and the capacitance of capacitor C 7 is 10 μ F, capacitor C 7 ground connection.
As shown in Figure 2, the principle of work of the utility model low quiescent current level shifting circuit is as follows:
1, be converted to the LDO circuit working from the DCDC circuit working, after MCU enters dormant state, hour, MCU can drag down and control output pin MCU_EN the working current that equipment needs.Control the level of output pin MCU_EN by high step-down, capacitor C 2 is discharged rapidly by the control output pin MCU_EN of diode D1 and MCU, now the base stage of triode Q1 is low level, triode Q1 cut-off, the level of the enable pin EN of LDO chip U1 is uprised by low, LDO chip U1 work is the equipment power supply by the LDO circuit.Simultaneously, capacitor C 3 is by the control output pin MCU_EN electric discharge of resistance R 3 and MCU, and the level of the enable pin RUN of DCDC chip U2 is by the slow step-down of height, and DCDC chip U2 turn-offs after maintaining power supply a period of time.
In this course of work, LDO chip U1 opens rapidly, and DCDC chip U2 time delay a period of time turn-offs, and by the LDO circuit, is responsible for the equipment power supply.Guaranteed the smooth transition of power supply, while having avoided switching due to circuit, the delay start-up time of LDO circuit causes the fluctuation of equipment supply voltage.
2, be converted to the DCDC circuit working from the LDO circuit working, when MCU is waken up and carry out processing data information, be that the working current that needs of equipment is when larger, MCU can draw high the level of controlling output pin MCU_EN, the level of controlling output pin MCU_EN pin is uprised by low, and high level charges to capacitor C 3 by diode D2 rapidly, and the level of the enable pin RUN of DCDC chip U2 uprises rapidly, DCDC chip U2 starts working, and by the DCDC circuit, is the equipment power supply.Simultaneously, control the high level of output pin MCU_EN by 2 chargings of 2 pairs of capacitor C of resistance R, the level of triode Q1 base stage slowly raises, triode Q1 conducting after time delay a period of time, after triode Q1 conducting, the level of the enable pin EN of LDO chip becomes low level, LDO chip U1 turn-offs, and stops power supply.
In this course of work, DCDC chip U2 opens rapidly, and LDO chip U1 postpones to turn-off, and by the DCDC circuit, is responsible for the equipment power supply.Guaranteed the smooth transition of power supply, while having avoided switching due to circuit, the delay start-up time of DCDC circuit causes the fluctuation of equipment supply voltage.
From above-mentioned principle of work, when the utility model low quiescent current level shifting circuit can be realized the equipment working current less at needs, for equipment provides less working current, improved the conversion ratio of electric weight, avoided the waste of electric weight; When equipment needs larger working current, for equipment provides larger working current, guarantee the normal operation of equipment.And can take over seamlessly between two kinds of mode of operations of the utility model low quiescent current level shifting circuit, can not cause the fluctuation of voltage because of pattern switching, avoid the situation of the unstable and unexpected reset of the system that caused by voltage fluctuation.
Embodiment bis-:
A kind of electronic equipment, comprise shell, is provided with the described low quiescent current level shifting circuit of embodiment mono-in shell.
For the various electronic touch screens of picture mobile phone, earphone (comprising bluetooth earphone and headphone) and the intelligent watch etc. that can carry out wireless telecommunications with mobile phone often the electronic equipment under battery saving mode work all can adopt the described low quiescent current level shifting circuit of embodiment mono-.
After the utility model electronic equipment has adopted the low quiescent current level shifting circuit, improved the conversion ratio of battery electric quantity, avoided the waste of electric weight, improved the flying power of electronic equipment, extended the electrification time of electronic equipment, reduce the charging times of battery, extended the serviceable life of battery.
The utility model is not limited to above-mentioned concrete embodiment, and those of ordinary skill in the art is from above-mentioned design, and without performing creative labour, all conversion of having done, within all dropping on protection domain of the present utility model.
Claims (9)
1. the low quiescent current level shifting circuit, comprise MCU and DCDC circuit, and the output terminal of described DCDC circuit is electrically connected to the power supply input pin of MCU, it is characterized in that, also comprises:
The LDO circuit, described LDO circuit is in parallel with described DCDC circuit, and the output terminal of described LDO circuit is electrically connected to the power supply input pin of described MCU;
Logic control circuit, the input end of described logic control circuit is electrically connected to the control output pin MCU_EN of described MCU, two output terminals of described logic control circuit are electrically connected to respectively described LDO circuit and described DCDC circuit, and described logic control circuit is according to the described LDO circuit of signal controlling of the control output pin MCU_EN of described MCU and leading to and breaking of described DCDC circuit.
2. low quiescent current level shifting circuit according to claim 1, it is characterized in that, described LDO circuit comprises LDO chip U1, the enable pin EN of described LDO chip U1 is electrically connected to an output terminal of described logic control circuit, and the output pin VOUT of described LDO chip U1 is electrically connected to the power supply input pin of described MCU.
3. low quiescent current level shifting circuit according to claim 2, is characterized in that, described logic control circuit comprises diode D1 and the diode D2 be electrically connected to the control output pin MCU_EN of described MCU simultaneously; The cathodic electricity of described diode D1 connects the control output pin MCU_EN of described MCU, and the anode of described diode D2 is electrically connected to the control output pin MCU_EN of described MCU; Described diode D1 two ends are parallel with resistance R 2, and described diode D2 two ends are parallel with resistance R 3; The anode of described diode D1 and described resistance R 2 are electrically connected with capacitor C 2 jointly, and described capacitor C 2 is in series with capacitor C 3, and described capacitor C 3 is electrically connected to negative electrode and the described resistance R 3 of described diode D2 simultaneously; The end that described capacitor C 2 is connected in series mutually with described capacitor C 3 is ground connection simultaneously; The anode of described diode D1, described resistance R 2 and described capacitor C 2 are electrically connected with negative circuit simultaneously, and described negative circuit is electrically connected to the enable pin EN of described LDO chip U1; The negative electrode of described diode D2, described resistance R 3 and described capacitor C 3 are electrically connected to described DCDC circuit simultaneously.
4. low quiescent current level shifting circuit according to claim 3, is characterized in that, described negative circuit comprises triode Q1; The base stage of described triode Q1 is electrically connected to anode, described resistance R 2 and the described capacitor C 2 of described diode D1 simultaneously, the collector of described triode Q1 is electrically connected to enable pin EN and the power end VBAT of described LDO chip U1, the grounded emitter of described triode Q1 simultaneously.
5. according to the described low quiescent current level shifting circuit of claim 3 to 4 any one, it is characterized in that, described DCDC circuit comprises DCDC chip U2, and the enable pin RUN of described DCDC chip U2 is electrically connected to the negative electrode of described diode D2, described resistance R 3 and described capacitor C 3 simultaneously; The output pin SW of described DCDC chip U2 is electrically connected to the power supply input pin of described MCU.
6. low quiescent current level shifting circuit according to claim 5, is characterized in that, the model of described DCDC chip U2 is SGM6012.
7. low quiescent current level shifting circuit according to claim 2, is characterized in that, the model of described LDO chip U1 is SGM2300.
8. an electronic equipment that is provided with the low quiescent current level shifting circuit, comprise shell, it is characterized in that, is provided with described low quiescent current level shifting circuit in described shell.
9. electronic equipment according to claim 8, is characterized in that, described electronic equipment is intelligent watch, earphone or mobile phone.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013204171471U CN203324738U (en) | 2013-07-12 | 2013-07-12 | Low-quiescent current level switching circuit and electronic equipment provided therewith |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013204171471U CN203324738U (en) | 2013-07-12 | 2013-07-12 | Low-quiescent current level switching circuit and electronic equipment provided therewith |
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| CN203324738U true CN203324738U (en) | 2013-12-04 |
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| CN2013204171471U Withdrawn - After Issue CN203324738U (en) | 2013-07-12 | 2013-07-12 | Low-quiescent current level switching circuit and electronic equipment provided therewith |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103368557A (en) * | 2013-07-12 | 2013-10-23 | 青岛歌尔声学科技有限公司 | Low quiescent current level switching circuit and electronic instrument comprising same |
| TWI570534B (en) * | 2015-11-18 | 2017-02-11 | 世界先進積體電路股份有限公司 | Low dropout regulators |
| US9733655B2 (en) | 2016-01-07 | 2017-08-15 | Vanguard International Semiconductor Corporation | Low dropout regulators with fast response speed for mode switching |
| CN108556632A (en) * | 2018-06-10 | 2018-09-21 | 重庆三三电器股份有限公司 | A kind of intelligence TFT instrument screen intensity wake-up circuits and its control method |
| CN110162131A (en) * | 2019-05-05 | 2019-08-23 | 万向钱潮股份有限公司 | A kind of automobile 24V electric-control system redundancy reduction voltage circuit meeting functional safety and method |
| CN111756091A (en) * | 2020-06-30 | 2020-10-09 | 深圳市欧瑞博科技股份有限公司 | Power supply switching circuit and intelligent door lock |
-
2013
- 2013-07-12 CN CN2013204171471U patent/CN203324738U/en not_active Withdrawn - After Issue
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103368557A (en) * | 2013-07-12 | 2013-10-23 | 青岛歌尔声学科技有限公司 | Low quiescent current level switching circuit and electronic instrument comprising same |
| CN103368557B (en) * | 2013-07-12 | 2016-09-21 | 青岛歌尔声学科技有限公司 | Low quiescent current level shifting circuit and be provided with the electronic equipment of this circuit |
| TWI570534B (en) * | 2015-11-18 | 2017-02-11 | 世界先進積體電路股份有限公司 | Low dropout regulators |
| US9733655B2 (en) | 2016-01-07 | 2017-08-15 | Vanguard International Semiconductor Corporation | Low dropout regulators with fast response speed for mode switching |
| CN108556632A (en) * | 2018-06-10 | 2018-09-21 | 重庆三三电器股份有限公司 | A kind of intelligence TFT instrument screen intensity wake-up circuits and its control method |
| CN108556632B (en) * | 2018-06-10 | 2023-08-25 | 重庆三三电器股份有限公司 | Intelligent TFT instrument screen brightness wake-up circuit and control method thereof |
| CN110162131A (en) * | 2019-05-05 | 2019-08-23 | 万向钱潮股份有限公司 | A kind of automobile 24V electric-control system redundancy reduction voltage circuit meeting functional safety and method |
| CN110162131B (en) * | 2019-05-05 | 2024-08-02 | 万向钱潮股份公司 | Redundant voltage reduction circuit and method for 24V electric control system of automobile meeting functional safety |
| CN111756091A (en) * | 2020-06-30 | 2020-10-09 | 深圳市欧瑞博科技股份有限公司 | Power supply switching circuit and intelligent door lock |
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| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20131204 Effective date of abandoning: 20160921 |
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| C25 | Abandonment of patent right or utility model to avoid double patenting |