CN203301879U - Electronic device having dividing structure - Google Patents
Electronic device having dividing structure Download PDFInfo
- Publication number
- CN203301879U CN203301879U CN2013201363997U CN201320136399U CN203301879U CN 203301879 U CN203301879 U CN 203301879U CN 2013201363997 U CN2013201363997 U CN 2013201363997U CN 201320136399 U CN201320136399 U CN 201320136399U CN 203301879 U CN203301879 U CN 203301879U
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- China
- Prior art keywords
- electronic device
- partition wall
- partition walls
- pins
- adjacent
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- 238000005192 partition Methods 0.000 claims description 111
- 230000002093 peripheral effect Effects 0.000 claims description 8
- 238000000926 separation method Methods 0.000 claims description 5
- 238000009413 insulation Methods 0.000 description 18
- 230000007547 defect Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 230000001902 propagating effect Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
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Abstract
An electronic device having a dividing structure comprises a housing, wherein the housing is formed by combining an upper housing and a lower housing; a cavity for accommodating an electric device is formed between the upper housing and the lower housing. First dividing walls are arranged between pins of the electronic device accommodated in the cavity, so that correspondingly, every two adjacent pins are divided by a corresponding first dividing wall. The first dividing walls stretch out from an inner side surface of one of the upper housing and the lower housing, and extend in the direction perpendicular to the inner side surface of one of the upper housing and the lower housing.
Description
Technical Field
The utility model relates to an electronic equipment with separate structure.
Background
In electronic equipment, the electronic device is typically electrically connected to a circuit board or other unit using a plurality of pins. However, the pins themselves discharge arc under high voltage, which breaks down the insulation and affects the circuit and other electronic components. Especially in the case of high air humidity, this interference affects the electrical performance of the electronic device. In recognition of this problem, specific requirements are placed in the electrical field on the insulation distance between two adjacent pins (the insulation distance is the shortest distance that an arc emitted under high voltage on one pin reaches an adjacent pin) to ensure that the electrical performance of the electronic device is not affected for the reasons mentioned above. In the prior art, the insulation distance between two pins is increased by various means, for example, the extending length of the pin is increased to increase the distance between two adjacent pins, the volume of the electronic device is increased, or a barrier is attached on the pin.
However, in the prior art, when the extending length of the leads is increased to increase the distance between two adjacent leads, or the volume of the electronic device is increased to overcome the above-mentioned defects, the volume of the electronic device itself is increased, and thus the electronic device is not suitable for a tiny electronic device. In the case of mounting the obstacle on the pin, not only an expensive mounting object needs to be additionally added as an additional part, but also a mounting process needs to be added to perform the work, so that the manufacturing difficulty and the production cost of the product are greatly increased.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide an electronic equipment with partition structure, include: the shell is formed by combining an upper shell and a lower shell, and a cavity for accommodating the electric device is formed between the upper shell and the lower shell; first partition walls are arranged among pins of the electronic device accommodated in the cavity, so that two corresponding adjacent pins are separated by one corresponding first partition wall; wherein the first partition wall protrudes from an inner side surface of one of the upper case and the lower case, and extends in a direction perpendicular to the inner side surface of the one of the upper case and the lower case.
Preferably, according to the present invention, any straight line segment connecting between two corresponding adjacent pins passes through the first partition wall.
Still further, according to the present invention, there is provided the electronic apparatus, wherein at least one of the corresponding two adjacent pins is located within a range surrounded by a peripheral contour of the first partition wall when viewed in a direction perpendicular to the first partition wall and parallel to the inner side surface.
Further, when viewed in a direction perpendicular to the first partition wall and parallel to the inner side surface, a portion where one pin and the other pin of the respective two adjacent pins overlap each other is located within a range surrounded by an outer peripheral contour of the first partition wall.
With such a configuration, since the first partition wall directly extends from the inner side surface of the housing accommodating the electrical device, it is possible to completely block the propagation of the arc discharged under high voltage between the two adjacent pins in the direction perpendicular to the first partition wall, and it is possible to completely avoid the arc discharged under high voltage from penetrating through the gap between the pin and the inner side surface of the housing, so that the arc discharged under high voltage must propagate by bypassing the first partition wall, effectively increasing the insulation distance between the adjacent pins, avoiding the interference due to the excessively short insulation distance. Further, by making at least one of the respective two adjacent pins be located within a range surrounded by the outer peripheral contour of the first partition wall or making a portion where one of the respective two adjacent pins and the other pin overlap with each other be located within a range surrounded by the outer peripheral contour of the first partition wall when viewed in a projection direction perpendicular to the first partition wall and parallel to the inner side surface, it can be sufficiently ensured that an arc discharged under a high voltage condition between the two pins adjacent in a direction perpendicular to the first partition wall cannot travel straight between the two pins, thereby increasing a detour distance of the arc discharged under a high voltage condition.
Preferably, according to the utility model provides an electronic equipment further includes: and second partition walls disposed on the surface of the electronic device on which the leads are disposed, each of the second partition walls being disposed between corresponding two adjacent leads.
Preferably, according to the present invention, each second partition wall and the corresponding first partition wall are disposed between two corresponding adjacent pins.
With such a configuration, not only can the propagation of the arc emitted under high-voltage conditions between two adjacent pins be blocked by the first partition wall, but also the propagation of the arc emitted under high-voltage conditions between two adjacent pins can be blocked by the second partition wall provided on the surface of the electronic device on which the pins are provided, and the propagation of the arc emitted under high-voltage conditions between two adjacent pins on the surface on which the pins are provided is further blocked, so that the arc emitted under high-voltage conditions must propagate by bypassing the second partition wall, thereby increasing the insulation distance between the adjacent pins in each direction and avoiding the interference caused by too short insulation distance.
Preferably, according to the present invention, any straight line segment connecting between two corresponding adjacent pins passes through the second partition wall.
Preferably, according to the utility model provides an electronic equipment, the cavity in the casing has the base plate, is provided with the slotted hole on the base plate, and when electronic equipment installed together, every first partition wall inserted a corresponding slotted hole to keep apart the top of corresponding two adjacent pins each other through first partition wall.
Preferably, according to the present invention, there is provided an electronic apparatus, wherein the first partition wall is in a bent shape when viewed in a direction perpendicular to an inner side surface of one of the upper case and the lower case.
Drawings
Fig. 1 is a partial perspective view of an upper housing of an electronic device having a partition structure according to a preferred embodiment of the present invention;
fig. 2 is a perspective view of an electronic device of an electronic apparatus having a partition structure according to a preferred embodiment of the present invention;
fig. 3 is a partial perspective view of an assembled state of an electronic apparatus having a partition structure according to a preferred embodiment of the present invention;
fig. 4 is a partial perspective view of an assembled state of an electronic apparatus having a partition structure according to a preferred embodiment of the present invention.
Detailed Description
Preferred embodiments of the present invention will be described below with reference to the accompanying drawings.
Fig. 1 is a partial perspective view of a housing of an electronic device having a partition structure according to a preferred embodiment of the present invention. Fig. 2 is a perspective view of an electronic device of an electronic apparatus having a partition structure according to a preferred embodiment of the present invention. Fig. 3 is a partial perspective view of an assembled state of an electronic apparatus having a partition structure according to a preferred embodiment of the present invention. Fig. 4 is a partial perspective view of an assembled state of an electronic apparatus having a partition structure according to a preferred embodiment of the present invention.
Specifically, as shown in fig. 1 to 4, the present invention provides an electronic device with a partition structure, including: a case which is formed by combining an upper case 11 and a lower case (not shown), and a cavity which accommodates the electronic component 2 is formed between the upper case 11 and the lower case. First partition walls 3 are provided between the leads 21 of the electronic device 2 accommodated in the cavity such that respective two adjacent leads 21 are separated by a corresponding one of the first partition walls 3. The first partition wall 3 protrudes from the inner side surface of one of the upper case 11 and the lower case, and extends in a direction perpendicular to the inner side surface of one of the upper case 11 and the lower case.
Further, as shown in fig. 1 to 3, according to the electronic apparatus provided by the present invention, each first partition wall 3 is configured such that any straight line segment connecting between two corresponding adjacent leads 21 passes through the first partition wall 3. In this context, the description "join any straight line segment between the respective two adjacent leads 21" means: a straight line segment between any point on one lead 21 of two adjacent leads 21 to any point on the other lead 21 may not actually exist, but is only a straight line segment virtually existing for connecting any point on one lead 21 to any point on the other lead 21.
With such a configuration, since the first partition wall 3 extends directly from the inner side surface of the housing accommodating the electrical component, it is possible to completely block the propagation of the arc discharged under high voltage between the two adjacent pins 21 in the direction perpendicular to the first partition wall 3, and it is possible to completely avoid the arc discharged under high voltage from penetrating through the gap between the pins 21 and the inner side surface of the housing, so that the arc discharged under high voltage must propagate by bypassing the first partition wall 3, effectively increasing the insulation distance between the adjacent pins 21, and avoiding interference due to an excessively short insulation distance.
Further, as shown in fig. 1 to 3, according to the electronic apparatus provided by the present invention, when viewed in a direction perpendicular to the first partition wall 3 and parallel to the inner side surface of one of the upper case 11 and the lower case, at least one pin 21 of the respective two adjacent pins 21 is located within a range surrounded by the outer peripheral contour of the first partition wall 3. With such a configuration, it is possible to block the propagation of the arc discharged under high voltage between the two pins 21 at least in the direction perpendicular to the first partition wall 3 and parallel to the inner side surface of one of the upper case 11 and the lower case, sufficiently ensuring that the arc discharged under high voltage between the two pins adjacent in the direction perpendicular to the first partition wall cannot propagate straight between the two pins, thereby increasing the detour distance of the arc discharged under high voltage.
Further, as shown in fig. 1 to 3, according to the electronic apparatus provided by the present invention, when viewed in a projection direction perpendicular to the first partition wall 3 and parallel to the inner side surface of one of the upper case 11 and the lower case, a portion where one pin 21 and the other pin 21 of the respective two adjacent pins 21 overlap each other is located within a range surrounded by the outer peripheral contour of the first partition wall 3. With such a configuration, it is possible to block the propagation of the arc discharged under high voltage between the two pins 21 at least in the direction perpendicular to the first partition wall 3 and parallel to the inner side surface of one of the upper case 11 and the lower case, sufficiently ensuring that the arc discharged under high voltage between the two pins adjacent in the direction perpendicular to the first partition wall cannot propagate straight between the two pins, thereby increasing the detour distance of the arc discharged under high voltage.
Furthermore, as shown in fig. 2-3, the electronic device according to the present invention further includes: and second partition walls 4, the second partition walls 4 being provided on the surface of the electronic device 2 on which the leads 21 are provided, each of the second partition walls 4 being provided between the respective two adjacent leads 21 in common with a corresponding one of the first partition walls 3.
With such a configuration, not only can the propagation of the arc emitted under high voltage between the two adjacent pins 21 be blocked by the first partition wall 3, but also the propagation of the arc emitted under high voltage between the two adjacent pins 21 can be blocked by the second partition wall 4 provided on the surface of the electronic device 2 on which the pins 21 are provided, and further the propagation of the arc emitted under high voltage between the two adjacent pins on the surface of the electronic device 2 on which the pins 21 are provided is blocked, so that the arc emitted under high voltage must propagate by bypassing the second partition wall 4, thereby increasing the insulation distance between the adjacent pins 21 in all directions and avoiding interference due to too short insulation distance.
More specifically, as shown in fig. 3, the electronic device 2 according to the preferred embodiment of the present invention is provided with three pins 21. Further, a first partition wall 3 is projected from the inner side surface of the upper case 11, and a second partition wall 4 is provided on the surface of the electronic device 2 provided with the center pin 21. With this arrangement, since the first partition wall 3 protrudes from the inner side surface of the upper case 11, the arc discharged under high voltage is effectively prevented from propagating along the inner side surface of the upper case 11, and the second partition wall 4 protrudes from the surface of the electronic device 2, the arc discharged under high voltage is effectively prevented from propagating along the surface of the electronic device 2, in such a manner that, as shown in fig. 3, the arc discharged under high voltage between two adjacent pins 21 (such as the right-side pin 21 and the pin 21 at the middle position in fig. 3) must propagate around the first partition wall 3 and the second partition wall 4, so that the insulation distance between the two adjacent pins 21 is increased in fact, and defects such as a decrease in electrical performance that may occur due to an excessively short insulation distance are effectively avoided. In contrast, if the first partition wall 3 and the second partition wall 4 are not provided, the insulation distance between two adjacent leads 21 is a straight distance therebetween, as shown by a dotted line in fig. 3. It can be seen that, by using the separation structure provided by the present invention, the insulation distance between two adjacent pins 21 of the electronic device 2 can be effectively increased.
Further, according to the electronic device provided by the present invention, as shown in fig. 4, a substrate 5 is accommodated in the cavity in the housing, a slot 51 is provided on the substrate 5, and when the electronic device is mounted together, each first partition wall 3 is inserted into a corresponding one of the slot 51, so that the top ends of the corresponding two adjacent pins are isolated from each other by the first partition wall.
With such a configuration, when the base plate 5 is provided in the cavity of the electronic apparatus, by inserting the first partition wall 3 into the corresponding one of the slot holes 51, the occupation of the cavity in the casing can be effectively arranged without increasing the volume of the casing.
Further, according to the present invention, the first partition wall 3 is bent when viewed in a direction perpendicular to the inner side surface of one of the upper case 11 and the lower case. By forming the first partition wall 3 in a bent shape, the insulation distance between the adjacent leads 21 can be further increased.
The above description is only for the preferred embodiment and the accompanying drawings, which are not intended to limit the scope of the present invention, and the present invention is not limited by the scope of the claims, which are embodied by the same technical means or the scope of the claims.
For example, in the above-described preferred embodiment, the first partition wall 3 protrudes from the inner side surface of the upper case 11, and is perpendicular to the inner side surface of the upper case 11. This is because in the present embodiment, the pins 21 of the electronic devices 2 are each relatively close to the inner side surface of the upper case 11, so that the first partition walls 3 protrude from the inner side surface of the upper case 11. However, the present invention is not limited thereto, and those skilled in the art can arbitrarily select the first partition wall 3 to protrude from the inner side surface of the upper case 11 or the lower case according to actual design and use requirements, as long as the first partition wall 3 is located between two adjacent pins 21.
Further, in the above-described embodiment, the second partition wall 4 is provided on the surface of the electronic device 2 where the center pin 21 is provided. However, the present invention is not limited thereto, and those skilled in the art can optionally arrange the second separating wall 4 around any one or more pins 21 of the electronic device 2 according to the actual design and use requirements, as long as the second separating wall 4 is formed integrally with the surface of the electronic device 2 and is located between two adjacent pins 21.
Further, in the above-described embodiment, the second partition wall 4 extends only a short length over the surface of the electronic device 2 to ensure that the arc discharged under high voltage does not propagate along the surface of the electronic device 2. However, the present invention is not limited thereto, and those skilled in the art can arbitrarily select the length of the second partition wall 4 extending out of the surface of the electronic device 2 according to actual design and use requirements, for example, the second partition wall 4 can be formed such that any straight line segment connecting between two corresponding adjacent pins 21 passes through the second partition wall 4, so as to further improve the insulation distance between two adjacent pins 21.
Claims (19)
1. An electronic device having a partition structure, comprising:
a housing which is formed by combining an upper housing and a lower housing and between which a cavity for accommodating an electrical component is formed; wherein,
first partition walls are arranged among pins of the electronic device accommodated in the cavity, so that two corresponding adjacent pins are separated by one corresponding first partition wall; wherein
The first partition wall protrudes from an inner side surface of one of the upper case and the lower case, and extends in a direction perpendicular to the inner side surface of the one of the upper case and the lower case.
2. The electronic device of claim 1, wherein
Any straight line segment connecting the two adjacent pins passes through the first partition wall.
3. An electronic device as claimed in claim 1 or 2, wherein
At least one of the respective two adjacent leads is located within a range surrounded by a peripheral contour of the first partition wall when viewed in a direction perpendicular to the first partition wall and parallel to the inner side surface.
4. An electronic device as claimed in claim 1 or 2, wherein
A portion where one of the respective two adjacent leads overlaps the other of the respective two adjacent leads with each other is located within a range surrounded by an outer peripheral contour of the first partition wall when viewed in a projection direction perpendicular to the first partition wall and parallel to the inner side surface.
5. The electronic device of claim 1 or 2, further comprising:
second partition walls provided on a surface of the electronic device on which the pins are provided, each of the second partition walls being provided between the respective two adjacent pins.
6. The electronic device of claim 3, further comprising:
second partition walls provided on a surface of the electronic device on which the pins are provided, each of the second partition walls being provided between the respective two adjacent pins.
7. The electronic device of claim 4, further comprising:
second partition walls provided on a surface of the electronic device on which the pins are provided, each of the second partition walls being provided between the respective two adjacent pins.
8. The electronic device of claim 5, wherein
Each of the second partition walls is disposed between the corresponding two adjacent leads together with a corresponding one of the first partition walls.
9. The electronic device of claim 6, wherein
Each of the second partition walls is disposed between the corresponding two adjacent leads together with a corresponding one of the first partition walls.
10. The electronic device of claim 7, wherein
Each of the second partition walls is disposed between the corresponding two adjacent leads together with a corresponding one of the first partition walls.
11. The electronic device of claim 8, wherein
Any straight line segment connecting between the two adjacent pins passes through the second separation wall.
12. The electronic device of claim 9, wherein
Any straight line segment connecting between the two adjacent pins passes through the second separation wall.
13. The electronic device of claim 10, wherein
Any straight line segment connecting between the two adjacent pins passes through the second separation wall.
14. The electronic device of claim 11, wherein
A base plate is accommodated in a cavity in the housing, the base plate being provided with a slot hole, and when the electronic devices are mounted together, each of the first partition walls is inserted into a corresponding one of the slot holes, so that tips of the respective two adjacent pins are isolated from each other by the first partition walls.
15. The electronic device of claim 12, wherein
A base plate is accommodated in a cavity in the housing, the base plate being provided with a slot hole, and when the electronic devices are mounted together, each of the first partition walls is inserted into a corresponding one of the slot holes, so that tips of the respective two adjacent pins are isolated from each other by the first partition walls.
16. The electronic device of claim 13, wherein
A base plate is accommodated in a cavity in the housing, the base plate being provided with a slot hole, and when the electronic devices are mounted together, each of the first partition walls is inserted into a corresponding one of the slot holes, so that tips of the respective two adjacent pins are isolated from each other by the first partition walls.
17. The electronic device of claim 14, wherein
The first partition wall has a bent shape when viewed in a direction perpendicular to the inner side surface of one of the upper case and the lower case.
18. The electronic device of claim 15, wherein
The first partition wall has a bent shape when viewed in a direction perpendicular to the inner side surface of one of the upper case and the lower case.
19. The electronic device of claim 16, wherein
The first partition wall has a bent shape when viewed in a direction perpendicular to the inner side surface of one of the upper case and the lower case.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013201363997U CN203301879U (en) | 2013-03-22 | 2013-03-22 | Electronic device having dividing structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013201363997U CN203301879U (en) | 2013-03-22 | 2013-03-22 | Electronic device having dividing structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203301879U true CN203301879U (en) | 2013-11-20 |
Family
ID=49577855
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2013201363997U Expired - Fee Related CN203301879U (en) | 2013-03-22 | 2013-03-22 | Electronic device having dividing structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203301879U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109845427A (en) * | 2016-10-11 | 2019-06-04 | 黑拉有限责任两合公司 | System with shell and electronic device |
| CN112512232A (en) * | 2019-09-13 | 2021-03-16 | 矢崎总业株式会社 | Electrical junction box |
-
2013
- 2013-03-22 CN CN2013201363997U patent/CN203301879U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109845427A (en) * | 2016-10-11 | 2019-06-04 | 黑拉有限责任两合公司 | System with shell and electronic device |
| CN112512232A (en) * | 2019-09-13 | 2021-03-16 | 矢崎总业株式会社 | Electrical junction box |
| CN112512232B (en) * | 2019-09-13 | 2022-04-29 | 矢崎总业株式会社 | Electrical junction box |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20131120 Termination date: 20210322 |