CN203289597U - Multi-service network access platform - Google Patents
Multi-service network access platform Download PDFInfo
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- CN203289597U CN203289597U CN2013203819434U CN201320381943U CN203289597U CN 203289597 U CN203289597 U CN 203289597U CN 2013203819434 U CN2013203819434 U CN 2013203819434U CN 201320381943 U CN201320381943 U CN 201320381943U CN 203289597 U CN203289597 U CN 203289597U
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Abstract
The utility model discloses a multi-service network access platform which comprises a microprocessor, a photoelectric conversion module, an SERDES interface chip, an FPGA chip, a multiprotocol interface chip, an Ethernet MAC chip, a PCM coding and decoding chip, an RS485 interface chip, and an E1 interface chip. The photoelectric conversion module, the SERDES interface chip, the multiprotocol interface chip, the Ethernet MAC chip, the PCM coding and decoding chip and the E1 interface chip are connected with the FPGA chip via a bus. One end of the microprocessor is connected with the FPGA chip via an MDIO interface, and the other end of the microprocessor is connected with the RS485 interface chip. The multi-service network access platform can accomplish a comprehensive access of different types of interfaces of video monitoring, telephones, industrial data and the like in an enterprise network or an edge network, so as to form a comprehensive access platform of multi-service access transmission on an identical platform, and reduces the access cost at a terminal of a user.
Description
Technical field
The utility model relates to the communications field, is specifically related to the multibusiness network access platform.
Background technology
At the end of enterprise network or the access of edge net, often kind of interface is complicated, and especially enterprise network, often need to have Ethernet, E1, monitor video, voice call, the signal of the types such as synchronous and asynchronous data is linked into data center, video monitoring center, network switch.If our every kind of interface all adopts a kind of access device endways, the problem such as that will bring device category complicated, and is difficult in maintenance, and cost of access is too high.The appearance of MAX series comprehensive type network insertion transmission equipment solves problems fully, and it is a kind of multi-user, multiple services network insertion transmission equipment, the high-density installation equipment that uses under the central office side condition.Support mixed insertion and the access of the dissimilar integrated circuit boards such as optical fiber, video, voice, E1, Ethernet, phone, industrial data,, to be formed on the comprehensive access platform of multiple business access, transmission on identical platform, reduce user's comprehensive cost of access endways.
The utility model content
The utility model is by arranging the multibusiness network access platform, solves the problems such as the terminal interface kind of enterprise network is complicated, difficult in maintenance, reaches the purpose that reduces costs.
The purpose of this utility model reaches by the following technical programs:
The utility model comprises microprocessor, photoelectric conversion module, SERDES interface chip, fpga chip, multi-protocol interface chip, Ethernet MAC controller, PCM codec chip, RS485 interface chip and E1 interface chip, described photoelectric conversion module, SERDES interface chip, multi-protocol interface chip, Ethernet MAC controller, PCM codec chip and E1 interface chip are connected bus and are connected with fpga chip, one end of described microprocessor is connected with fpga chip by the MDIO interface, and the other end of microprocessor is connected with the RS485 interface chip.Photoelectric conversion module, SERDES interface chip, Ethernet MAC controller, multi-protocol interface chip, PCM codec chip and E1 interface chip all pass through 16 high-speed bus diconnecteds with fpga chip, and all high speeds divide multiple connection function and protocol processes function all with fpga chip, to realize, and fpga chip adjusts width and the speed of bus automatically according to the access device type, improved different agreement and interface adaptive flexibility; Described microprocessor one end is connected the MDIO interface and connects with the on-site programmable gate array FPGA chip, to the relevant configuration information of fpga chip inner function module read-write; And an other end is communicated by letter with each access device by the RS485 interface, reads state and the configuration information of each access device, and microprocessor is adjusted highway width and frequency automatically according to the module information that gathers.
Further, also comprise the webmaster chip, described webmaster chip is connected with photoelectric conversion module, SERDES interface chip, multi-protocol interface chip, Ethernet MAC controller, PCM codec chip and E1 interface chip by the webmaster bus.The network manager can, by the webmaster chip is monitored, tests, configures, analyzes, estimates and control the external network equipment, Internet resources etc.,, reasonably to operate to adjust performance and the service condition of Internet resources, effectively move network.
Further, as preferably, described photoelectric conversion module is CC2520.
Further, as preferably, described SERDES interface chip is TLKC2221.
Further, as preferably, Ethernet MAC controller is BCM53115.
Further, as preferably, described PCM codec chip is MC145410.
Further, as preferably, described microprocessor is AT91SAM9260.
Further, as preferably, described fpga chip is LFXP2-TQFP144.
The utility model compared with prior art, have following advantage and a beneficial effect:
1 the utility model comprises microprocessor, photoelectric conversion module, the SERDES interface chip, fpga chip, the multi-protocol interface chip, Ethernet MAC controller, the PCM codec chip, RS485 interface chip and E1 interface chip, described photoelectric conversion module, the SERDES interface chip, the multi-protocol interface chip, Ethernet MAC controller, the PCM codec chip is connected bus with the E1 interface chip and is connected with fpga chip, one end of described microprocessor is connected with fpga chip by the MDIO interface, the other end of microprocessor is connected with the RS485 interface chip, can accomplish traditional TDM business, Network, the pattern of fusion transmission of video traffic, enterprise's Ethernet service and speech have been solved from business, the cost of access problem of video traffic.
The problems such as 2 the utility model are compared with traditional PDH optical transceiver, video optical multiplexer, gigabit networking transceiver, have solved the enterprise network device category complicated, and are difficult in maintenance, and cost of access is too high, the technical costs during the reduction user accesses endways.
3 the utility model have solved different frequency, the access of different bandwidth data difficulty, the problem of bandwidth waste, adjust highway width and frequency automatically by the module information that gathers, customer service traditional inefficient problem of TDM bus-sharing.
Description of drawings
Fig. 1 is structured flowchart of the present utility model.
Embodiment
Embodiment 1:
As shown in Figure 1, the present embodiment comprises microprocessor, photoelectric conversion module, SERDES interface chip, fpga chip, multi-protocol interface chip, Ethernet MAC controller, PCM codec chip, RS485 interface chip and E1 interface chip, described photoelectric conversion module, SERDES interface chip, multi-protocol interface chip, Ethernet MAC controller, PCM codec chip and E1 interface chip are connected bus and are connected with fpga chip, one end of described microprocessor is connected with fpga chip by the MDIO interface, and the other end of microprocessor is connected with the RS485 interface chip.
photoelectric conversion module, the SERDES interface chip, Ethernet MAC controller, the multi-protocol interface chip, PCM codec chip and E1 interface chip all pass through 16 high-speed bus diconnecteds with fpga chip, and all high speeds divide multiple connection function and protocol processes function all with fpga chip, to realize, and fpga chip is adjusted width and the speed of bus automatically according to the access device type, improved different agreement and interface adaptive flexibility, make the video monitoring in enterprise network or edge net, phone, the comprehensive access of the dissimilar interface such as industrial data, realize multiple business access transmission to be formed on identical platform.
One end of microprocessor is connected the MDIO interface and connects with the on-site programmable gate array FPGA chip, can be to the relevant configuration information of fpga chip inner function module read-write.And an other end is communicated by letter with each access device by the RS485 interface, reads state and the configuration information of each access device, and microprocessor is adjusted highway width and frequency automatically according to the module information that gathers.
Embodiment 2:
As shown in Figure 1, the present embodiment is on the basis of embodiment 1, also comprise the webmaster chip, described webmaster chip is connected with photoelectric conversion module, SERDES interface chip, multi-protocol interface chip, Ethernet MAC controller, PCM codec chip and E1 interface chip by the webmaster bus.The network manager can be by monitoring, test, configure, analyze, estimate and control the external network equipment, Internet resources etc. the webmaster chip.Again by the webmaster bus with signalling to photoelectric conversion module, SERDES interface chip, multi-protocol interface chip, Ethernet MAC controller, PCM codec chip and E1 interface chip, reasonably to operate to adjust performance and the service condition of Internet resources, network is effectively moved.
Claims (8)
1. multibusiness network access platform, it is characterized in that: comprise microprocessor, photoelectric conversion module, the SERDES interface chip, fpga chip, the multi-protocol interface chip, Ethernet MAC controller, the PCM codec chip, RS485 interface chip and E1 interface chip, described photoelectric conversion module, the SERDES interface chip, the multi-protocol interface chip, Ethernet MAC controller, the PCM codec chip is connected bus with the E1 interface chip and is connected with fpga chip, one end of described microprocessor is connected with fpga chip by the MDIO interface, the other end of microprocessor is connected with the RS485 interface chip.
2. multibusiness network access platform according to claim 1, it is characterized in that: also comprise the webmaster chip, described webmaster chip is connected with photoelectric conversion module, SERDES interface chip, multi-protocol interface chip, Ethernet MAC controller, PCM codec chip and E1 interface chip by the webmaster bus.
3. multibusiness network access platform according to claim 1 and 2, it is characterized in that: described photoelectric conversion module is CC2520.
4. multibusiness network access platform according to claim 1 and 2, it is characterized in that: described SERDES interface chip is ISL34340.
5. multibusiness network access platform according to claim 1 and 2, it is characterized in that: described Ethernet MAC controller is BCM53115.
6. multibusiness network access platform according to claim 1 and 2, it is characterized in that: described PCM codec chip is MC145410.
7. multibusiness network access platform according to claim 1, it is characterized in that: described microprocessor is AT91SAM9260.
8. the described multibusiness network access platform of any one according to claim 1, it is characterized in that: described fpga chip is LFXP2-TQFP144.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013203819434U CN203289597U (en) | 2013-06-28 | 2013-06-28 | Multi-service network access platform |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013203819434U CN203289597U (en) | 2013-06-28 | 2013-06-28 | Multi-service network access platform |
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| CN203289597U true CN203289597U (en) | 2013-11-13 |
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| CN2013203819434U Expired - Fee Related CN203289597U (en) | 2013-06-28 | 2013-06-28 | Multi-service network access platform |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103327423A (en) * | 2013-06-28 | 2013-09-25 | 成都思迈科技发展有限责任公司 | Multi-service network access platform |
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2013
- 2013-06-28 CN CN2013203819434U patent/CN203289597U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103327423A (en) * | 2013-06-28 | 2013-09-25 | 成都思迈科技发展有限责任公司 | Multi-service network access platform |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20131113 Termination date: 20140628 |
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| EXPY | Termination of patent right or utility model |