CN203289346U - Inverter for overload protection - Google Patents
Inverter for overload protection Download PDFInfo
- Publication number
- CN203289346U CN203289346U CN2013201881341U CN201320188134U CN203289346U CN 203289346 U CN203289346 U CN 203289346U CN 2013201881341 U CN2013201881341 U CN 2013201881341U CN 201320188134 U CN201320188134 U CN 201320188134U CN 203289346 U CN203289346 U CN 203289346U
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- winding
- transistor
- resistance
- transistorized
- electric capacity
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Abstract
The utility model discloses an inverter for overload protection. The inverter for the overload protection comprises a power supply positive pole input terminal, a power supply negative pole input terminal, a power supply positive pole output terminal, a power supply negative pole output terminal, a first winding, a second winding, a third winding, a fourth winding, a fifth winding, a first capacitor, a second capacitor, a third capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a position-changing device, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor and a first diode. The multi-winding method is utilized in the inverter for the overload protection, so that inversion efficiency of the whole machine is improved, no-load loss is low, the structure is simple, safe and reliable, and stability of a system is ensured.
Description
Technical field
The utility model relates to a kind of power supply reforming unit, refers more particularly to a kind of inverter of overload protection.
Background technology
Along with the development of science and technology, the application of inverter is more and more extensive, and single winding output voltage is relatively fixing, in case occur that the situation of overload is easy to burn power consumption equipment, makes troubles to the user.
The utility model content
The purpose of this utility model just is the inverter of the overload protection that provides a kind of simple in structure, safe and reliable in order to address the above problem.
The utility model is achieved through the following technical solutions above-mentioned purpose:
the utility model comprises the positive source input, the power cathode input, the positive source output, the power cathode output, the first winding, the second winding, the tertiary winding, the 4th winding, the 5th winding, the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity, the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, deflection machine, the first transistor, transistor seconds, the 3rd transistor, the 4th transistor, the 5th transistor, the 6th transistor, the 7th transistor, the 8th transistor and the first diode, described positive source input respectively with the described the 7th transistorized collector electrode, the described the 5th transistorized collector electrode, the described the 3rd transistorized collector electrode, the first end of the first electric capacity, the emitter of described the first transistor, the emitter of described transistor seconds, the first end of the 3rd electric capacity, the described the 4th transistorized emitter, the described the 6th transistorized emitter be connected the 8th transistorized emitter and connect, the described the 8th transistorized collector electrode is connected with the first end of the described tertiary winding, the described the 8th transistorized base stage is connected with the first end of described the 4th winding, the second end of described the 4th winding is connected with the described the 6th transistorized collector electrode, the described the 6th transistorized base stage is connected with the described the 4th transistorized collector electrode, the second end of the described the 4th transistorized base stage and described the 3rd electric capacity be connected the first end of the 6th resistance and be connected, the second end of described the 6th resistance respectively with the base stage of described the first transistor be connected the first end of the 4th resistance and be connected, the second end of described the 4th resistance respectively with the first end of described deflection machine be connected the first end of the 5th resistance and be connected, the second end of described the 5th resistance is connected with the collector electrode of described transistor seconds, the base stage of described transistor seconds respectively with the first end of described the second electric capacity be connected the first end of the 3rd resistance and be connected, the second end of described the second electric capacity respectively with the collector electrode of described the first transistor, the first end of the first end of the second resistance and the first resistance, the second end of described the second resistance respectively with the second end of described the 3rd resistance be connected the second end of deflection machine and be connected, the sliding end of described deflection machine respectively with the positive pole of described the first diode be connected the first end of the 6th resistance and be connected, the second end of described the 6th resistance respectively with described power cathode input, the first end of described the second winding be connected the second end of the tertiary winding and connect, the second end of described the second winding is connected with the described the 7th transistorized emitter, the described the 7th transistorized base stage is connected with the first end of described the first winding, the second end of described the first winding is connected with the described the 5th transistorized emitter, the described the 5th transistorized base stage is connected with the described the 3rd transistorized emitter, the described the 3rd transistorized base stage respectively with the second end of described the first electric capacity be connected the second end of the first resistance and be connected, described positive source output is connected with the first end of described the 4th electric capacity, the second end of described the 4th electric capacity is connected with the first end of described the 5th winding, the second end of described the 5th winding is connected with described power cathode output.
Particularly, share same iron core with described the 5th winding after described the first winding, described the second winding, the described tertiary winding, described the 4th winding parallel.
The beneficial effects of the utility model are:
The utility model adopts repeatedly the method for winding, improves the complete machine inversion efficiency, and no-load loss is low, and is simple in structure, safe and reliable, guaranteed the stability of system.
Description of drawings
Fig. 1 is circuit diagram of the present utility model.
Embodiment
The utility model is described in further detail below in conjunction with accompanying drawing:
as shown in Figure 1, the utility model comprises positive source input a1, power cathode input b1, positive source output a2, power cathode output b2, the first winding L 1, the second winding L 2, tertiary winding L3, the 4th winding L 4, the 5th winding L 5, the first capacitor C 1, the second capacitor C 2, the 3rd capacitor C 3, the 4th capacitor C 4, the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, deflection machine RP, the first transistor VT1, transistor seconds VT2, the 3rd transistor VT3, the 4th transistor VT4, the 5th transistor VT5, the 6th transistor VT6, the 7th transistor VT7, the 8th transistor VT8 and the first diode D1, positive source input a1 respectively with the collector electrode of the 7th transistor VT7, the collector electrode of the 5th transistor VT5, the collector electrode of the 3rd transistor VT3, the first end of the first capacitor C 1, the emitter of the first transistor VT1, the emitter of transistor seconds VT2, the first end of the 3rd capacitor C 3, the emitter of the 4th transistor VT4, the emitter of the emitter of the 6th transistor VT6 and the 8th transistor VT8 connects, the collector electrode of the 8th transistor VT8 is connected with the first end of tertiary winding L3, the base stage of the 8th transistor VT8 is connected with the first end of the 4th winding L 4, the second end of the 4th winding L 4 and the 6th transistor VT6 collector electrode be connected, the base stage of the 6th transistor VT6 is connected with the collector electrode of the 4th transistor VT4, the base stage of the 4th transistor VT4 is connected with the first end of the 6th resistance R 6 with the second end of the 3rd capacitor C 3, the second end of the 6th resistance R 6 is connected with the first end of the 4th resistance R 4 with the base stage of the first transistor VT1 respectively, the second end of the 4th resistance R 4 is connected with the first end of the 5th resistance R 5 with the first end of deflection machine RP respectively, the second end of the 5th resistance R 5 is connected with the collector electrode of transistor seconds VT2, the base stage of transistor seconds VT2 is connected with the first end of the 3rd resistance R 3 with the first end of the second capacitor C 2 respectively, the second end of the second capacitor C 2 respectively with the collector electrode of the first transistor VT1, the first end of the first end of the second resistance R 2 and the first resistance R 1, the second end of the second resistance R 2 is connected the second end with the second end of the 3rd resistance R 3 respectively and is connected with deflection machine RP, the sliding end of deflection machine RP is connected with the first end of the 6th resistance R 6 with the positive pole of the first diode D1 respectively, the second end of the 6th resistance R 6 respectively with power cathode input b1, the first end of the second winding L 2 is connected the second end and is connected with tertiary winding L3, the second end of the second winding L 2 is connected with the emitter of the 7th transistor VT7, the base stage of the 7th transistor VT7 is connected with the first end of the first winding L 1, the second end of the first winding L 1 is connected with the emitter of the 5th transistor VT5, the base stage of the 5th transistor VT5 is connected with the emitter of the 3rd transistor VT3, the base stage of the 3rd transistor VT3 respectively with the second end of the first capacitor C 1 be connected the second end of resistance R 1 and be connected, positive source output a2 is connected with the first end of the 4th capacitor C 4, the second end of the 4th capacitor C 4 is connected with the first end of the 5th winding L 5, the second end of the 5th winding L 5 is connected with power cathode output b22, the first winding L 1, the second winding L 2, tertiary winding L3, share same iron core with the 5th winding L 5 after the 4th winding L 4 is in parallel.
Claims (2)
1. the inverter of an overload protection, is characterized in that: comprise the positive source input, the power cathode input, the positive source output, the power cathode output, the first winding, the second winding, the tertiary winding, the 4th winding, the 5th winding, the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity, the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, deflection machine, the first transistor, transistor seconds, the 3rd transistor, the 4th transistor, the 5th transistor, the 6th transistor, the 7th transistor, the 8th transistor and the first diode, described positive source input respectively with the described the 7th transistorized collector electrode, the described the 5th transistorized collector electrode, the described the 3rd transistorized collector electrode, the first end of the first electric capacity, the emitter of described the first transistor, the emitter of described transistor seconds, the first end of the 3rd electric capacity, the described the 4th transistorized emitter, the described the 6th transistorized emitter be connected the 8th transistorized emitter and connect, the described the 8th transistorized collector electrode is connected with the first end of the described tertiary winding, the described the 8th transistorized base stage is connected with the first end of described the 4th winding, the second end of described the 4th winding is connected with the described the 6th transistorized collector electrode, the described the 6th transistorized base stage is connected with the described the 4th transistorized collector electrode, the second end of the described the 4th transistorized base stage and described the 3rd electric capacity be connected the first end of the 6th resistance and be connected, the second end of described the 6th resistance respectively with the base stage of described the first transistor be connected the first end of the 4th resistance and be connected, the second end of described the 4th resistance respectively with the first end of described deflection machine be connected the first end of the 5th resistance and be connected, the second end of described the 5th resistance is connected with the collector electrode of described transistor seconds, the base stage of described transistor seconds respectively with the first end of described the second electric capacity be connected the first end of the 3rd resistance and be connected, the second end of described the second electric capacity respectively with the collector electrode of described the first transistor, the first end of the first end of the second resistance and the first resistance, the second end of described the second resistance respectively with the second end of described the 3rd resistance be connected the second end of deflection machine and be connected, the sliding end of described deflection machine respectively with the positive pole of described the first diode be connected the first end of the 6th resistance and be connected, the second end of described the 6th resistance respectively with described power cathode input, the first end of described the second winding be connected the second end of the tertiary winding and connect, the second end of described the second winding is connected with the described the 7th transistorized emitter, the described the 7th transistorized base stage is connected with the first end of described the first winding, the second end of described the first winding is connected with the described the 5th transistorized emitter, the described the 5th transistorized base stage is connected with the described the 3rd transistorized emitter, the described the 3rd transistorized base stage respectively with the second end of described the first electric capacity be connected the second end of the first resistance and be connected, described positive source output is connected with the first end of described the 4th electric capacity, the second end of described the 4th electric capacity is connected with the first end of described the 5th winding, the second end of described the 5th winding is connected with described power cathode output.
2. the inverter of a kind of overload protection according to claim 1, is characterized in that: share same iron core with described the 5th winding after described the first winding, described the second winding, the described tertiary winding, described the 4th winding parallel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013201881341U CN203289346U (en) | 2013-04-15 | 2013-04-15 | Inverter for overload protection |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013201881341U CN203289346U (en) | 2013-04-15 | 2013-04-15 | Inverter for overload protection |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203289346U true CN203289346U (en) | 2013-11-13 |
Family
ID=49545688
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2013201881341U Expired - Fee Related CN203289346U (en) | 2013-04-15 | 2013-04-15 | Inverter for overload protection |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203289346U (en) |
-
2013
- 2013-04-15 CN CN2013201881341U patent/CN203289346U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20131113 Termination date: 20140415 |