CN203191484U - Integrated automation substation avalanche testing device based on time synchronization system - Google Patents
Integrated automation substation avalanche testing device based on time synchronization system Download PDFInfo
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- CN203191484U CN203191484U CN 201320198178 CN201320198178U CN203191484U CN 203191484 U CN203191484 U CN 203191484U CN 201320198178 CN201320198178 CN 201320198178 CN 201320198178 U CN201320198178 U CN 201320198178U CN 203191484 U CN203191484 U CN 203191484U
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Abstract
The utility model relates to an integrated automation substation avalanche testing device based on a time synchronization system, which belongs to the test field of substation integrated automation systems, and particularly relates to an electric power dispatching system hypothesis testing and correcting tool. The integrated automation substation avalanche testing device aims to solve the problem that the synchronism and the accuracy of actions a plurality of remote communication points can not be met in manual avalanche testing experiments. The integrated automation substation avalanche testing device comprises an external clock input unit, a serial communication unit, a time keeping unit, an external clock receiving unit, N pulse output units, a main microprocessor unit and a clock source selection circuit. The integrated automation substation avalanche testing device adopts the design solution that the external clock receiving unit sends out time synchronization information, the main microprocessor receives the time synchronization information sent by the external clock receiving unit to act as a clock source of the system, and the clock source selection circuit uses selected signals as output standard pulse per second signals. The integrated automation substation avalanche testing device based on the time synchronization system is mainly applied to the field of power equipment detection.
Description
Technical field
The utility model belongs to the field tests of comprehensive automation system of transformer substation, is specifically related to a kind of electric power dispatching system hypothesis testing and verification instrument.
Background technology
In power equipment detects, need carry out the snowslide test to equipment, that is: a plurality of remote signalling points are tested simultaneously, the consistance of decision event and accuracy.Require a plurality of remote signalling points to move simultaneously and synchronism and the accuracy of safety action time, the manual testing can't satisfy synchronism and the accuracy that a plurality of remote signalling points move, and manual testing's accuracy actuation time can reach lOms.
The utility model content
The purpose of this utility model can't satisfy the synchronism of a plurality of remote signalling point actions and the problem of accuracy in order to solve manual testing's snowslide testing experiment, has proposed a kind of integrated automation converting station snowslide proving installation based on clock synchronization system.
A kind of integrated automation converting station snowslide proving installation based on clock synchronization system, it comprises external clock input block, serial communication unit, punctual unit, external clock receiving element, a N pulse output unit, master microprocessor unit and clock source selection circuit; N is the integer greater than 0,
The signal output part of described external clock input block is connected with the clock signal input terminal of external clock receiving element; The signal output part of described external clock receiving element is connected with first clock signal input terminal of clock source selection circuit,
The first control signal output terminal of described master microprocessor unit is connected with the first control signal input end of clock source selection circuit, the second control signal output terminal of master microprocessor unit is connected with the second control signal input end of clock source selection circuit, the 3rd control signal output terminal of master microprocessor unit is connected with the 3rd control signal input end of clock source selection circuit, the 4th control signal output terminal of master microprocessor unit is connected with the 4th control signal input end of clock source selection circuit, the punctual control signal output terminal of master microprocessor unit is connected with the punctual control signal input end of punctual unit, the serial communication signals end of master microprocessor unit is connected with the serial communication signals end of serial communication unit, the pulse control signal output terminal of master microprocessor unit is connected with the control signal input end of each pulse output unit and the signal input part of external clock receiving element by control bus, the pulse feedback signal input end of master microprocessor unit is connected with the pulse feedback signal output terminal of each pulse output unit and the pulse feedback signal output terminal of external clock receiving element by control bus, the signal output part of described punctual unit is connected with the second clock signal input part of clock source selection circuit, and the clock signal output terminal of described clock source selection circuit is connected with the clock signal input terminal of punctual unit and the standard second pulse signal input terminal of each pulse output unit simultaneously.
Described master microprocessor unit comprises master microprocessor, keyboard circuit, LCD, first serial driver element, RS422 bus driver unit and LED indicating circuit;
First serial port of described taxi microprocessor is connected with the signal input output end of first serial driver element, the RS422 COM port of master microprocessor is connected with the signal input output end of RS422 bus driver unit, the pilot lamp control signal output terminal of master microprocessor is connected with the control signal input end of LED indicating circuit, the push button signalling input end of master microprocessor is connected with the push button signalling output terminal of keyboard circuit, the liquid crystal display-driving cell signal output terminal of master microprocessor is connected with the signal input part of LCD, first of master microprocessor, second, the third and fourth control signal output terminal is respectively first to fourth control signal output terminal of master microprocessor unit, the punctual control signal output terminal of master microprocessor is the punctual control signal output terminal of master microprocessor unit, the signal output part of first serial driver element is the serial communication signals end of master microprocessor unit, and the secondary signal input/output terminal of RS bus driver unit is the pulse feedback signal input end of master microprocessor unit.
The punctual state of the punctual unit of master microprocessor control, @ resolved in the source when master microprocessor hated pick external clock and punctual state to carry out, and exported with the normal sand pulse signal by the signal that the first, second, third and the 4th control signal output terminal of master microprocessor will be controlled after the clock source selection circuit will be selected.
By keyboard circuit the parameter of master microprocessor can be set, this parameter can show by LCD.
The pulse feedback signal output terminal output of described grandson portion clock receiving element be to comprise year, month, day, hour, min, second total time synchronizing signal of letter.
What the pulse control signal output terminal of described master microprocessor unit was exported is control signal.
Described time synchronizing signal is pps pulse per second signal.
The signal way of described pulse output unit output more than or equal to 1 smaller or equal to 200.The signal of the signal output part output of described punctual unit is pps pulse per second signal.
Described N is smaller or equal to 10 integer more than or equal to 1.
The signal of the clock signal output terminal output of described clock source selection circuit is as the standard second pulse signal after selecting.
The master microprocessor unit also comprises the second serial driver element, and second serial port of described taxi microprocessor is connected with the signal input output end of second serial driver element, and the second serial driver element is as standby port.
Principle analysis: the external clock receiving element receives the signal of the time of external clock input block output IRIG-B sign indicating number form, calculate time synchronizing signal and pps pulse per second signal by ascending part clock receiving element, and give the master microprocessor unit time synchronizing signal simultaneously, pps pulse per second signal is sent to the clock source selection circuit
The pulse per second (PPS) of punctual unit exports the clock source selection circuit to, and its punctual state is by the punctual control signal output terminal control of master microprocessor.Master microprocessor is by the first, second, third and the 4th control signal output terminal control clock source selection circuit, the clock source selection circuit is selected a kind of as the outputting standard pps pulse per second signal in the sand pulse of handsome portion clock receiving element output or the punctual unit output pps pulse per second signal, and this signal is sent to punctual unit and pulse output unit simultaneously
Time signal and control signal that the standard second pulse signal that pulse output unit receive clock source selection circuit is sent and master microprocessor unit send over by the bus driver unit, the pulse signal that the output after the pulse output unit is handled of these signals is synchronous with the standard second pulse signal.
The utility model adopts design ten thousand cases of the friendly time synchronization information that goes out of ascending part clock receiving element institute, and the master microprocessor unit receives time synchronization information signal that handsome portion clock receiving element sends as the clock source of system.The master microprocessor unit adopts advanced time control Processing Algorithm, also can realize keeping in external clock a period of time that receiving element is emitted in losing lock or lost efficacy preceding degree of stability and accuracy when can guarantee external clock receiving element time synchronized, guarantee accuracy and the synchronism of remote signalling point signal output.
Detect in real time and contrast by pulse per second (PPS) and the time synchronizing signal of master microprocessor unit to punctual unit and ascending part clock receiving element, select suitable time source as the working time source of master microprocessor unit and use the pps pulse per second signal of this time source to tame control and check and correction for the quartz oscillator of punctual unit, obtain high precision time information.
A kind of beneficial effect that brings based on the integrated automation converting station snowslide proving installation of clock synchronization system described in the utility model is, can carry out the snowslide test simultaneously to a plurality of remote signalling points, a plurality of remote signalling points have reached synchronism and the accuracy of action, accuracy actuation time has improved 100 times, can reach 0lmS.
Description of drawings
Fig. 1 is the theory diagram of a kind of integrated automation converting station snowslide proving installation based on clock synchronization system described in the utility model.
Fig. 2 is the cut-away view of master microprocessor unit.
Embodiment
Embodiment one: present embodiment is described referring to Fig. 1, the described a kind of integrated automation converting station snowslide proving installation based on clock synchronization system of present embodiment, it comprises external clock input block, serial communication unit 1, punctual unit 2, external clock receiving element 3, a N pulse output unit 4, master microprocessor unit 5 and clock source selection circuit 6; N is the integer greater than 0,
The signal output part of described external clock input block is connected with the clock signal input terminal of external clock receiving element 3; The signal output part of described external clock receiving element 3 is connected with first clock signal input terminal of clock source selection circuit 6,
The first control signal output terminal of described taxi microprocessor unit 5 is connected with the first control signal input end of clock source selection circuit 6, the second control signal output terminal of master microprocessor unit 5 is connected with the second control signal input end of clock source selection circuit 6, the 3rd control signal output terminal of master microprocessor unit 5 is connected with the 3rd control signal input end of clock source selection circuit 6, the 4th control signal output terminal of master microprocessor unit 5 is connected with the 4th control signal input end of clock source selection circuit 6, the punctual control signal output terminal of master microprocessor unit 5 is connected with the punctual control signal input end of punctual unit 2, the serial communication signals end of master microprocessor unit 5 is connected with the serial communication signals end of serial communication unit 1, the pulse control signal output terminal of master microprocessor unit 5 is connected with the control signal input end of each pulse output unit 4 and the signal input part of external clock receiving element 3 by control bus, the pulse feedback signal input end of master microprocessor unit 5 is connected with the pulse feedback signal output terminal of each pulse output unit 4 and the pulse feedback signal output terminal of external clock receiving element 3 by control bus, the signal output part of described punctual unit 2 is connected with the second clock signal input part of clock source selection circuit 6, and the clock signal output terminal of described clock source selection circuit 6 is connected with the clock signal input terminal of punctual unit 2 and the standard second pulse signal input terminal of each pulse output unit 4 simultaneously.
Embodiment two: present embodiment is described referring to Fig. 2, the difference of the described a kind of integrated automation converting station snowslide proving installation based on clock synchronization system of present embodiment and embodiment one is that described master microprocessor unit 5 comprises master microprocessor 5-1, keyboard circuit 5-2, LCD 5-3, first serial driver element 5-4, RS422 bus driver unit 5-6 and LED indicating circuit 5-7;
First serial port of described master microprocessor 5-1 is connected with the signal input output end of first serial driver element 5-4, the RS422 COM port of master microprocessor 8-1 is connected with the signal input output end of RS422 bus driver unit 5-6, the pilot lamp control signal output terminal of master microprocessor 5-1 is connected with the control signal input end of LED indicating circuit 5-7, the push button signalling input end of master microprocessor 5-1 is connected with the push button signalling output terminal of keyboard circuit 5-2, the liquid crystal display-driving cell signal output terminal of master microprocessor 5-1 is connected with the signal input part of LCD 5-3, first of master microprocessor 5-1, second, the third and fourth control signal output terminal is respectively first to fourth control signal output terminal of master microprocessor unit 5, the punctual control signal output terminal of master microprocessor 5-1 is the punctual control signal output terminal of master microprocessor unit 5, the signal output part of first serial driver element 5-4 is the serial communication signals end of master microprocessor unit 5, and the secondary signal input/output terminal of RS422 bus driver unit 5-6 is the pulse feedback signal input end of master microprocessor unit 5.
The punctual state of the punctual unit 2 of master microprocessor 5-1 control, master microprocessor 5-1 carries out time source according to external clock and punctual state and resolves, and the signal after will selecting by the first, second, third and the 4th control signal output terminal control clock source selection circuit 6 of master microprocessor 5-1 is exported with the standard second pulse signal.
By keyboard circuit 5-2 the parameter of master microprocessor 5-1 can be set, this parameter can show by LCD 5-3.
Embodiment three: present embodiment is described referring to Fig. 1, the difference of the described a kind of integrated automation converting station snowslide proving installation based on clock synchronization system of present embodiment and embodiment one is, the pulse feedback signal output terminal output of described external clock receiving element 3 be comprise noon, the moon, day, the time, minute, second information time synchronizing signal.
Embodiment four: present embodiment is described referring to Fig. 1, the difference of the described a kind of integrated automation converting station snowslide proving installation based on clock synchronization system of present embodiment and embodiment one is, the pulse control signal output terminal output of described master microprocessor unit 5 be control signal.
Embodiment five: present embodiment is described referring to Fig. 1, the difference of the described a kind of integrated automation converting station snowslide proving installation based on clock synchronization system of present embodiment and embodiment three is that described time synchronizing signal is pps pulse per second signal.
Embodiment six: present embodiment is described referring to Fig. 1, the difference of the described a kind of integrated automation converting station snowslide proving installation based on clock synchronization system of present embodiment and embodiment one is, the signal way of described pulse output unit 4 outputs more than or equal to 1 smaller or equal to 200.
Embodiment seven: present embodiment is described referring to Fig. 1, the difference of the described a kind of integrated automation converting station snowslide proving installation based on clock synchronization system of present embodiment and embodiment one is that the signal of the signal output part output of described punctual unit 2 is pps pulse per second signal.
Embodiment eight: present embodiment is described referring to Fig. 1, the difference of the described a kind of integrated automation converting station snowslide proving installation based on clock synchronization system of present embodiment and embodiment one is, described N is smaller or equal to 10 integer more than or equal to 1.
Embodiment nine: present embodiment is described referring to Fig. 1, the difference of the described a kind of integrated automation converting station snowslide proving installation based on clock synchronization system of present embodiment and embodiment one is that the signal of the clock signal output terminal output of described clock source selection circuit 6 is as the standard second pulse signal after selecting.
Principle analysis: external clock receiving element 3 receives the time signal of the IRIG-B sign indicating number form of external clock input block output, calculate time synchronizing signal and pps pulse per second signal by external clock receiving element 3, and give master microprocessor unit 5 time synchronizing signal simultaneously, pps pulse per second signal is sent to clock source selection circuit 6
The pulse per second (PPS) of punctual unit 2 exports clock source selection circuit 6 to, its punctual state is by the punctual control signal output terminal control on the master microprocessor 5-, master microprocessor 5-1 is by first, second, third and fourth control signal output terminal control clock source selection circuit 6, clock source selection circuit 6 is selected a kind of as the outputting standard pps pulse per second signal in the pulse per second (PPS) of external clock receiving elements 3 outputs or the punctual unit 2 output sand pulse signals, and this signal is sent to punctual unit 2 and pulse output unit 4 simultaneously
Time signal and control signal that the standard second pulse signal that pulse output unit 4 receive clock sources selection circuit 6 is sent and master microprocessor unit 5 send over by 422 bus driver unit 5@6, these signals be the output pulse signal synchronous with the standard second pulse signal after pulse output unit 4 is handled.
The utility model is principle with practicality, advance, reliability, set up a kind of integrated automation converting station snowslide proving installation based on clock synchronization system, make the remote signalling action realize synchronism and accuracy, realize the increasingly automated of snowslide testing experiment simultaneously, test result is handled, stores, is shown by master system.
Claims (4)
1. integrated automation converting station snowslide proving installation based on clock synchronization system, it is characterized in that it comprises external clock input block, serial communication unit (1), punctual unit (2), external clock receiving element (3), a N pulse output unit (4), master microprocessor unit (5) and clock source selection circuit (6); N is the integer greater than 0,
The signal output part of described external clock input block is connected with the clock signal input terminal of external clock receiving element (3); The signal output part of described external clock receiving element (3) is connected with first clock signal input terminal of clock source selection circuit (6),
The first control signal output terminal of described master microprocessor unit (5) is connected with the first control signal input end of clock source selection circuit (6), the second control signal output terminal of master microprocessor unit (5) is connected with the second control signal input end of clock source selection circuit (6), the 3rd control signal output terminal of master microprocessor unit (5) is connected with the 3rd control signal input end of clock source selection circuit (6), the 4th control signal output terminal of master microprocessor unit (5) is connected with the 4th control signal input end of clock source selection circuit (6), the punctual control signal output terminal of master microprocessor unit (5) is connected with the punctual control signal input end of punctual unit (2), the serial communication signals end of master microprocessor unit (5) is connected with the serial communication signals end of serial communication unit (1), the pulse control signal output terminal of master microprocessor unit (5) is connected with the control signal input end of each pulse output unit (4) and the signal input part of external clock receiving element (3) by control bus, the pulse feedback signal input end of master microprocessor unit (5) is connected with the pulse feedback signal output terminal of each pulse output unit (4) and the pulse feedback signal output terminal of external clock receiving element (3) by control bus, the signal output part of described punctual unit (2) is connected with the second clock signal input part of clock source selection circuit (6), and the clock signal output terminal of described clock source selection circuit (6) is connected with the clock signal input terminal of punctual unit (2) and the standard second pulse signal input terminal of each pulse output unit (4) simultaneously.
2. a kind of integrated automation converting station snowslide proving installation based on clock synchronization system according to claim 1, it is characterized in that described master microprocessor unit (5) comprises master microprocessor (5-1), keyboard circuit (5-2), LCD (5-3), first serial driver element (5-4), R5422 bus driver unit (5-6) and LED indicating circuit (5-7);
First serial port of described taxi microprocessor (5-1) is connected with the signal input output end of first serial driver element (5-4), the RS422 COM port of master microprocessor (5-1) is connected with the signal input output end of RS422 bus driver unit (5-6), the pilot lamp control signal output terminal of master microprocessor (5-1) is connected with the control signal input end of LED indicating circuit (5-7), the push button signalling input end of master microprocessor (5-1) is connected with the push button signalling output terminal of keyboard circuit (5-2), the liquid crystal display-driving cell signal output terminal of master microprocessor (5-1) is connected with the signal input part of LCD (5-3), first of master microprocessor (5-1), second, the third and fourth control signal output terminal is respectively first to fourth control signal output terminal of master microprocessor unit (5), the punctual control signal output terminal of master microprocessor (5-1) is the punctual control signal output terminal of master microprocessor unit (5), the signal output part of first serial driver element (5-4) is the serial communication signals end of master microprocessor unit (5), and the secondary signal input/output terminal of R5422 bus driver unit (5-6) is the pulse feedback signal input end of master microprocessor unit (5).
3. a kind of integrated automation converting station snowslide proving installation based on clock synchronization system according to claim 1 is characterized in that.The signal way of described pulse output unit (4) output more than or equal to 1 smaller or equal to 200.
4. a kind of integrated automation converting station snowslide proving installation based on clock synchronization system according to claim 1 is characterized in that, described N is smaller or equal to 10 integer more than or equal to 1.
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| CN 201320198178 CN203191484U (en) | 2013-04-18 | 2013-04-18 | Integrated automation substation avalanche testing device based on time synchronization system |
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| CN 201320198178 CN203191484U (en) | 2013-04-18 | 2013-04-18 | Integrated automation substation avalanche testing device based on time synchronization system |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103267906A (en) * | 2013-04-18 | 2013-08-28 | 国家电网公司 | Comprehensive automatic transformer substation snow slide testing device based on time synchronization system |
| CN104155557A (en) * | 2014-09-04 | 2014-11-19 | 国家电网公司 | Special testing device for remote signaling and remote control of transformer substation |
| CN110248374A (en) * | 2019-06-28 | 2019-09-17 | 京信通信系统（中国）有限公司 | Clock synchronous test system, method, apparatus and the storage medium of base station |
| CN113111815A (en) * | 2021-04-20 | 2021-07-13 | 广东电网有限责任公司电力科学研究院 | Transformer substation graph model checking method, device and equipment |
-
2013
- 2013-04-18 CN CN 201320198178 patent/CN203191484U/en not_active Expired - Lifetime
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103267906A (en) * | 2013-04-18 | 2013-08-28 | 国家电网公司 | Comprehensive automatic transformer substation snow slide testing device based on time synchronization system |
| CN103267906B (en) * | 2013-04-18 | 2015-06-17 | 国家电网公司 | Comprehensive automatic transformer substation snow slide testing device based on time synchronization system |
| CN104155557A (en) * | 2014-09-04 | 2014-11-19 | 国家电网公司 | Special testing device for remote signaling and remote control of transformer substation |
| CN104155557B (en) * | 2014-09-04 | 2017-02-01 | 国家电网公司 | Special testing device for remote signaling and remote control of transformer substation |
| CN110248374A (en) * | 2019-06-28 | 2019-09-17 | 京信通信系统（中国）有限公司 | Clock synchronous test system, method, apparatus and the storage medium of base station |
| CN110248374B (en) * | 2019-06-28 | 2022-05-03 | 京信网络系统股份有限公司 | Clock synchronization test system, method, device and storage medium of base station |
| CN113111815A (en) * | 2021-04-20 | 2021-07-13 | 广东电网有限责任公司电力科学研究院 | Transformer substation graph model checking method, device and equipment |
| CN113111815B (en) * | 2021-04-20 | 2024-05-10 | 广东电网有限责任公司电力科学研究院 | Transformer substation pattern verification method, device and equipment |
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