CN203180850U - Efficient digital audio power amplifier for mobile payment - Google Patents
Efficient digital audio power amplifier for mobile payment Download PDFInfo
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- CN203180850U CN203180850U CN 201320181444 CN201320181444U CN203180850U CN 203180850 U CN203180850 U CN 203180850U CN 201320181444 CN201320181444 CN 201320181444 CN 201320181444 U CN201320181444 U CN 201320181444U CN 203180850 U CN203180850 U CN 203180850U
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Abstract
The utility model discloses an efficient digital audio power amplifier for mobile payment. The efficient digital audio power amplifier comprises an analog/digital (A/D) converter, a single-chip microcomputer, a digital power amplifying chip, a driving circuit, an amplifying circuit, a low-pass filtering circuit and an analog audio output circuit. The signal output end of the A/D converter is connected with the input end of the digital power amplifying chip, the signal output end of the digital power amplifying chip is connected with the signal input end of the driving circuit, the signal output end of the driving circuit is connected with the signal input end of the amplifying circuit, the signal output end of the amplifying circuit is connected with the signal input end of the low-pass filtering circuit, the signal output end of the low-pass filtering circuit is connected with the signal input end of the analog audio output circuit, and a data port of the digital power amplifying chip is connected with a data port of the single-chip microcomputer. By means of the digital power amplifying chip, shoot-through loss and drain-source capacitance loss of a switch amplifier are reduced.
Description
Technical field
The utility model relates to a kind of power amplifier, particularly relates to a kind of high-efficiency digital audio-frequency power amplifier for mobile-phone payment.
Background technology
Along with the development of mobile technology with popularize, mobile-phone payment becomes emerging E-Payment service form gradually.Mobile-phone payment has characteristics such as mobility, promptness, personalization, convenience, as long as make the user hold mobile phone, just can finish transaction with various objects whenever and wherever possible.The data of announcing according to China Unionpay show that by the end of the year in 2011, China's mobile-phone payment customized user total amount broke through 2,100 ten thousand families, only the first half of the year in 2011, realize 6268.5 ten thousand of transaction, totally 170 hundred million yuan of payments.The data that Ministry of Industry and Information announces show that China's cellphone subscriber's quantity reached 7.47 hundred million families in 2011.This makes mobile-phone payment more and more be subjected to bank, mobile operator, businessman and consumer's favor.In recent years, along with the embodiment of mobile-phone payment advantage, the field of a lot of mobile-phone payments is progressively joining digitized ranks.Voice signal after the digitized processing is before arriving simulated power amplifier, must carry out the D/A conversion, in order to amplified by power amplifier, therefore from the process of fully digitalization, power amplifier digitlization pattern is imperative, however existing digital audio frequency power amplifier gang up loss and the drain-source capacity loss is bigger.
The utility model content
The purpose of this utility model be provide in order to address the above problem a kind of circuit simple, gang up loss and the little high-efficiency digital audio-frequency power amplifier that is used for mobile-phone payment of drain-source electric capacity.
The utility model is achieved through the following technical solutions:
A kind of high-efficiency digital audio-frequency power amplifier for mobile-phone payment, comprise A/D converter, single-chip microcomputer, the digital power amplifier chip, drive circuit, amplifying circuit, low-pass filter circuit, the analogue audio frequency circuit of output terminal, the signal output part of described A/D converter is connected with the input of described digital power amplifier chip, the signal output part of described digital power amplifier chip is connected with the signal input part of described drive circuit, the signal output part of described drive circuit is connected with the signal input part of described amplifying circuit, the signal output part of described amplifying circuit is connected with the signal input part of described low-pass filter circuit, the signal output part of described low-pass filter circuit is connected with the signal input part of described analogue audio frequency output circuit, and the FPDP of described digital power amplifier chip is connected with the FPDP of described single-chip microcomputer.
Particularly, described amplifying circuit comprises first amplifier, second amplifier, diode, first electric capacity, second electric capacity, first resistance, second resistance, the 3rd resistance, the 4th resistance, the 5th resistance and first potentiometer, one end of described first electric capacity is connected with the electrode input end of described first amplifier and first end of described first resistance respectively, the cathode output end of described first amplifier is connected with first end of described second resistance, second end of described second resistance is connected with the output of described first amplifier and first end of described second electric capacity respectively, second end of described second electric capacity is connected with first end of described first potentiometer, first end of the sliding end of described first potentiometer and described the 4th resistance is connected, second end of described the 4th resistance is connected with the negative input of described second amplifier, the electrode input end of described second amplifier respectively with first end of described the 3rd resistance, first end of the 5th resistance and the positive pole of diode are connected, and second end of the negative pole of described diode and described the 5th resistance is connected with the output of described second amplifier.
The beneficial effects of the utility model are:
By adopting the digital power amplifier chip, the utility model reduced reduced switching amplifier gang up loss and drain-source capacity loss, have simultaneously that circuit is simple, low cost and other advantages, be suitable in the mobile phone voice signal in the mobile phone payment process amplified and handle.
Description of drawings
Fig. 1 is the structured flowchart that the utility model is used for the high-efficiency digital audio-frequency power amplifier of mobile-phone payment;
Fig. 2 is the circuit diagram of amplifying circuit in the utility model.
Embodiment
The utility model is described in further detail below in conjunction with drawings and the specific embodiments:
As shown in Figure 1, the utility model is used for the high-efficiency digital audio-frequency power amplifier of mobile-phone payment, comprise A/D converter, single-chip microcomputer, the digital power amplifier chip, drive circuit, amplifying circuit, low-pass filter circuit, the analogue audio frequency output circuit, the signal output part of described A/D converter is connected with the input of described digital power amplifier chip, the signal output part of described digital power amplifier chip is connected with the signal input part of described drive circuit, the signal output part of described drive circuit is connected with the signal input part of described amplifying circuit, the signal output part of described amplifying circuit is connected with the signal input part of described low-pass filter circuit, the signal output part of described low-pass filter circuit is connected with the signal input part of described analogue audio frequency output circuit, and the FPDP of described digital power amplifier chip is connected with the FPDP of described single-chip microcomputer.
As shown in Figure 2, described amplifying circuit comprises the first amplifier A1, the second amplifier A2, diode VD, first capacitor C 1, second capacitor C 2, first resistance R 1, second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5 and the first potentiometer RP1, one end of described first capacitor C 1 is connected with first end of described first resistance R 1 with the electrode input end of the described first amplifier A1 respectively, the cathode output end of the described first amplifier A1 is connected with first end of described second resistance R 2, second end of described second resistance R 2 is connected with the output of the described first amplifier A1 and first end of described second capacitor C 2 respectively, second end of described second capacitor C 2 is connected with first end of the described first potentiometer RP1, the sliding end of the described first potentiometer RP1 is connected with first end of described the 4th resistance R 4, second end of described the 4th resistance R 4 is connected with the negative input of the described second amplifier A2, the electrode input end of the described second amplifier A2 respectively with first end of described the 3rd resistance R 3, first end of the 5th resistance R 5 is connected with the positive pole of diode VD, and second end of the negative pole of described diode VD and described the 5th resistance R 5 is connected with the output of the described second amplifier A2.
Claims (2)
1. high-efficiency digital audio-frequency power amplifier that is used for mobile-phone payment, it is characterized in that: comprise A/D converter, single-chip microcomputer, the digital power amplifier chip, drive circuit, amplifying circuit, low-pass filter circuit, the analogue audio frequency output circuit, the signal output part of described A/D converter is connected with the input of described digital power amplifier chip, the signal output part of described digital power amplifier chip is connected with the signal input part of described drive circuit, the signal output part of described drive circuit is connected with the signal input part of described amplifying circuit, the signal output part of described amplifying circuit is connected with the signal input part of described low-pass filter circuit, the signal output part of described low-pass filter circuit is connected with the signal input part of described analogue audio frequency output circuit, and the FPDP of described digital power amplifier chip is connected with the FPDP of described single-chip microcomputer.
2. according to requiring 1 described high-efficiency digital audio-frequency power amplifier for mobile-phone payment in the right, it is characterized in that: described amplifying circuit comprises first amplifier, second amplifier, diode, first electric capacity, second electric capacity, first resistance, second resistance, the 3rd resistance, the 4th resistance, the 5th resistance and first potentiometer, one end of described first electric capacity is connected with the electrode input end of described first amplifier and first end of described first resistance respectively, the cathode output end of described first amplifier is connected with first end of described second resistance, second end of described second resistance is connected with first end of the output of described first amplifier and described second electric capacity, second end of described second electric capacity is connected with first end of described first potentiometer, first end of the sliding end of described first potentiometer and described the 4th resistance is connected, second end of described the 4th resistance is connected with the negative input of described second amplifier, the electrode input end of described second amplifier respectively with first end of described the 3rd resistance, first end of the 5th resistance and the positive pole of diode are connected, and second end of the negative pole of described diode and described the 5th resistance is connected with the output of described second amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320181444 CN203180850U (en) | 2013-04-11 | 2013-04-11 | Efficient digital audio power amplifier for mobile payment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320181444 CN203180850U (en) | 2013-04-11 | 2013-04-11 | Efficient digital audio power amplifier for mobile payment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203180850U true CN203180850U (en) | 2013-09-04 |
Family
ID=49077504
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201320181444 Expired - Fee Related CN203180850U (en) | 2013-04-11 | 2013-04-11 | Efficient digital audio power amplifier for mobile payment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203180850U (en) |
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2013
- 2013-04-11 CN CN 201320181444 patent/CN203180850U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130904 Termination date: 20140411 |