CN203057283U - A narrow-band ISDN chip testing device - Google Patents

A narrow-band ISDN chip testing device Download PDF

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Publication number
CN203057283U
CN203057283U CN 201220736782 CN201220736782U CN203057283U CN 203057283 U CN203057283 U CN 203057283U CN 201220736782 CN201220736782 CN 201220736782 CN 201220736782 U CN201220736782 U CN 201220736782U CN 203057283 U CN203057283 U CN 203057283U
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China
Prior art keywords
unit
testing
chip
self
logic control
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Expired - Fee Related
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CN 201220736782
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Chinese (zh)
Inventor
刘文红
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Beijing Jiaxun Feihong Electrical Co Ltd
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Beijing Jiaxun Feihong Electrical Co Ltd
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Priority to CN 201220736782 priority Critical patent/CN203057283U/en
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Abstract

The utility model discloses a narrow-band ISDN chip testing device. In the testing device, a logic control unit is connected with a central processing unit, a self-testing unit, and a unit to be tested. A feedback unit is connected with the central processing unit, the logic control unit, the self-testing unit, and the unit to be tested. The self-testing unit is connected with the central processing unit which controls the self-testing unit and the unit to be tested to transmit a testing signal to the logic control unit. The logic control unit receives and compares the testing signal and feeds back a comparative result to the feedback unit. The testing device is suitable for detection, selection, and fault detection of narrow-band ISDN chips and has characteristics of a convenient using mode, a flexible detection mode, and high reliability.

Description

Narrowband ISDN chip testing device
Technical Field
The utility model relates to a chip testing arrangement especially relates to a testing arrangement for narrowband ISDN chip, belongs to digital communication technical field.
Background
Narrow-band ISDN (integrated services digital network), commonly known as "one-wire line". Besides being used for making a call, the system can also provide a plurality of services such as video telephone, data communication, video conference and the like for users, thereby integrating a plurality of services such as telephone, fax, data, images and the like into a unified digital network for transmission and processing. The network access user can connect different terminals through a pair of telephone lines to carry out different types of service communication.
The narrow-band ISDN provides the user with the basic rate (2B + D, 144 kbps), and the corresponding basic rate interface comprises two B-channels (64 kbps) which are capable of operating independently, and one D-channel (16 kbps), wherein the B-channel is typically used for transmitting voice, data and images, and the D-channel is used for transmitting signaling and other information. Figure 1 shows the transmission signal pattern of a narrow band ISDN. Since the narrow-band ISDN line is a digital line, the effect of making calls (including voice over internet protocol) with it is clearer and more reliable than analog telephony. With the rapid development of broadband communication and optical fiber communication technologies, narrowband ISDN has gradually faded the view of people. However, in some private communication equipment, the performance of narrowband ISDN transmitting 5 km over its single twisted pair is still a strong ground. The 2B + D mode is still used for transmitting scheduling communication information in scheduling communication systems such as railways, military and the like.
Currently, most of the integrated circuit chips transmitting 2B + D signals are TP3410 and MC145572, and both of these chips have been off-production for many years. Therefore, the quality of the two chips in the market is not uniform, and the working performance of the chips cannot be guaranteed. In order to conveniently and rapidly detect the two chips and ensure the quality and reliability of products, it is necessary to develop a device for testing the two chips.
Disclosure of Invention
The utility model provides a problem provide a narrowband ISDN chip test device (be referred to testing arrangement for short). The working performance of the narrow-band ISDN chip can be tested quickly by applying the testing device.
In order to achieve the purpose, the technical scheme adopted by the utility model is as follows:
a narrowband ISDN chip testing device is characterized in that:
the narrow-band ISDN chip testing device comprises a central processing unit, a logic control unit, a self-testing unit, a unit to be tested and a feedback unit; wherein,
the logic control unit is respectively connected with the central processing unit, the self-testing unit and the unit to be tested;
the feedback unit is respectively connected with the central processing unit, the logic control unit, the self-testing unit and the unit to be tested;
the self-testing unit is connected with the central processing unit;
the central processing unit controls the self-testing unit and the unit to be tested to transmit testing signals to the logic control unit, the logic control unit receives and compares the testing signals, and the comparison result is fed back to the feedback unit.
Preferably, the self-test unit comprises a TP3410 chip and an MC145572 chip;
the TP3410 chip is respectively connected with the central processing unit and the logic control unit;
the MC145572 chip is connected to the logic control unit and the feedback unit, respectively.
Wherein preferably, the feedback unit is an LED display device.
Preferably, the narrowband ISDN chip testing apparatus further comprises a restart unit, which is used for implementing system restart in a dead-card state.
Preferably, the narrowband ISDN chip testing device further comprises a relay combination, and the relay combination is respectively connected with the self-testing unit and the unit to be tested and used for controlling the on-off of the self-testing chip and the chip to be tested.
The utility model is suitable for a narrow band ISDN chip put in storage and detect, screening and fault detection etc. have following technical characterstic:
1. the test method can test the TP3410 chip and the MC145572 chip, and the chips do not need to be welded during testing and do not damage chip pins;
2. the test is convenient and quick;
3. the test result is visually displayed through the LED and is clear at a glance;
4. through the CPU and the logic control unit, the relay combination can be flexibly controlled to realize the performance test of the self-test unit and the unit to be tested.
Drawings
Fig. 1 is a schematic diagram of the pattern of 2B + D transmission signals in a narrowband ISDN;
fig. 2 is a schematic diagram of the narrow-band ISDN chip testing apparatus provided by the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Fig. 2 is a schematic diagram of the narrow-band ISDN chip testing apparatus provided by the present invention. The test device comprises a central processing unit, a logic control unit, a self-test unit, a unit to be tested and a feedback unit. The logic control unit is respectively connected with the central processing unit, the self-testing unit and the unit to be tested; the feedback unit is connected with the central processing unit, the logic control unit, the self-testing unit and the unit to be tested through a CPU bus; the self-testing unit is connected with the central processing unit. The central processing unit controls the self-testing unit and the unit to be tested to transmit testing signals to the logic control unit, the logic control unit receives the testing signals transmitted by the self-testing unit and the unit to be tested, compares the testing signals and feeds a comparison result back to the feedback unit.
In fig. 2, the logic control unit is connected to the self-test unit and the unit under test through signal lines 2, 3, 4, and 5, respectively. The signal lines 2, 3, 4, and 5 are used for transmitting not only control signals of the control bus and PCM signals of the PCM bus, but also clock signals. And the restarting unit (RESET) respectively controls the logic control unit and the central processing unit and is used for realizing the system restarting under the dead-locked state of the testing device. In addition, the testing device also comprises a relay combination. The relay combination is directly connected with the self-testing unit and the unit to be tested, and the central processing unit and the logic control unit can flexibly set the state of the relay combination, so that the on-off control of the self-testing chip and the chip to be tested is realized.
The Central Processing Unit (CPU) is used for controlling the message transmission among the logic control unit, the self-testing unit, the unit to be tested and the feedback unit, and is responsible for finishing the cooperation and management work among all units of the testing device and realizing the chip testing function. The logic control unit is realized by FPGA, and the unit completes the processing and detection of PCM signals between the two chips of the self-test unit and the two chips of the unit to be tested through the control signal of the CPU, thereby realizing the logic function of the test device. The self-test unit comprises a TP3410 chip and an MC145572 chip; the TP3410 chip is respectively connected with the central processing unit and the logic control unit, the MC145572 chip is respectively connected with the logic control unit and the feedback unit, and the units can realize the function and performance test of the self-contained chip. The unit to be tested consists of interfaces of two chips to be tested and is used for placing the chips to be tested and testing the functions and the performances of the chips to be tested. The chips to be tested may be two TP3410 chips, two MC145572 chips (shown in fig. 2), one TP3410 chip, and one MC145572 chip. The feedback unit is an LED display device and is used for displaying information such as the test state, the test result and the like of the narrow-band ISDN chip.
When the chip function and performance test is carried out, the TP3410 chip and the MC145572 chip of the test device form a pair, and any one of the chips can be set to LT (line termination) or NT (network termination) mode. Typically, one of the chips is configured in the LT mode and the other chip is configured in the NT mode. Both narrow-band ISDN chips have analog interface, PCM interface and control interface. In an embodiment of the present invention, the connection mode of each interface is as follows: the analog interfaces of each pair of chips are interconnected through twisted-pair lines, the PCM interfaces are connected to the logic control unit, and the control interfaces are respectively connected to the logic control unit and the central processing unit. After the handshaking of a pair of narrow-band ISDN chips which are respectively set to LT mode and NT mode is successful, the PCM signal at any side is converted into an analog signal, the analog signal is transmitted to an analog interface at the opposite end through a twisted pair, and the analog signal is converted into the PCM signal through the narrow-band ISDN chip, thereby completing the transmission of voice, data and signaling. And the quality of a certain narrow-band ISDN chip can be judged through a signal transmission result.
The above has described the narrowband ISDN chip test device provided by the present invention in detail. Any obvious modifications to the above would be obvious to those of ordinary skill in the art, without departing from the spirit of the present invention, and it is intended to constitute a violation of the patent rights of the present invention and to bear the relevant legal responsibility.

Claims (5)

1. A narrowband ISDN chip testing device is characterized in that:
the narrow-band ISDN chip testing device comprises a central processing unit, a logic control unit, a self-testing unit, a unit to be tested and a feedback unit; wherein,
the logic control unit is respectively connected with the central processing unit, the self-testing unit and the unit to be tested;
the feedback unit is respectively connected with the central processing unit, the logic control unit, the self-testing unit and the unit to be tested;
the self-testing unit is connected with the central processing unit;
the central processing unit controls the self-testing unit and the unit to be tested to transmit testing signals to the logic control unit, the logic control unit receives and compares the testing signals, and the comparison result is fed back to the feedback unit.
2. The narrowband ISDN chip test apparatus of claim 1, wherein:
the self-test unit comprises a TP3410 chip and an MC145572 chip;
the TP3410 chip is respectively connected with the central processing unit and the logic control unit;
the MC145572 chip is connected to the logic control unit and the feedback unit, respectively.
3. The narrowband ISDN chip test apparatus of claim 1, wherein:
the feedback unit is an LED display device.
4. The narrowband ISDN chip test apparatus of claim 1, wherein:
the narrowband ISDN chip testing device also comprises a restarting unit which is used for restarting a system in a dead-card state.
5. The narrowband ISDN chip test apparatus of claim 1, wherein:
the narrow-band ISDN chip testing device also comprises a relay combination, wherein the relay combination is respectively connected with the self-testing unit and the unit to be tested and is used for controlling the on-off of the self-testing chip and the chip to be tested.
CN 201220736782 2012-12-27 2012-12-27 A narrow-band ISDN chip testing device Expired - Fee Related CN203057283U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201220736782 CN203057283U (en) 2012-12-27 2012-12-27 A narrow-band ISDN chip testing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201220736782 CN203057283U (en) 2012-12-27 2012-12-27 A narrow-band ISDN chip testing device

Publications (1)

Publication Number Publication Date
CN203057283U true CN203057283U (en) 2013-07-10

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Country Status (1)

Country Link
CN (1) CN203057283U (en)

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20130710

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CF01 Termination of patent right due to non-payment of annual fee