CN202948915U - High density hybrid integrated circuit - Google Patents
High density hybrid integrated circuit Download PDFInfo
- Publication number
- CN202948915U CN202948915U CN 201220636873 CN201220636873U CN202948915U CN 202948915 U CN202948915 U CN 202948915U CN 201220636873 CN201220636873 CN 201220636873 CN 201220636873 U CN201220636873 U CN 201220636873U CN 202948915 U CN202948915 U CN 202948915U
- Authority
- CN
- China
- Prior art keywords
- ceramic substrate
- bonding
- integrated circuit
- high density
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model discloses a high density hybrid integrated circuit. The high density hybrid integrated circuit comprises a device tube case base, a ceramic substrate, base pins, a conduction band/bonding area, semiconductor chips, a stop band and chip components, the conduction band/bonding area, the semiconductor chips, the stop band and the chip components are attached to the ceramic substrate, each component is provided with an internal lead for bonding, the ceramic substrate is fixed on the tube case base, the tube case base is provided with the base pins, more than one small substrate is vertically integrated on the ceramic substrate, more than one semiconductor chip or chip component is integrated on front and reverse surfaces of the small substrate and provided with internal leads for bonding, pins which are externally and electrically connected are fixed at the same end of the ceramic substrate respectively from two sides of the ceramic substrate in a thin film or thick film mode, and the bonding area utilizes a golden ball for bonding. According to the high density hybrid integrated circuit, three-dimension vertical integration is utilized, more than one semiconductor chip or chip component is vertically integrated on the same base substrate, high density three-dimension integration is achieved, and the integration level of the hybrid integrated circuit is improved.
Description
Technical field
The utility model relates to integrated circuit, in particular to hybrid integrated circuit, furthermore, relates to the high density hybrid integrated circuit.
Background technology
In the integrated technology of original hybrid circuit, adopt the two dimensional surface integrated technology integrated of the mixing of ceramic substrate, semiconductor chip, other chip components and parts are directly filled be attached on thick film or film substrate, adopt again bonding wire (spun gold or Si-Al wire) to carry out Bonding, complete whole electrical equipment and connect, in specific atmosphere, Guan Ji and pipe cap are sealed to form at last.Original technology Main Problems is: because being adopts the two dimensional surface integrated technology, semiconductor chip, other chip components and parts mount on ceramic substrate with the largest face direction, the Bonding of chip and substrate needs certain span from a solder joint to another solder joint, add the requirement that also needs on substrate according to physical circuit and make necessary film or film resistor, film or thin-film capacitor, film or thin film inductor etc., therefore, the chip attachment limited amount of substrate surface, integrated chip efficient is subjected to the impact of chip area, and chip integration is difficult to improve.
Through retrieval, the Chinese patent application part that relates to high density integrated circuit is many, as No. 99813068.0 " high density integrated circuit ", No. 02121825.0 " high-density IC package structure and method thereof ", No. 200410063042.6 " high density integrated circuit ", No. 201010141336.1 " high density integrated circuit module structure ", No. 201110334691.5 " a kind of high-density integrated circuit package structure, method for packing and integrated circuits " etc.But there is no the application part of high density hybrid integrated circuit.
Summary of the invention
The purpose of this utility model is to provide the high density hybrid integrated circuit, and chip-count, other chip components and parts quantity with can be integrated on increase substrate unit are reach the purpose that promotes the hybrid integrated circuit integration density.
The high density hybrid integrated circuit that the designer provides, to adopt three-dimensional vertical vertical integrated method to realize, its structure comprises device package pedestal, ceramic substrate, pin, conduction band/bonding region, semiconductor chip, stopband, chip components and parts, wherein conduction band/bonding region, semiconductor chip, stopband, chip components and parts all are attached on ceramic substrate, and each assembly has leading wire bonding; Ceramic substrate is fixed on the shell pedestal; The shell pedestal has pin; What be different from original hybrid integrated circuit is, also vertically is integrated with more than one little substrate on ceramic substrate, and the positive and negative of described little substrate is integrated with an above semiconductor chip or chip components and parts, and leaded bonding semiconductor chip; All pins that externally are electrically connected are fixed on respectively the same end of ceramic substrate in the mode of film or thick film from the two sides of ceramic substrate, and form gold goal on bonding region.
Above-mentioned little substrate is that the mode that adopts eutectic welding or gold ball bond, insulating adhesive to reinforce vertically is integrated on base substrate.
After above-mentioned gold goal employing spun gold ball bonding or screen-printed metal slurry, the method for use reflow welding forms.
The designer points out, above-mentioned chip components and parts are other chip components and parts that do not comprise semiconductor chip.
The utility model has the advantages that: 1. adopt three-dimensional vertically vertically integrated, an above semiconductor chip or other chip components and parts vertically can be integrated on same base substrate, realize that density three-dimensional is integrated, greatly improve the integrated level of hybrid integrated circuit; 2. due to can integrated more semiconductor chip, other chip components and parts, thereby can integrated more function; 3. can reduce the complete machine application system and use the quantity of electronic devices and components, thereby reduce the volume of complete machine, improve the reliability of application system; 4. owing to adopting High Density Integration, greatly shorten wire length, can further improve operating frequency and the reliability of hybrid integrated circuit.
Adopt the device of the utility model production to be widely used in the fields such as space flight, aviation, boats and ships, precision instrument, communication, Industry Control, be specially adapted to change system miniaturization, highly reliable field, have wide market prospects and application space.
Description of drawings
Fig. 1 is the structural representation of high density hybrid integrated circuit of the present utility model.
In figure, 1 is the shell pedestal, and 2 is ceramic substrate, and 3 is pin, and 4 is conduction band/bonding region, and 5 is semiconductor chip, and 6 is stopband, and 7 is chip components and parts, and 8 is insulating adhesive, and 9 is gold goal, and 10 is little substrate, and 11 is lead.
Embodiment
Embodiment:
The shake high density hybrid integrated circuit of magnificent honourable semiconductor company research and development of Guizhou, take high density thick film hybrid integrated circuit technique as example, structure is as follows:
This high density hybrid integrated circuit comprises device package pedestal 1, ceramic substrate 2, pin 3, conduction band/bonding region 4, semiconductor chip 5, stopband 6, chip components and parts 7, wherein conduction band/bonding region 4, semiconductor chip 5, stopband 6, chip components and parts 7 all are attached on ceramic substrate 2, and each assembly has lead 11 bondings; Ceramic substrate 2 is fixed on shell pedestal 1; Pin 3 is arranged on shell pedestal 1; Also vertically be integrated with 2 little substrates 10 with insulating adhesive 8 is fixing on ceramic substrate 2, the positive and negative of described little substrate 10 is integrated with an above semiconductor chip or chip components and parts, and leaded bonding semiconductor chip 5; All pins that externally are electrically connected are fixed on respectively the same end of ceramic substrate 2 in the mode of film or thick film from the two sides of little substrate 10, bonding region gold goal 9 bondings.
Claims (3)
1. high density hybrid integrated circuit, this circuit comprises device package pedestal (1), ceramic substrate (2), pin (3), conduction band/bonding region (4), semiconductor chip (5), stopband (6), chip components and parts (7), wherein conduction band/bonding region (4), semiconductor chip (5), stopband (6), chip components and parts (7) all are attached on ceramic substrate (2), and each assembly has lead (11) bonding; Ceramic substrate (2) is fixed on shell pedestal (1); Pin (3) is arranged on shell pedestal (1); It is characterized in that also vertically being integrated with more than one little substrate (10) on ceramic substrate, the positive and negative of described little substrate (10) is integrated with an above semiconductor chip or chip components and parts, and lead (11) bonding is arranged; All pins that externally are electrically connected are fixed on respectively the same end of ceramic substrate (2) in the mode of film or thick film from the two sides of ceramic substrate (2), bonding region gold goal (9) bonding.
2. high density hybrid integrated circuit as described in claim 1, is characterized in that described little substrate (10) is to adopt eutectic welding manner or vertical integrated with the mode of gold ball bond (9), insulating adhesive (8) reinforcing.
3. high density hybrid integrated circuit as described in claim 1, is characterized in that described gold goal (9) is to use the method for reflow welding to form after adopting spun gold ball bonding or screen-printed metal slurry.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220636873 CN202948915U (en) | 2012-11-28 | 2012-11-28 | High density hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220636873 CN202948915U (en) | 2012-11-28 | 2012-11-28 | High density hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202948915U true CN202948915U (en) | 2013-05-22 |
Family
ID=48424605
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220636873 Expired - Fee Related CN202948915U (en) | 2012-11-28 | 2012-11-28 | High density hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202948915U (en) |
-
2012
- 2012-11-28 CN CN 201220636873 patent/CN202948915U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130522 Termination date: 20181128 |