CN202918402U - Circuit reset system of television set - Google Patents
Circuit reset system of television set Download PDFInfo
- Publication number
- CN202918402U CN202918402U CN 201220512575 CN201220512575U CN202918402U CN 202918402 U CN202918402 U CN 202918402U CN 201220512575 CN201220512575 CN 201220512575 CN 201220512575 U CN201220512575 U CN 201220512575U CN 202918402 U CN202918402 U CN 202918402U
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- circuit
- signal processing
- digital signal
- reset
- microprocessor
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Abstract
The utility model discloses a circuit reset system of a television set, comprising a microprocessor and a detection circuit. The detection circuit detects the power supply state of a digital signal processing circuit, and outputs a corresponding detection result to the microprocessor; and according to the detection result, the microprocessor correspondingly outputs a reset signal to the digital signal processing circuit. The circuit reset system can reset the digital signal processing circuit the moment that the digital signal processing circuit is cut off, thereby improving the work performance of the digital signal processing circuit; and only one detection circuit is increased in the system, so that the circuit reset system for the television set is simple in structure, can achieve working reliability of the circuit with relatively low cost, and has broad market prospect.
Description
[technical field]
The utility model relates to television set, relates in particular to a kind of TV set circuit resetting system.
[background technology]
The digit chip that uses in the color television set now is more and more, and when electrical network instant cut-off or high-speed switch power supply, digital circuit partly is easy to the malreduction problem occur, thereby causes system works disorderly.
When system power failure, the MCU power supply drops to certain amplitude thereupon, and reset circuit resets MCU.After the MCU power supply was again normal, MCU reinitialized, and sent reset signal to other circuit (especially digital signal processing circuit) of system.Because the MCU source current is very little, and the electric current of digital signal processing circuit part power supply is very large, with respect to the power-supply fluctuation of same amplitude, the digital signal processing circuit power supply is faster than MCU power down.When system's instant power-down, the power down of digital signal processing circuit power supply very likely appears, and the MCU power supply does not have the phenomenon of power down, at this time MCU is not because power supply has power down, oneself can not reset, also can not know the digital signal processing circuit power supply moment undesired, can not send reset signal to digital signal processing circuit, at this time digital signal processing circuit is not easy to occur the disorderly problem of work owing to resetting.
[utility model content]
The technical problems to be solved in the utility model provides a kind of TV set circuit resetting system, when power down, can digital signal processing circuit be resetted, thereby guarantees the digital signal processing circuit normal operation.
The utility model is to realize by following technical scheme:
A kind of TV set circuit resetting system, comprise: microprocessor and testing circuit, described testing circuit detects the power supply status of digital signal processing circuit, and export corresponding testing result for described microprocessor, microprocessor is correspondingly exported a reset signal to digital signal processing circuit according to testing result; Described testing circuit is a pulse generating circuit, the input of described pulse generating circuit connects the power supply of described digital signal processing circuit, its output connects the RESET input of microprocessor, and the reset output terminal of microprocessor links to each other with the RESET input of digital signal processing circuit; The RESET input of described microprocessor and its reset output terminal are same port.
Owing to adopting above technical scheme, the utility model can be in the moment of digital signal processing circuit power down, in time digital signal processing circuit is resetted, improved the service behaviour of digital signal processing circuit, guarantee the digital signal processing circuit normal operation; System of the present utility model only increases a testing circuit, and is simple in structure, easily realizes, can bring at lower cost the reliability of circuit working, has wide market prospects.
[description of drawings]
Fig. 1 is the system block diagram that digital circuit is resetted of the present utility model.
Fig. 2 is the part physical circuit figure of system of the present utility model.
[embodiment]
Below in conjunction with drawings and Examples the utility model is further set forth:
As shown in Figure 1, TV set circuit resetting system of the present utility model, comprise: Micro-processor MCV, pulse generating circuit, the input of described pulse generating circuit connects the power supply of described digital signal processing circuit, its output connects the RESET input of microprocessor, and the reset output terminal of microprocessor links to each other with the RESET input of digital signal processing circuit.Wherein, the RESET input of microprocessor and its reset output terminal can be same ports, also can be different ports.Pulse generating circuit is equivalent to a testing circuit, it detects the power supply status that detects digital signal processing circuit, and export corresponding electric pulse for described microprocessor, microprocessor is according to the electric pulse that receives, judge the current state that whether is in power down of digital signal processing circuit, if be in power-down state, then microprocessor is correspondingly exported a reset signal to digital signal processing circuit, otherwise, not to digital signal processing circuit output reset signal.
As shown in Figure 2, digital signal processing circuit has two, is designated as: digital signal processing circuit 1 and digital signal processing circuit 2 (reset terminal is Reset), and adopting respectively model is the chip of PW1239 and PW2300; The model of Micro-processor MCV is TMP91.Micro-processor MCV has two ends that reset (Reset1 and Reset2), be connected with the RESET input that digital signal processing circuit 1 is connected with digital signal processing circuit respectively, wherein, also as the RESET input of Micro-processor MCV, this end is used for the electric impulse signal of received pulse circuit for generating to the Reset1 port.
Pulse generating circuit comprises the first to the 4th resistance (R1, R2, R3, R4), voltage stabilizing didoe D1 and triode Q1; The emitter of described triode Q1 is as the input of pulse generating circuit, the power supply of this termination digital signal processing circuit; The two ends of the series arm of the first resistance R 1 and the second resistance R 2 are connected on the emitter and base stage of triode Q1; The collector electrode of described triode Q1 is by the 3rd resistance R 3 ground connection; One end of the 4th resistance R 4 is as the output of pulse generating circuit, and the other end is connected on the collector electrode of triode Q1; The plus earth of described voltage stabilizing didoe D1, its negative electrode are connected on the tie point of the first resistance R 1 and the second resistance R 2.Pulse generating circuit has a variety of implementations, does not just enumerate one by one here.
When system's normal boot-strap and normal operation, send according to actual needs various reset signals by Micro-processor MCV.During the system instant power-down, the thereupon power down of the power supply of digital signal processing circuit, electric pulse of pulse generating circuit output.Micro-processor MCV sends reset signal one time to system after detecting the electric pulse that pulse generating circuit sends again, and whole system reinitializes, and guarantees that system can not occur because the disorder that power down occurs.When Micro-processor MCV output reset pulse, the Reset1 port switches to output state, other the time all switch to input state.
What need to be illustrated is, pulse generating circuit generally is connected on the fastest power supply of system power failure, can connect one the tunnel, also can connect multiple power supplies, and guaranteeing can the sensitive system power failure situation that detects.Connection between digital signal processing circuit, Micro-processor MCV, the pulse generating circuit both can share a line, also can use separately independently line, can both realize the purpose of this utility model.
In sum, the utility model can solve the instant power-down of color television set and the system disorders problem that causes owing to not resetting that occur with very low cost.
Claims (3)
1. TV set circuit resetting system, it is characterized in that: comprising: microprocessor and testing circuit, described testing circuit detects the power supply status of digital signal processing circuit, and export corresponding testing result for described microprocessor, microprocessor is correspondingly exported a reset signal to digital signal processing circuit according to testing result; Wherein said testing circuit is a pulse generating circuit, the input of described pulse generating circuit connects the power supply of described digital signal processing circuit, its output connects the RESET input of microprocessor, and the reset output terminal of microprocessor links to each other with the RESET input of digital signal processing circuit; The RESET input of described microprocessor and its reset output terminal are same port.
2. TV set circuit resetting system according to claim 1, it is characterized in that: described pulse generating circuit comprises the first to the 4th resistance (R1, R2, R3, R4) and a triode (Q1); The emitter of described triode (Q1) is as the input of pulse generating circuit, and the two ends of the series arm of the first resistance (R1) and the second resistance (R2) are connected on the emitter and base stage of triode (Q1); The collector electrode of described triode (Q1) is by the 3rd resistance (R3) ground connection; One end of the 4th resistance (R4) is as the output of pulse generating circuit, and the other end is connected on the collector electrode of triode (Q1).
3. TV set circuit resetting system according to claim 2, it is characterized in that: described pulse generating circuit also comprises voltage stabilizing didoe (D1), the plus earth of described voltage stabilizing didoe (D1), its negative electrode are connected on the tie point of the first resistance (R1) and the second resistance (R2).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201220512575 CN202918402U (en) | 2012-09-29 | 2012-09-29 | Circuit reset system of television set |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201220512575 CN202918402U (en) | 2012-09-29 | 2012-09-29 | Circuit reset system of television set |
Publications (1)
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CN202918402U true CN202918402U (en) | 2013-05-01 |
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Family Applications (1)
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CN 201220512575 Expired - Fee Related CN202918402U (en) | 2012-09-29 | 2012-09-29 | Circuit reset system of television set |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106095042A (en) * | 2016-06-06 | 2016-11-09 | 乐视控股(北京)有限公司 | Protection device and electronic equipment for electronic equipment |
-
2012
- 2012-09-29 CN CN 201220512575 patent/CN202918402U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106095042A (en) * | 2016-06-06 | 2016-11-09 | 乐视控股(北京)有限公司 | Protection device and electronic equipment for electronic equipment |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130501 Termination date: 20130929 |