CN202759439U - Positioning and distance finding receiver - Google Patents

Positioning and distance finding receiver Download PDF

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Publication number
CN202759439U
CN202759439U CN 201220279247 CN201220279247U CN202759439U CN 202759439 U CN202759439 U CN 202759439U CN 201220279247 CN201220279247 CN 201220279247 CN 201220279247 U CN201220279247 U CN 201220279247U CN 202759439 U CN202759439 U CN 202759439U
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China
Prior art keywords
input
output
frequency mixer
another
parallel
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Expired - Lifetime
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CN 201220279247
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Chinese (zh)
Inventor
张文生
徐克兴
申江
姚华
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Dfine Technology Co Ltd
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Dfine Technology Co Ltd
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Abstract

A positioning and distance finding receiver of the utility model relates to the technical field of electronic communication, and aims to solve the technical problems of the large size, the small distance finding scope, the poor accuracy and the like existing in the current products. The positioning and distance finding receiver of the utility model comprises a power supply, a receiving channel module (62), a digital processing module (63), and a local oscillation module (64). The positioning and distance finding receiver is applicable to the technical field of electronic communication which needs to carry out indoor accurate positioning and distance finding.

Description

Location and ranging receiver
Technical field
The utility model relates to communication technical field, particularly a kind of receiver be used to needing indoor accurate position and range finding.
Background technology
Indoor accurate position and range finding have a wide range of applications in the manufacturing of industrial enterprise is produced, and except being used for measuring main equipment, factory building, the mobile production line, this type of application also begins to occur growth trend in fields such as amusement, game at present.But currently marketed indoor short-range transmitter and receiver adopt infrared mode to communicate more, and its shortcoming is:
1. system bulk is large;
2. finding range is little;
3. low precision;
4. reaction speed is slow;
5. anti-interference is poor.
Yet there are no use the radio communication mode be used for indoor short-range transmitter and receiver.
Summary of the invention
The utility model is intended to solve that the system bulk that exists in existing location and the ranging receiver product is large, finding range is little, low precision, reaction speed wait technical problem slowly, a kind of integrated level is high, anti-interference is good to provide, cooperate that corresponding transmitter can provide that accurate location and range finding, volume are little, lightweight, finding range greatly, high stability, location and ranging receiver that precision is high.
The purpose of this utility model is achieved through the following technical solutions.
Location of the present utility model and ranging receiver are made of power supply, receiving channel module 62, digital signal processing module 63, local oscillator module 64; The antenna 60 of receiving channel module 62 connects the input of antenna selection switch 1, be divided into two-way output behind the latter's output serial connection low noise amplifier 2, band pass filter 3, the transformer 61, export respectively two inputs that radiofrequency signal enters the differential amplifier 5 of digital signal processing module 62, an input of the output frequency mixer 1 in parallel of differential amplifier 5, an input of frequency mixer 28, another input of its another output frequency mixer 1 in parallel, another input of frequency mixer 28; 90-degree phase shifter 7 connects respectively frequency mixer 1, frequency mixer 28 and amplifier 2 10; The quantity of antenna 60 is 6, and the input of antenna selection switch 1 connects the output of 6 antenna switch controllers 56;
The output of frequency mixer 1 connects the input of amplifier 1, be connected with an input of variable gain amplifier 1 behind the latter's the output serial connection low pass filter 1, be connected with an input of AD sampler 22 behind the latter's the output serial connection low pass filter 3 18;
The output of frequency mixer 28 connects the input of amplifier 3 11, be connected with an input of variable gain amplifier 2 17 behind the latter's the output serial connection low pass filter 2 15, be connected with another input of AD sampler 22 behind the latter's the output serial connection low pass filter 4 19;
Input of an input of an output parallel filter 1 of AD sampler 22, an input of frequency mixer 3 42, frequency mixer 5 44 and an input of frequency mixer 7 46;
Input of an input of another input of another output parallel filter 1 of AD sampler 22, frequency mixer 4 43, frequency mixer 6 45 and an input of frequency mixer 8 47;
The output of filter 1 connects the input of AGC controller 24, another input of the latter's output variable gain amplifier 1 in parallel and another input of variable gain amplifier 2 17;
Frequency mixer 3 42 is connected 43 output and is connected respectively an input of filter 2 25 with frequency mixer, the output of filter 2 25 connects the input of decimator 1, input of the latter's output phase discriminator 31 in parallel and an input of code grabber 32;
Frequency mixer 5 44 is connected 45 output and is connected respectively an input of filter 3 27 with frequency mixer, the output of filter 3 27 connects the input of decimator 2 28, another input of another input of the latter's output phase discriminator 31 in parallel and code grabber 32;
The output of frequency mixer 7 46 connects the input of decimator 3 29, the latter's output carrier frequency in parallel and an input of phase tracker 38, an input of carrier phase measurement device 39, an input of data demodulator 40;
The output of frequency mixer 8 47 connects the input of decimator 4 30, the latter's output carrier frequency in parallel and another input of phase tracker 38, another input of carrier phase measurement device 39, another input of data demodulator 40;
The output of carrier frequency and phase tracker 38 is connected with the input of the signal source 50 of local oscillator module 64; The 3rd input of carrier phase measurement device 39, the 3rd input of data demodulator 40 all are connected with read-write bus 41;
Be connected with the input of digital controlled oscillator NCO34 behind the output serial connection code tracking loop path filter 33 of phase discriminator 31; The output of code grabber 32 is connected with another input of digital controlled oscillator NCO34;
Another input of advanced code output 35 frequency mixers 4 43 in parallel of digital controlled oscillator NCO34, another input of frequency mixer 3 42; Its lag behind another input of code output 36 frequency mixers 6 45 in parallel, another input of frequency mixer 5 44; It aims at another input of code output 37 frequency mixers 8 47 in parallel, another input of frequency mixer 7 46;
The output of signal source 50 is connected with the input of phase-locked loop 51, be connected with an input of voltage controlled oscillator VCO 53 behind the output serial connection low pass filter 5 52 of phase-locked loop 51, its another output is connected with another input of voltage controlled oscillator VCO 53, the output of voltage controlled oscillator VCO 53 is connected with the input of the amplifier 2 10 of digital signal processing module 63, and the frequency of voltage controlled oscillator VCO 53 is 60MHz.
[0009]?
The beneficial effect of the utility model location and ranging receiver:
1. integrated level is high;
2. anti-interference is good;
3. cooperate corresponding receiver that accurate location and range finding can be provided;
4. volume is little, lightweight;
5. large, the high stability of finding range, high accuracy.
Description of drawings
Fig. 1 is the utility model electrical block diagram
The number in the figure explanation:
1 antenna selection switch, 2 low noise amplifiers, 3 band pass filters, 5 differential amplifiers, 6 frequency mixers one, 7 90-degree phase shifters, 8 frequency mixers two, 9 amplifiers one, 10 amplifiers two, 11 amplifiers three, 12 I roads, 13 Q roads, 14 low pass filters one, 15 low pass filters two, 16 variable gain amplifiers one, 17 variable gain amplifiers two, 18 low pass filters three, 19 low pass filters four, 20 baseband signal I roads, 21 baseband signal Q roads, 22 AD samplers, 23 filters one, 24 AGC controllers, 25 filters two, 26 decimators one, 27 filters three, 28 decimators two, 29 decimators three, 30 decimators four, 31 phase discriminators, 32 yards grabbers, 33 code tracking loop path filters, 34 digital controlled oscillator NCO, 35 advanced code outputs, 36 hysteresis code outputs, 37 aim at the code output, 38 carrier frequencies and phase tracker, 39 carrier phase measurement devices, 40 data demodulators, 41 read-write buses, 42 ~ 47 frequency mixers three ~ eight, 50 signal sources, 51 phase-locked loops, 52 low pass filters five, 53 voltage controlled oscillator VCO, 54 local oscillators, 55 outside VCXO voltage control, 56 6 antenna switch controllers, 60 antennas, 61 transformers, 62 receiving channel modules, 63 digital signal processing modules, 64 local oscillator modules, 65 on-site programmable gate array FPGAs
Embodiment [0012]
The utility model detailed construction, application principle, effect and effect are explained by following execution mode with reference to accompanying drawing 1.
Location of the present utility model and ranging receiver are made of power supply, receiving channel module 62, digital signal processing module 63, local oscillator module 64; The antenna 60 of receiving channel module 62 connects the input of antenna selection switch 1, be divided into two-way output behind the latter's output serial connection low noise amplifier 2, band pass filter 3, the transformer 61, export respectively two inputs that radiofrequency signal enters the differential amplifier 5 of digital signal processing module 62, an input of the output frequency mixer 1 in parallel of differential amplifier 5, an input of frequency mixer 28, another input of its another output frequency mixer 1 in parallel, another input of frequency mixer 28; 90-degree phase shifter 7 connects respectively frequency mixer 1, frequency mixer 28 and amplifier 2 10;
The output of frequency mixer 1 connects the input of amplifier 1, be connected with an input of variable gain amplifier 1 behind the latter's the output serial connection low pass filter 1, be connected with an input of AD sampler 22 behind the latter's the output serial connection low pass filter 3 18;
The output of frequency mixer 28 connects the input of amplifier 3 11, be connected with an input of variable gain amplifier 2 17 behind the latter's the output serial connection low pass filter 2 15, be connected with another input of AD sampler 22 behind the latter's the output serial connection low pass filter 4 19;
Input of an input of an output parallel filter 1 of AD sampler 22, an input of frequency mixer 3 42, frequency mixer 5 44 and an input of frequency mixer 7 46;
Input of an input of another input of another output parallel filter 1 of AD sampler 22, frequency mixer 4 43, frequency mixer 6 45 and an input of frequency mixer 8 47;
The output of filter 1 connects the input of automatic gain control AGC controller 24, another input of the latter's output variable gain amplifier 1 in parallel and another input of variable gain amplifier 2 17;
Frequency mixer 3 42 is connected 43 output and is connected respectively an input of filter 2 25 with frequency mixer, the output of filter 2 25 connects the input of decimator 1, input of the latter's output phase discriminator 31 in parallel and an input of code grabber 32;
Frequency mixer 5 44 is connected 45 output and is connected respectively an input of filter 3 27 with frequency mixer, the output of filter 3 27 connects the input of decimator 2 28, another input of another input of the latter's output phase discriminator 31 in parallel and code grabber 32;
The output of frequency mixer 7 46 connects the input of decimator 3 29, the latter's output carrier frequency in parallel and an input of phase tracker 38, an input of carrier phase measurement device 39, an input of data demodulator 40;
The output of frequency mixer 8 47 connects the input of decimator 4 30, the latter's output carrier frequency in parallel and another input of phase tracker 38, another input of carrier phase measurement device 39, another input of data demodulator 40;
The output of carrier frequency and phase tracker 38 is connected with the input of the 20MHz signal source 50 of local oscillator module 64; The 3rd input of carrier phase measurement device 39, the 3rd input of data demodulator 40 all are connected with read-write bus 41;
Be connected with the input of digital controlled oscillator NCO34 behind the output serial connection code tracking loop path filter 33 of phase discriminator 31; The output of code grabber 32 is connected with another input of digital controlled oscillator NCO34;
Another input of advanced code output 35 frequency mixers 4 43 in parallel of digital controlled oscillator NCO34, another input of frequency mixer 3 42; Its lag behind another input of code output 36 frequency mixers 6 45 in parallel, another input of frequency mixer 5 44; It aims at another input of code output 37 frequency mixers 8 47 in parallel, another input of frequency mixer 7 46;
The output of signal source 50 is connected with the input of phase-locked loop 51, be connected with an input of voltage controlled oscillator VCO 53 behind the output serial connection low pass filter 5 52 of phase-locked loop 51, its another output is connected with another input of voltage controlled oscillator VCO 53, and the output of voltage controlled oscillator VCO 53 is connected with the input of the amplifier 2 10 of digital signal processing module 63.
The quantity of antenna 60 is 6, and the input of antenna selection switch 1 connects the output of 6 antenna switch controllers 56.
Power supply, receiving channel module 62, digital signal processing module 63, local oscillator module 64 are located on the different printing board PCBs, aforementioned PCB is divided in each little cavity of cavity, whole HFS and low frequency part are separated fully, can avoid like this each functional circuit phase mutual interference, reach preferably shield effectiveness.
Consult accompanying drawing 1, below the utility model is described in further detail by the implementation step:
The radiofrequency signal that is received by antenna 60 is through antenna selection switch 1(radio-frequency (RF) switch) switch export LNA to after, deliver to frequency mixer one 6(MAX2701), frequency mixer two 8(MAX2701), carry out Direct-conversion, obtain zero intermediate frequency baseband I/Q signal, deliver to on-site programmable gate array FPGA 65 by AD sampler 22 again and process.What carry out mixing with frequency mixer 1, frequency mixer 28 is the 2.45GHz local oscillation signal that is derived from local oscillator module 64 through ovennodulation, modulation code is produced by FPGA65, the stability of modulated 2.45GHz local oscillation signal and down-conversion output zero intermediate frequency baseband I/Q signal quality are vital to receiver sensitivity and certainty of measurement.
Receiver zero intermediate frequency IQ signal is through AD sampler 22, sampling rate 80MHz, and the integrated signal signal to noise ratio requires and the FPGA consumed resource considers to get 10 bit wides.Sampled signal is sent into FPGA, is finished the functions such as a yard acquisition and tracking, carrier track, data demodulates, phase calculation, automatic gain control AGC by digital signal processing circuit.
Digital controlled oscillator NCO34 produces the local code identical with transmitter, finishing with catching by code grabber 32 and code tracking loop path filter code 33 synchronously of code, code is caught the mode that adopts serial shift relevant, be conducive to reduce the FPGA resource consumption, detection threshold adopts the adaptive threshold mode, satisfies to receive the dynamic range of signals requirement.
Enter the code tracking state behind the code acquisition success, code tracking adopts the delay lock loop mode, by calculating the phase difference leading and code that lags behind, the frequency of control digital controlled oscillator NCO34, reach the accurate tracking to code phase, wherein code tracking loop path filter 33 parameter designing are key index, have determined the tracking accuracy of code phase.At the code tracking state, signal utilizes the code of the same frequency homophase of local recovery to process through despreading, has removed spreading code.Code phase lock-in detection module output code lock flag signal.
Signal after the despreading is after filter 2 25, filter 3 27 integration zero clearings, again through decimator 1 and decimator 2 28, obtain the 19.6KHz signal identical with modulation data rate, for reaching the requirement of anti-frequency deviation, adopted simultaneously carrier wave FLL and carrier phase-locked loop.The carrier wave FLL is used phase discriminator 31(four phase cross product discriminator devices), can ± frequency deviation of 5KHz is reduced to about tens Hz, then carries out carrier phase by phase-locked loop 51 and lock.Because receiver adopts the zero intermediate frequency pattern, carrier wave voltage controlled oscillator VCO 53 adopts DA control, and DA selects 16 bit wide high accuracy DA devices, guarantees the VCO control precision.After the carrier phase locking, remove carrier wave by analog frequency mixing, recover demodulating data.Code tracking loop path filter 33 parameters in carrier wave FLL and the carrier phase-locked loop have determined anti-frequency deviation performance and carrier phase tracking precision.
There are 6 antennas this location with ranging receiver, wherein 1 is main antenna, and six road signals select one antenna selection switch 1 to select one the tunnel to process by six, processes to comprise the phase place of calculating carrier wave, calculate the time (with respect to unified lock-out pulse) of relevant peaks, and demodulate data.After receiver was finished code and carrier synchronization, 6 antennas switched time-sharing work in turn by certain sequential.Wherein main antenna duration of work code and carrier synchronization circuit working, continue tracking code and carrier phase, in other 5 antenna working time slots, the value of carrier phase is measured, the calculating of carrier phase value is finished with the cordic algorithm module in FPGA65, cordic algorithm carries out the IQ amplitude to the calculating of angle, will eliminate the impact of carrier phase 0-π ambiguity in the calculating of carrier phase value.The carrier phase measurement value outputs to processor via read-write bus 41 and reads and process, thereby calculates the orientation of transmitter.
From the above, location of the present utility model and ranging receiver have the integrated level height; Anti-interference is good; Cooperate corresponding transmitter that accurate location and range finding can be provided; Volume is little, lightweight; The plurality of advantages such as finding range is large, high stability, high accuracy.

Claims (1)

1. location and ranging receiver is characterized in that: be made of power supply, receiving channel module (62), digital signal processing module (63), local oscillator module (64); The antenna (60) of receiving channel module (62) connects the input of antenna selection switch (1), the latter's output serial connection low noise amplifier (2), band pass filter (3), be divided into two-way output behind the transformer (61), export respectively two inputs of the differential amplifier (5) that radiofrequency signal enters digital signal processing module (62), an input of the output frequency mixer one (6) in parallel of differential amplifier (5), an input of frequency mixer two (8), another input of its another output frequency mixer one (6) in parallel, another input of frequency mixer two (8); 90-degree phase shifter (7) connects respectively frequency mixer one (6), frequency mixer two (8) and amplifier two (10); The quantity of antenna (60) is 6, and the input of antenna selection switch (1) connects the output of 6 antenna switch controllers (56);
The output of frequency mixer one (6) connects the input of amplifier one (9), be connected with an input of variable gain amplifier one (16) behind the latter's the output serial connection low pass filter one (14), be connected with an input of AD sampler (22) behind the latter's the output serial connection low pass filter three (18);
The output of frequency mixer two (8) connects the input of amplifier three (11), be connected with an input of variable gain amplifier two (17) behind the latter's the output serial connection low pass filter two (15), be connected with another input of AD sampler (22) behind the latter's the output serial connection low pass filter four (19);
Input of an input of an output parallel filter one (23) of AD sampler (22), an input of frequency mixer three (42), frequency mixer five (44) and an input of frequency mixer seven (46);
Input of another input of another output parallel filter one (23) of AD sampler (22), an input of frequency mixer four (43), frequency mixer six (45) and an input of frequency mixer eight (47);
The output of filter one (23) connects the input of AGC controller (24), another input of the latter's output variable gain amplifier one (16) in parallel and another input of variable gain amplifier two (17);
Frequency mixer three (42) is connected the output of (43) and is connected respectively an input of filter two (25) with frequency mixer, the output of filter two (25) connects the input of decimator one (26), input of the latter's output phase discriminator in parallel (31) and an input of code grabber (32);
Frequency mixer five (44) is connected the output of (45) and is connected respectively an input of filter three (27) with frequency mixer, the output of filter three (27) connects the input of decimator two (28), another input of another input of the latter's output phase discriminator in parallel (31) and code grabber (32);
The output of frequency mixer seven (46) connects the input of decimator three (29), the latter's output carrier frequency in parallel and an input of phase tracker (38), an input of carrier phase measurement device (39), an input of data demodulator (40);
The output of frequency mixer eight (47) connects the input of decimator four (30), the latter's output carrier frequency in parallel and another input of phase tracker (38), another input of carrier phase measurement device (39), another input of data demodulator (40);
The output of carrier frequency and phase tracker (38) is connected with the input of the signal source (50) of local oscillator module (64); The 3rd input of carrier phase measurement device (39), the 3rd input of data demodulator (40) all are connected with read-write bus (41);
Behind the output of phase discriminator (31) the serial connection code tracking loop path filter (33) with digital controlled oscillator NCO(34) an input be connected; The code grabber (32) output and digital controlled oscillator NCO(34) another input be connected;
Digital controlled oscillator NCO(34) another input of advanced code output (35) frequency mixer four (43) in parallel, another input of frequency mixer three (42); Its lag behind another input of code output (36) frequency mixer six (45) in parallel, another input of frequency mixer five (44); It aims at another input of code output (37) frequency mixer eight (47) in parallel, another input of frequency mixer seven (46);
The output of signal source (50) is connected with the input of phase-locked loop (51), be connected with an input of voltage controlled oscillator VCO (53) behind the output serial connection low pass filter five (52) of phase-locked loop (51), its another output is connected with another input of voltage controlled oscillator VCO (53), the output of voltage controlled oscillator VCO (53) is connected with the input of the amplifier two (10) of digital signal processing module (63), and the frequency of voltage controlled oscillator VCO (53) is 60MHz.
CN 201220279247 2012-06-14 2012-06-14 Positioning and distance finding receiver Expired - Lifetime CN202759439U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105407528A (en) * 2015-11-25 2016-03-16 四川省绵阳西南自动化研究所 Wireless ranging communication module based on measurement of asynchronous response time

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105407528A (en) * 2015-11-25 2016-03-16 四川省绵阳西南自动化研究所 Wireless ranging communication module based on measurement of asynchronous response time

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Granted publication date: 20130227

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