CN202696135U - Dual-loop current limiting protection circuit - Google Patents
Dual-loop current limiting protection circuit Download PDFInfo
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- CN202696135U CN202696135U CN 201220389222 CN201220389222U CN202696135U CN 202696135 U CN202696135 U CN 202696135U CN 201220389222 CN201220389222 CN 201220389222 CN 201220389222 U CN201220389222 U CN 201220389222U CN 202696135 U CN202696135 U CN 202696135U
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Abstract
A dual-loop current limiting protection circuit is provided, and the dual-loop comprises a rapid response current limiting protection circuit and an accurate current limiting circuit, wherein the rapid response current limiting protection circuit can rapidly respond to changes of a power switch tube output current, the output current is timely limited in a safety scope, the accurate current limiting circuit with slow starting speed but high accuracy will further adjust the output current accurately, and the accurate current limiting circuit comprises a monitoring resistor, a comparator, and a MOS tube, so combination of rapid current limiting and accurate current limiting is realized; and the dual-loop current limiting protection circuit is characterized in that the rapid response current limiting protection circuit comprises a second MOS tube, i.e., a current induction MOS tube, and grid interconnection is arranged between the second MOS tube and a first MOS tube, i.e., the power switch tube, source electrodes of the current induction MOS tube and the power switch tube are directly interconnected, a drain electrode of the current induction MOS tube is connected with a voltage division circuit, and the voltage diversion circuit is connected with the rapid response current limiting switch circuit.
Description
Technical field
The utility model relates to the microelectronic integrated circuit technology, a kind of double loop current-limiting protection circuit particularly, and described double loop comprises quick response current-limiting protection circuit and accurate current-limiting circuit.The fast variation of responding power switching tube output current of described quick response current-limiting protection circuit; in time output current is limited in the safe range; wait for to start the further accurate adjustment output current of accurate current-limiting circuit slow but that precision is high is comprised of monitoring resistor, comparator and metal-oxide-semiconductor, thereby realize the combination of quick current-limiting and accurate current limliting.
Background technology
When run into hot plug, the equivalent load resistance diminishes suddenly or output suddenly during the event on short ground; the current-limiting circuit that power switch need to be able to respond fast; be used for the output current that inhibition explodes suddenly, protect inner large scale power MOS pipe and upstream electrical source bus safety.Secondly for this purpose and the current-limiting circuit of design at first will be monitored output current, electric current and the benchmark that monitors being compared, is according to comparative result FEEDBACK CONTROL power switch at last, and output current is remained in the safe current range.Generally speaking; flow through the voltage drop of monitoring resistor generation and the comparative result that reference voltage obtains by comparator according to output current; FEEDBACK CONTROL is adjusted the grid voltage of large-sized power MOS pipe, output current is controlled in the safe range, thereby finishes the current-limiting protection function.For accurately monitoring short circuit current, usually select flash monitoring current mode, namely monitoring resistor is placed between power supply and the load.For satisfying such monitoring mode, comparator will have high common-mode voltage and can identify the voltage drop of millivolt level on the monitoring resistor, but can cause like this its response time elongated, so be necessary to respond fast current-limiting circuit on this basis parallel a tunnel.A kind of double loop of the prior art current-limiting circuit as shown in Figure 1, wherein the dotted line circle segment is to respond fast current-limiting circuit 100, monitoring resistor R1, comparator A1 and metal-oxide-semiconductor M3 form accurate current-limiting circuit, response current-limiting circuit 100 is connected with power switch pipe M1 respectively with the current-limiting circuit of being connected fast, and charge pump 101 provides grid voltage for the grid of power switch pipe M1.Quick response current-limiting circuit 100 comprises the electric current induction metal-oxide-semiconductor M2 with power switch pipe M1 gate interconnection, the drain electrode of electric current induction metal-oxide-semiconductor M2 directly connects the Vin port, source electrode connects the Vout port by resistance R 2, source electrode is the base stage of connecting triode Q1 simultaneously, the emitter of triode Q1 connects the Vout port, the collector electrode of triode Q1 is connected to the grid of electric current induction metal-oxide-semiconductor M2, and namely M2, R2 and Q1 form fast response current-limiting circuit.Fig. 1 is the application circuit that comprises quick response current-limiting circuit 100 of the prior art, and its working method is described as follows: the 1.Vin port connects power supply, and the Vout port connects load.2. charge pump is managed M1 (large scale power tube) to NMOS and M2 provides grid voltage.During work, charge pump can rise to their grid voltage on the level of Vin+Vd (Vd〉Vth, Vth is the NMOS threshold voltage), so that these NMOS conductings.3.M1 be large scale power NMOS.4.R1 be monitoring resistor.5. during circuit working, the output current that the electric current of M2 and M1 produce is proportional.6.M2, R2 and Q1 form fast response current-limiting circuit (among Fig. 1 in the dotted line frame circuit).When chip operation, when the unexpected step-down of load impedance or ground connection, can make output current Iout become large, the electric current that while M2 is mirrored to from power tube M1 also becomes large.When image current flow through the upper voltage that produces of R2 above Vbe1 (transistor npn Q1 threshold voltage), the Q1 of conducting can drag down the grid voltage of M1 and M2 fast, and output current Iout is limited in the safe range.When above process occured, by R1, the accurate current-limiting circuit that A1 and M3 form was not yet started working.By the time R1, behind the accurate current limliting loop start that A1 and M3 form, output current Iout is further reduced, and the voltage on the R2 is less than Vbe1, Q1 closes, and responds fast current-limiting circuit and also closes.Although respond fast the also fast variation of responding power switching tube M1 output current of current-limiting circuit 100, but according to the field effect transistor current formula as can be known, because the existence of R2 on the source electrode of electric current induction metal-oxide-semiconductor M2, the gate source voltage of M2 and power switch pipe M1 is unequal.This is so that during the work of M2, R2 and Q1 fast response circuit, the electric current of M2 mirror image M1 is subjected to the upper voltage influence of R2, ratio and the non-constant of the two electric current.This has increased the difficulty of definite circuit and component parameter thereof undoubtedly.In addition, in common CMOS process, npn transistor (being triode Q1) is difficult to realize.Even producer can make npn, cost also Billy is high with the chip cost of common CMOS process production.
The utility model content
The utility model provides a kind of double loop current-limiting protection circuit for the defective that exists in the prior art or deficiency, and described double loop comprises quick response current-limiting protection circuit and accurate current-limiting circuit.The fast variation of responding power switching tube output current of described quick response current-limiting protection circuit; in time output current is limited in the safe range; wait for to start the further accurate adjustment output current of accurate current-limiting circuit slow but that precision is high is comprised of monitoring resistor, comparator and metal-oxide-semiconductor, thereby realize the combination of quick current-limiting and accurate current limliting.
The technical solution of the utility model is as follows:
A kind of double loop current-limiting protection circuit; described double loop comprises quick response current-limiting protection circuit and accurate current-limiting circuit; described accurate current-limiting circuit is by monitoring resistor; comparator and the 3rd metal-oxide-semiconductor form; described monitoring resistor one end connects input power; it is power switch pipe and described comparator input terminal that the other end connects respectively the first metal-oxide-semiconductor; described comparator output terminal connects the drive circuit output by the 3rd metal-oxide-semiconductor; it is characterized in that; described quick response current-limiting protection circuit comprises that with the first metal-oxide-semiconductor be that the second metal-oxide-semiconductor of power switch pipe gate interconnection is electric current induction metal-oxide-semiconductor; the source electrode of described electric current induction metal-oxide-semiconductor and the source electrode direct interconnection of described power switch pipe; the drain electrode of described electric current induction metal-oxide-semiconductor connects bleeder circuit, and described bleeder circuit connects fast response current limiting switch circuit.
Described bleeder circuit comprises that the second resistance is divider resistance.
Described bleeder circuit comprises current mirror.
Described quick response current limiting switch circuit comprises switching tube, and described switching tube connects the drive circuit output by metal-oxide-semiconductor current mirror mirror image circuit, and described drive circuit output connects the grid of described power switch pipe.
Described power switch pipe is the NMOS pipe, described electric current induction metal-oxide-semiconductor is the NMOS pipe, described switching tube is PMOS pipe or PNP triode, the source electrode of described power switch pipe directly connects the load voltage port, and the drain electrode of described power switch pipe is that monitoring resistor connects the supply voltage port by the first resistance.
Described power switch pipe is the PMOS pipe, and described electric current induction metal-oxide-semiconductor is the PMOS pipe, and described switching tube is NMOS pipe or NPN triode, and the source electrode of described power switch pipe directly connects the supply voltage port, and the drain electrode of described power switch pipe connects the load voltage port.
Described drive circuit comprises charge pump.
The drain electrode of described power switch pipe directly connects the negative pole of comparator input terminal, and the positive pole of described comparator input terminal connects reference potential, and described comparator output terminal connects described drive circuit output by the 3rd metal-oxide-semiconductor.
The source ground of described the 3rd metal-oxide-semiconductor, and connect the grid of described the 3rd metal-oxide-semiconductor by electric capacity, the drain electrode of described the 3rd metal-oxide-semiconductor connects described drive circuit output.
Described drive circuit comprises logic pipe circuit.
Technique effect of the present utility model is as follows: the utility model is exactly a kind of current-limiting circuit that can respond fast, and it has the low-response time, the characteristics with being suitable for CMOS technique simple in structure.Compared with prior art, in the utility model be divider resistance R2 with the second resistance from the second metal-oxide-semiconductor be that the source electrode of electric current induction metal-oxide-semiconductor M2 moves drain electrode, making the second metal-oxide-semiconductor is that electric current induction metal-oxide-semiconductor M2 and the first metal-oxide-semiconductor are power switch pipe M1(large scale power tube) the ratio of electric current be constant, this has simplified calculating and design, is convenient to circuit and realizes.In addition, utilize the NPN transistor in the alternative original scheme of PMOS, easier realization, and effectively reduce cost.
Description of drawings
Fig. 1 is the application circuit that comprises double loop of the prior art current-limiting circuit.
Fig. 2 is the first application circuit schematic diagram of implementing the utility model double loop current-limiting protection circuit.
Fig. 3 is the second application circuit schematic diagram of implementing the utility model double loop current-limiting protection circuit.
Fig. 4 is the 3rd application circuit schematic diagram of implementing the utility model double loop current-limiting protection circuit.
Fig. 5 is the 4th application circuit schematic diagram of implementing the utility model double loop current-limiting protection circuit.
Fig. 6 is the 5th application circuit schematic diagram of implementing the utility model double loop current-limiting protection circuit.
Fig. 7 is the 6th application circuit schematic diagram of implementing the utility model double loop current-limiting protection circuit.
Fig. 8 is the 7th application circuit schematic diagram of implementing the utility model double loop current-limiting protection circuit.
Fig. 9 is the 8th application circuit schematic diagram of implementing the utility model double loop current-limiting protection circuit.
Description of reference numerals is as follows: 100-quick response current-limiting circuit of the prior art; 101-drive circuit charge pump; 102-responds current-limiting protection circuit fast; 103-drive circuit driver.V-voltage; R-resistance; The MMOS pipe; The Q-triode; The A-comparator.
Embodiment
Below in conjunction with accompanying drawing (Fig. 2-Fig. 9) the utility model is described.
Such as Fig. 2-shown in Figure 9; a kind of double loop current-limiting protection circuit; described double loop comprises quick response current-limiting protection circuit and accurate current-limiting circuit; described accurate current-limiting circuit is by monitoring resistor R1; comparator A1 and the 3rd metal-oxide-semiconductor M3 form; described monitoring resistor R1 one end connects input power; it is power switch pipe M1 and described comparator A1 input that the other end connects respectively the first metal-oxide-semiconductor; described comparator A1 output connects the drive circuit output by the 3rd metal-oxide-semiconductor M3; described quick response current-limiting protection circuit 102 comprises that with the first metal-oxide-semiconductor be M1 among power switch pipe M1(such as Fig. 2-Fig. 9) the second metal-oxide-semiconductor of gate interconnection is the M2 among electric current induction metal-oxide-semiconductor M2(such as Fig. 2-Fig. 9); the source electrode of described electric current induction metal-oxide-semiconductor M2 and the source electrode direct interconnection of described power switch pipe M1; the drain electrode of described electric current induction metal-oxide-semiconductor M2 connects bleeder circuit (such as the R2 among Fig. 2-Fig. 9 or current source mark), and described bleeder circuit connects fast response current limiting switch circuit.Described bleeder circuit comprises that the second resistance is divider resistance R2.Described bleeder circuit comprises current mirror.Described quick response current limiting switch circuit comprises switching tube (such as the M4 among Fig. 2-Fig. 9, Q1), described switching tube is by metal-oxide-semiconductor current mirror mirror image circuit (current mirror that is connected with M6 such as the M5 among Fig. 2-Fig. 9) connection drive circuit 101 or 103 outputs, and described drive circuit output connects the grid of described power switch pipe M1.Described power switch pipe M1 is NMOS pipe (such as the M1 among Fig. 2-Fig. 5), described electric current induction metal-oxide-semiconductor is NMOS pipe (such as the M2 among Fig. 2-Fig. 5), described switching tube is PMOS pipe (such as the M4 among Fig. 2, Fig. 4) or PNP triode (such as the Q1 among Fig. 3, Fig. 5), the source electrode of described power switch pipe M1 directly connects load voltage port Vout, and the drain electrode of described power switch pipe M1 is that monitoring resistor R1 connects supply voltage port Vin by the first resistance.Described power switch pipe M1 is PMOS pipe (such as the M1 among Fig. 6-Fig. 9), described electric current induction metal-oxide-semiconductor is PMOS pipe (such as the M2 among Fig. 6-Fig. 9), described switching tube is NMOS pipe (such as the M4 among Fig. 6 and Fig. 8) or NPN triode (such as the Q1 among Fig. 7 and Fig. 9), the source electrode of described power switch pipe M1 directly connects supply voltage port Vin, and the drain electrode of described power switch pipe M1 connects load voltage port Vout.Described drive circuit comprises charge pump 101.The drain electrode of described power switch pipe M1 directly connects the negative pole of comparator A1, and the positive pole of described comparator A1 connects reference potential Vref, and it is charge pump 101 outputs that output connects described drive circuit by the 3rd metal-oxide-semiconductor M3.The source ground of described the 3rd metal-oxide-semiconductor M3, and connect the grid of described the 3rd metal-oxide-semiconductor M3 by electric capacity, it is charge pump 101 outputs that the drain electrode of described the 3rd metal-oxide-semiconductor M3 connects described drive circuit.Described drive circuit (such as 101 among Fig. 2-Fig. 9 and 103) comprises logic pipe circuit.
Fig. 2 is the first application circuit schematic diagram of implementing the utility model double loop current-limiting protection circuit.Its working method is described as follows: the 1.Vin port connects power supply, and the Vout port connects load.2. charge pump provides grid voltage to M1 (large scale power NMOS pipe) and M2.During work, charge pump can rise to their grid voltage on the level of Vin+Vd (Vd〉Vth, Vth is the NMOS threshold voltage), so that M1 and M2 conducting.3.M1 be large scale power NMOS pipe.4.R1 be monitoring resistor.5. during circuit working, the M2 mirror image flows through the output current Iout of M1, and the electric current that namely flows through M2 is constant with the ratio of the output current that flows through M1.6.M2, M4, M5, M6, M7 and R2 form fast response circuit.During chip operation, when the unexpected step-down of load impedance or direct ground connection, can produce the large electric current that can damage chip or power supply, and the electric current that M2 is mirrored to from large scale power tube M1 also becomes large.When image current after the voltage drop that resistance R 2 produces is enough to make M4 (PMOS) to open, the On current of M4 is mirrored to the electric charge delivery side of pump by the current mirror of M5 and M6 composition, and drag down the grid voltage of M2 and M1, so output current Iout is clamped in the safe range.By the time after the current-limiting circuit of R1, A1 (having high common-mode voltage and high-resolution comparator) and M3 composition is started working, output current Iout is further reduced, the voltage drop of electric current on R2 that while M2 is mirrored to is greater than the threshold voltage of M4 (PMOS), so M4 closes, also close and respond fast current-limiting circuit.In the circuit shown in Figure 2, PMOS (M4) is replaced with the function that PNP realizes current-limiting protection too, as shown in Figure 3; In circuit shown in Figure 2, resistance (R2) is replaced with the function that current mirror also can be realized current-limiting protection, as shown in Figure 4 equally; By three kinds of replacement schemes of above 2 combination results, i.e. PNP+ resistance (as shown in Figure 3), PMOS+ current mirror (as shown in Figure 4) and PNP+ current mirror (as shown in Figure 5), its operation principle is similar.
Fig. 6 is the 5th application circuit schematic diagram of implementing the utility model double loop current-limiting protection circuit.The utility model is the power switch of NMOS for power tube, but in like manner the design power pipe is the quick response current-limiting protection circuit of the power switch of PMOS, as shown in Figure 6.Circuit working principle shown in Figure 6: 1) M1 is the large scale power tube PMOS; 2) in when work, the M2 mirror image flows through the output current of M1, and the electric current that namely flows through M2 is constant with the ratio of the output current that flows through M1.3) M2, M4, M5, M6 and R2 form fast response current-limiting protection circuit.During chip operation, when the unexpected step-down of load impedance or direct ground connection, can produce the large electric current that can damage chip or power supply, and the electric current that M2 is mirrored to from power tube M1 also becomes large.This image current produces voltage drop in resistance R 2.After this voltage drop was enough to make NMOS M4 to open, the On current of M4 was mirrored to the grid end of large scale PMOS (M1) by the current mirror of M5 and M6 composition, and draws high this grid voltage, so output current Iout is clamped in the safe range.By the time after the interior current-limiting circuit (not drawing among Fig. 6) with comparator of chip is opened, output current Iout is further reduced, flow through voltage drop that R2 produces during less than the threshold voltage of M4 when the M2 image current, so M4 closes, also close and respond fast current-limiting circuit.In the circuit shown in Figure 6, NMOS (M4) can be replaced by NPN, as shown in Figure 7; Resistance R 2 can be replaced by current mirror, as shown in Figure 8; Have go out four kinds of physical circuits of the present utility model, i.e. NMOS+ resistance (as shown in Figure 6), NPN+ resistance (as shown in Figure 7), NMOS+ current mirror (as shown in Figure 8) and NPN+ current mirror (as shown in Figure 9) capable of being combined altogether by above 2.Their operation principle is close.
Indicate at this, more than narration helps those skilled in the art to understand the invention, but and the protection range of unrestricted the invention.Any do not break away from the invention flesh and blood to being equal to replacement, modify improving and/or deleting numerous conforming to the principle of simplicity and the enforcement carried out of above narration, all fall into the protection range of the invention.
Claims (10)
1. double loop current-limiting protection circuit; described double loop comprises quick response current-limiting protection circuit and accurate current-limiting circuit; described accurate current-limiting circuit is by monitoring resistor; comparator and the 3rd metal-oxide-semiconductor form; described monitoring resistor one end connects input power; it is power switch pipe and described comparator input terminal that the other end connects respectively the first metal-oxide-semiconductor; described comparator output terminal connects the drive circuit output by the 3rd metal-oxide-semiconductor; it is characterized in that; described quick response current-limiting protection circuit comprises that with the first metal-oxide-semiconductor be that the second metal-oxide-semiconductor of power switch pipe gate interconnection is electric current induction metal-oxide-semiconductor; the source electrode of described electric current induction metal-oxide-semiconductor and the source electrode direct interconnection of described power switch pipe; the drain electrode of described electric current induction metal-oxide-semiconductor connects bleeder circuit, and described bleeder circuit connects fast response current limiting switch circuit.. a kind of double loop current-limiting protection circuit; it is characterized in that; comprise that with the first metal-oxide-semiconductor be that the second metal-oxide-semiconductor of power switch pipe gate interconnection is electric current induction metal-oxide-semiconductor; the source electrode of described electric current induction metal-oxide-semiconductor and the source electrode direct interconnection of described power switch pipe; the drain electrode of described electric current induction metal-oxide-semiconductor connects bleeder circuit, and described bleeder circuit connects fast response current limiting switch circuit.
2. double loop according to claim 1 current-limiting protection circuit is characterized in that described bleeder circuit comprises that the second resistance is divider resistance.
3. double loop according to claim 1 current-limiting protection circuit is characterized in that described bleeder circuit comprises current mirror.
4. double loop according to claim 1 current-limiting protection circuit; it is characterized in that; described quick response current limiting switch circuit comprises switching tube; described switching tube connects the drive circuit output by metal-oxide-semiconductor current mirror mirror image circuit, and described drive circuit output connects the grid of described power switch pipe.
5. double loop according to claim 4 current-limiting protection circuit; it is characterized in that; described power switch pipe is the NMOS pipe; described electric current induction metal-oxide-semiconductor is the NMOS pipe; described switching tube is PMOS pipe or PNP triode; the source electrode of described power switch pipe directly connects the load voltage port, and the drain electrode of described power switch pipe is that monitoring resistor connects the supply voltage port by the first resistance.
6. double loop according to claim 4 current-limiting protection circuit; it is characterized in that; described power switch pipe is the PMOS pipe; described electric current induction metal-oxide-semiconductor is the PMOS pipe; described switching tube is NMOS pipe or NPN triode; the source electrode of described power switch pipe directly connects the supply voltage port, and the drain electrode of described power switch pipe connects the load voltage port.
7. double loop according to claim 4 current-limiting protection circuit is characterized in that described drive circuit comprises charge pump.
8. double loop according to claim 4 current-limiting protection circuit; it is characterized in that; the drain electrode of described power switch pipe directly connects the negative pole of comparator input terminal; the positive pole of described comparator input terminal connects reference potential, and described comparator output terminal connects described drive circuit output by the 3rd metal-oxide-semiconductor.
9. double loop according to claim 8 current-limiting protection circuit is characterized in that, the source ground of described the 3rd metal-oxide-semiconductor, and connect the grid of described the 3rd metal-oxide-semiconductor by electric capacity, the drain electrode of described the 3rd metal-oxide-semiconductor connects described drive circuit output.
10. double loop according to claim 4 current-limiting protection circuit is characterized in that described drive circuit comprises logic pipe circuit.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201220389222 CN202696135U (en) | 2012-08-07 | 2012-08-07 | Dual-loop current limiting protection circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201220389222 CN202696135U (en) | 2012-08-07 | 2012-08-07 | Dual-loop current limiting protection circuit |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103151766A (en) * | 2013-04-01 | 2013-06-12 | 刘文博 | Controlled quiescent current-limiting acceleration protection circuit |
| CN103208789A (en) * | 2013-04-01 | 2013-07-17 | 刘文博 | Controllable quiescent current limiting acceleration protection circuit |
| CN105577152A (en) * | 2016-01-07 | 2016-05-11 | 圣邦微电子（北京）股份有限公司 | Protection circuit in load switch |
| CN109309381A (en) * | 2017-07-27 | 2019-02-05 | 炬芯（珠海）科技有限公司 | Current-limiting circuit and current-limiting method |
| CN111124031A (en) * | 2018-10-31 | 2020-05-08 | 圣邦微电子（北京）股份有限公司 | Test control circuit of current-limiting circuit |
| CN113258766A (en) * | 2021-06-25 | 2021-08-13 | 上海芯龙半导体技术股份有限公司南京分公司 | Current-limiting tracking chip, switching power supply circuit and switching power supply system |
| CN113746312A (en) * | 2021-09-02 | 2021-12-03 | 南京微盟电子有限公司 | Current-limiting protection circuit of bipolar process switching power supply |
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2012
- 2012-08-07 CN CN 201220389222 patent/CN202696135U/en not_active Expired - Lifetime
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103151766A (en) * | 2013-04-01 | 2013-06-12 | 刘文博 | Controlled quiescent current-limiting acceleration protection circuit |
| CN103208789A (en) * | 2013-04-01 | 2013-07-17 | 刘文博 | Controllable quiescent current limiting acceleration protection circuit |
| CN103208789B (en) * | 2013-04-01 | 2017-06-06 | 深圳联辉科电子技术有限公司 | A kind of controllable quiescent current current limliting acceleration protection circuit |
| CN103151766B (en) * | 2013-04-01 | 2017-07-18 | 深圳联辉科电子技术有限公司 | A kind of controllable quiescent current current limliting acceleration protection circuit |
| CN105577152A (en) * | 2016-01-07 | 2016-05-11 | 圣邦微电子（北京）股份有限公司 | Protection circuit in load switch |
| CN105577152B (en) * | 2016-01-07 | 2018-10-26 | 圣邦微电子（北京）股份有限公司 | Protection circuit in load switch |
| CN109309381A (en) * | 2017-07-27 | 2019-02-05 | 炬芯（珠海）科技有限公司 | Current-limiting circuit and current-limiting method |
| CN109309381B (en) * | 2017-07-27 | 2020-02-28 | 炬芯（珠海）科技有限公司 | Current limiting circuit and current limiting method |
| CN111124031A (en) * | 2018-10-31 | 2020-05-08 | 圣邦微电子（北京）股份有限公司 | Test control circuit of current-limiting circuit |
| CN113258766A (en) * | 2021-06-25 | 2021-08-13 | 上海芯龙半导体技术股份有限公司南京分公司 | Current-limiting tracking chip, switching power supply circuit and switching power supply system |
| CN113746312A (en) * | 2021-09-02 | 2021-12-03 | 南京微盟电子有限公司 | Current-limiting protection circuit of bipolar process switching power supply |
| CN113746312B (en) * | 2021-09-02 | 2023-03-28 | 南京微盟电子有限公司 | Current-limiting protection circuit of bipolar process switching power supply |
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