CN202652153U - Variable resistor circuit - Google Patents

Abstract

The utility model provides a voltage control variable resistance circuit which is configured to be used for variably attenuating a variable source signal. A fixed attenuation circuit is coupled for receiving the variable source signal and outputting an attenuated variable source signal. The variable source signal is applied by a variable resistance voltage divider which is formed by a further across fixed resistance circuit and a variable resistance circuit. The variable resistance circuit comprises a first input which is configured to receive the attenuated variable source signal and a second input which is configured to receive a variable resistance control signal. The variable resistance circuit is configured to comprise a resistor which is changed in response to the attenuated variable source signal and the variable resistance control signal.

Description

Variable resistor circuit

Technical field

The utility model relates to circuit, and relates to variable resistor circuit particularly.

Background technology

The voltage control variable resistance is a kind of very useful assembly in the design of many application such as voltage control gain unit, agc circuit, automatic gain control.

Now Fig. 1 is made reference, Fig. 1 shows the diagram of the voltage control variable resistor circuit 10 of prior art.Circuit 10 usefulness forward biased diodes 12 are realized.Circuit 10 can be used to control (AGC) circuit as automatic gain among the RF application usually.Diode 12 normally is configured the PIN diode as variable resistance.Equivalent resistance is controlled by the electric current through diode 12.Formula 1 expression diode voltage:

$V_D=V_T\·\ln \frac{I_D}{I_S}$

Formula 2 expression diode resistances:

$r_D=\frac{\∂V_D}{\∂I_D}=V_T\·\frac{I_S}{I_D}\·\frac{1}{I_S}=\frac{V_T}{I_D}$

A problem of the circuit 10 of Fig. 1 is, circuit 10 only can use in (in the scope of mV or μ V) under the small-signal condition.Yet, under the large-signal voltage condition, r _DFormula no longer valid, and in signal, cause large distortion.

Now Fig. 2 is made reference, Fig. 2 shows the diagram of the voltage control variable resistor circuit 20 of prior art.The MOS transistor 22 that circuit 20 usefulness work in the triode region realizes.In triode region, the I/V characteristic of MOS transistor 22 appears to voltage (V _GS) the control variable resistance.Equivalent resistance is provided by formula 3:

$R_{\mathrm{EQ}}=\frac{1}{K\·\frac{W}{L}(V_{\mathrm{GS}}-V_{\mathrm{TH}})}$

In order to ensure the linearity about equivalent resistance, must make the source electrode of MOS transistor 22 and the voltage between the drain electrode keep very little (for example, tens of mV).Therefore the sort circuit 20 of Fig. 2 suffers from the problem identical with the circuit 10 of Fig. 1.

Now Fig. 3 is made reference, Fig. 3 shows the diagram of the voltage control variable resistor circuit 30 of prior art.The a plurality of resistors that are connected in series 32 of circuit 30 usefulness are realized.A plurality of switches (for example, the MOS device) 34 are coupled to optionally shunt walks around one or more resistors 32, in order to change the end-to-end resistance value of circuit 30.Switch 34 is numerically controlled.Such variable resistor circuit 30 is fit to use with the large-signal level.Yet because digital control, resistance variations is discontinuous.

Existence in the field of business is for the demand of the voltage control variable resistance that is suitable for continuous and linear resistance variations and uses with the large scale signal.

The utility model content

A kind of voltage control variable resistor circuit comprises: the fixed attenuation circuit, and it is arranged to the source signal through decaying at the first reference node reception sources signal and output; Operation amplifier circuit, it is arranged to source signal and the feedback signal that receives through decay, and generates the first control signal; The first transistor, it has the control terminal that is arranged to reception the first control signal, is arranged to the first conductive terminal of generating output signal, and is arranged to the second conductive terminal that generates feedback signal; And transistor seconds, it is coupling between the second conductive terminal and the second reference node, and has the control terminal that is arranged to reception the second control signal.

A kind of voltage control variable resistor circuit comprises: the fixed attenuation circuit, and it is coupling in and is arranged between the first reference node and the second reference node that receives the variable source signal, and described attenuator circuit is arranged to output through the variable source signal of decay; Constant-resistance circuit; Variable resistance circuit, wherein constant-resistance circuit and the variable resistance circuit output node place series coupled between the first reference node and the second reference node; And described variable resistance circuit has to be arranged to and receives through the first input of the variable source signal of decay and be arranged to the second input that receives the variable resistor control signal, and described variable resistance circuit has can be in response to the resistance that changes through the variable source signal of decay and variable resistor control signal.

A kind of voltage control variable resistor circuit, it comprises: the first reference node and the second reference node, stride these two reference nodes and apply the variable source signal; The first resistor; The second resistor; Wherein the first resistor and the second resistor first node place between the first reference node and the second reference node is connected in series; Operational amplifier, it has the first input that is connected to first node and the second input that is connected to feedback node; The 3rd resistor, it is connected between the first reference node and the output node; The first transistor, it has the first control terminal of the output that is connected to operational amplifier, and has the first conductive terminal that is connected to output node, and has the second conductive terminal that is connected to feedback node; And transistor seconds, it has the second control terminal that is arranged to reception variable resistor control signal, and has the first conductive terminal that is connected to feedback node and the second conductive terminal that is connected to the second reference node.

Description of drawings

In order to understand better each execution mode, now will only make reference to accompanying drawing by way of example, in the accompanying drawings:

Fig. 1 shows a kind of voltage control variable resistor circuit of prior art;

Fig. 2 shows a kind of voltage control variable resistor circuit of prior art;

Fig. 3 shows a kind of voltage control variable resistor circuit of prior art;

Fig. 4 shows a kind of voltage control variable resistor circuit;

Fig. 5 A is the equivalent schematic through simplifying of circuit shown in Fig. 4;

Fig. 5 B is the equivalent schematic through simplifying equivalently represented of circuit shown in Fig. 4;

Fig. 6 shows a kind of diagram of voltage control variable resistor circuit; And

Fig. 7 shows the waveform of the operation of the circuit that Fig. 6 is shown as the result of breadboardin.

Embodiment

In order to solve the as discussed above defective of prior art voltage control variable resistor circuit, propose a kind ofly have that continuous resistance changes and with the voltage control variable resistor circuit of the ability of large scale signal level operation.

Now Fig. 4 is made reference, the figure shows the diagram of voltage control variable resistor circuit 40.Circuit 40 comprises by resistor 44 and resistor 46 formed fixed potentiometers 42.Variable source signal voltage V _SBe applied to reference node 60 and reference node 66, and applied by being striden voltage divider 42.Fixed potentiometer 42 is used at the source signal voltage of node A place generation through decay.Circuit 40 also comprises operational amplifier 48 (but can alternatively use any other suitable difference input amplifier).First (just) input of operational amplifier 48 receives the source signal voltage through decay from node A.The output of operational amplifier 48 is applied to the control terminal 50 of the first transistor 52.In a preferred implementation, this first transistor 52 can comprise bipolar device, and wherein control terminal 50 is the base stage of bipolar transistor.First conductive terminal 54 (for example, collector electrode) of the first transistor 52 limits and produces output voltage V _OOutput node 56.Resistor 58 is coupling in the first conductive terminal 54 (output node 54) and source signal voltage V _SThe first reference terminal 60 between.Second conductive terminal 62 (for example, emitter) of the first transistor 52 limits feedback node B.Feedback node B is coupled in second (bearing) input of operational amplifier 48.Transistor seconds 64 is coupling in feedback node B and source signal voltage V _SThe second reference terminal 66 between.In a preferred implementation, this transistor seconds 64 can comprise the MOS device, and wherein source electrode-drain path is coupling between feedback node B and the second reference terminal 66.Particularly, drain terminal 68 is coupled to feedback node B, and source terminal 70 is coupled to the second reference terminal 66.The control terminal of transistor seconds 64 (grid) 72 receiver voltage control signal V _C

Be applied to the drain terminal 68 of second (MOS) transistor 64 at the Node B place via operational amplifier 48 and first (bipolar) transistor 52 at the source signal voltage through decay of node A generation by voltage divider 42.Resistor 44 in the voltage divider 42 and the value of resistor 46 are selected in order to signal V _SDecay to the level of about tens of mV crest voltages.Work in the triode region with good linear in order to ensure second (MOS) transistor 64, it is preferred doing like this.

Resistor 58 and transistor 52 and transistor 64 have formed the variable resistor voltage divider in essence, it is coupling between reference node 60 and the reference node 66, and is arranged to response from source signal voltage and the input voltage control signal V through decay of node A input _CAnd to source signal voltage V _SDecay changeably, for exporting at output node 56.Along with input voltage control signal V _CAmplitude increase, the transistor 52 between output node 56 and the reference node 66 and the effective resistance of transistor 64 reduce.This causes being present in the source signal voltage V through variable attenuation at output node 56 places _SThe corresponding of amplitude reduce.

The formula of the operation of the circuit of description Fig. 4 is as follows:

$V_{\mathrm{DS}}=V_S\·\frac{R_B}{R_A+R_B}$

$I_{\mathrm{DS}}=\frac{\frac{V_{\mathrm{DS}}}{1}}{K\·\frac{W}{L}\·(V_{\mathrm{GS}}-V_{\mathrm{TH}})}=V_S\·\frac{R_B}{R_A+R_B}\·K\·\frac{W}{L}\·(V_{\mathrm{GS}}-V_{\mathrm{TH}})$

$R_{\mathrm{EQ}}=\frac{V_S}{I_{\mathrm{DS}}}-R1=\frac{R_A+R_B}{R_B}\·\frac{1}{K\·\frac{W}{L}\·(V_{\mathrm{GS}}-V_{\mathrm{TH}})}-R1$

$\frac{V_O}{V_S}=\frac{R_{\mathrm{EQ}}}{R1+R_{\mathrm{EQ}}}=1-\frac{R_B}{R_A+R_B}\·R1\·K\·\frac{W}{L}\·(V_{\mathrm{GS}}-V_{\mathrm{TH}})$

V wherein _GSV among=Fig. 4 _C(referring to reference voltage), and R wherein _ABe the resistance of resistor 44, R _BBe the resistance of resistor 46, and R1 is the resistance of resistor 58.

Although clearly do not illustrate in Fig. 4, circuit 40 can also comprise the fixed resistor that is coupling between output node 56 and the reference node 66.

Fig. 5 A is the equivalent schematic through simplifying of circuit shown in Fig. 4 40.This circuit is in fact adjustable votage divider, and wherein fixed resistor R1 (resistor 58 among Fig. 4) is connected in series with variable resistance R2 (being comprised of the transistor 52 among Fig. 4 and transistor 64).Change among (being comprised of transistor 52 and transistor 64) resistor R2 is by V _CControl.

Fig. 5 B be circuit shown in Fig. 4 40 through simplifying the equivalently represented of equivalent schematic.Variable resistance R2 is controlled current source (being comprised of the transistor 52 among Fig. 4 and transistor 64) by variable voltage and substitutes.The electric current of current source is by source signal V _SWith control voltage V _CThe two is controlled.In this case, equivalent resistance may be calculated:

$R_{\mathrm{EQ}}=\frac{V_S}{I_{\mathrm{REQ}}}-R1=\frac{V_S}{g_m\left(V_C\right)\·V_S}-R1=\frac{1}{g_m\left(V_C\right)}-R1$

Circuit among Fig. 4 realizes having source signal V _SBe necessary for the just restriction of (that is, the voltage of node 60 is higher than the voltage of node 66).Its reason is that first (bipolar) transistor 52 is merely able to draw electric current from resistor 58.At this, with V _SBe defined as the voltage between reference node 60 and the reference node 66, wherein the voltage at node 66 places is regarded as reference voltage.For circuit 40, the voltage at node 60 places must be higher than (at node 66 places) reference voltage, and therefore V in this case _SJust be necessary for.

Now Fig. 6 is made reference, Fig. 6 shows the diagram of the voltage control variable resistor circuit 140 that solves the above-mentioned restriction related with the circuit 40 of Fig. 4.Circuit 140 is realized complementary design.Circuit 140 comprises the fixed potentiometer 142 that is formed by resistor 144 and resistor 146.Stride fixed potentiometer 142 and apply source signal voltage V _SVoltage divider 142 is used at the source signal voltage of node A generation through decay.Circuit 140 also comprises operational amplifier 148.First (just) input of operational amplifier 148 is from the source signal voltage of node A reception through decay.Operational amplifier 148 has two lead-out terminals, and these two lead-out terminals have fixing level deviation.In this case, operational amplifier is not the difference output operational amplifier.On the contrary, this amplifier is configured such that the signal of two outputs place of operational amplifier is in same signal but has betwixt the level deviation of 2*V (BE).The first output 149p is applied to the control terminal 150 of the first transistor 152.In a preferred implementation, this first transistor 152 can comprise bipolar device, and wherein control terminal 150 is the base stage of bipolar transistor.First conductive terminal 154 (for example, collector electrode) of the first transistor 152 limits and produces output voltage V _OOutput node 156.Resistor 158 is coupling in the first conductive terminal 154 and source signal voltage V _SThe first reference terminal 160 between.Second conductive terminal 162 (for example, emitter) of the first transistor 152 limits feedback node B.Feedback node B is coupled in second (bearing) input of operational amplifier 48.The second output 149n is applied to the control terminal 151 of transistor seconds 153.In a preferred implementation, this transistor seconds 153 can comprise bipolar device, and wherein control terminal 151 is the base stage of bipolar transistor.The first transistor 152 and transistor seconds 153 have films of opposite conductivity (NPN/PNP).First conductive terminal 155 (for example, emitter) of transistor seconds 153 is coupled to feedback node B.Second conductive terminal 163 (for example, collector electrode) of transistor seconds 153 is coupled to the first branch road 180 of the first current mirroring circuit 182.The second branch road 184 of the first current mirroring circuit 182 is coupled to the first branch road 186 of the second current mirroring circuit 188.The second branch road 190 of the second current mirroring circuit 188 is coupled to output node 156.The first current mirroring circuit 182 and the second current mirroring circuit 188 are the known conventional design of those skilled in the art, and can realize with bipolar transistor or MOS transistor.

The 3rd transistor 164 is coupling in feedback node B and source signal voltage V _SThe second reference terminal 166 between.In a preferred implementation, the 3rd transistor 164 can comprise the MOS device, and wherein source electrode-drain path is coupling between feedback node B and the second reference terminal 166.Particularly, drain terminal 168 is coupled to feedback terminal B, and source terminal 170 is coupled to the second reference terminal 166.The control terminal of the 3rd transistor 164 (grid) 172 receiver voltage control signal V _C

Because the symmetrical structure of the 3rd (MOS) transistor 164, the source electrode of described the 3rd transistor 164 and drain electrode can be inverted according to the voltage (being higher than or being lower than the voltage at reference terminal 166 places) at Node B place.In this case, the electric current in the 3rd transistor 164 can flow on whole both directions in (upper or lower).Therefore, can draw electric current from resistor 158 by first (bipolar) transistor 152, and can electric current be fed in the resistor 158 by second (bipolar) transistor 153 and the first current mirroring circuit 182 and the second current mirroring circuit 188.

Therefore, the circuit among Fig. 6 realizes being applicable to AC input signal (V _SCan for just or negative).When source signal was in its negative half-cycle, the source electrode of the 3rd transistor 164 moved to the B point.In this case, the V of transistor 164 _GSBecome:

$V_C-V_S\·\frac{R_B}{R_A+R_B}$

Rather than V _C(R wherein _ABe the resistance of resistor 144, and R _BResistance for resistor 146).This has introduced certain error in control voltage.But because:

$V_S\·\frac{R_B}{R_A+R_B}$

Be designed to and control voltage V _CTherefore compare much smallerly, can ignore this type of impact.

Now Fig. 7 is made reference, the figure shows as the result of breadboardin and the waveform of operation of the circuit of Fig. 6 is shown.In Fig. 7, VIN refers to source signal voltage V _S, VOUT refers to output voltage V _O, and VGS refers to control voltage V _CInput signal, output signal and control signal are illustrated respectively.Output voltage VO UT is the voltage of striding the variable resistance structure that proposes.Can find out, output signal shows good linearity (all having good linearity for large-signal level and small signal levels) along whole control range.

Although illustrate in the accompanying drawings specific transistor types (bipolar and MOS), but be to be understood that, the transistor of any suitable type all can use, and shown transistor types only is exemplary, and full bipolar design or alternatively full MOS design all be possible.In addition, can for shown in operational amplifier use any suitable amplifying circuit.In addition, shown resistor can be embodied as the transistor with fixed-bias transistor circuit control.

Preamble is described mode by exemplary and non-limiting example abundant and full and accurate description to the utility model illustrative embodiments is provided.Yet, various modifications and improving in the situation that consider together with accompanying drawing and the claim of enclosing will be apparent for the technical staff in the association area that preamble describes.Yet, to instruction of the present utility model all this type of and similar modification will fall within the scope that claim limits as enclosing, of the present utility model.

Claims (19)

1. a variable resistor circuit is characterized in that, comprising:

The fixed attenuation circuit, it is arranged to the source signal through decaying at the first reference node reception sources signal and output;

Operation amplifier circuit, it is arranged to and receives described source signal and feedback signal through decay and generate the first control signal;

The first transistor, it has the control terminal that is arranged to described the first control signal of reception, is arranged to the first conductive terminal of generating output signal, and is arranged to the second conductive terminal that generates described feedback signal; And

Transistor seconds, it is coupling between described the second conductive terminal and the second reference node, and has the control terminal that is arranged to reception the second control signal.

2. variable resistor circuit according to claim 1 is characterized in that, described fixed attenuation circuit is bleeder circuit.

3. variable resistor circuit according to claim 1 is characterized in that, also comprises constant-resistance circuit, and this constant-resistance circuit is coupling between described first conductive terminal and described the first reference node of described the first transistor.

4. variable resistor circuit according to claim 1, it is characterized in that, described operation amplifier circuit be arranged to generate comprise first signal and secondary signal, have the dual output of level deviation betwixt, wherein said first signal is applied to the described control terminal of described the first transistor as described the first control signal.

5. variable resistor circuit according to claim 4, it is characterized in that, also comprise the 3rd transistor, the 3rd transistor has the reception of being arranged to as the control terminal of the described secondary signal of the second control signal, described the 3rd transistor has the first conductive terminal, and this first conductive terminal is coupled to described second conductive terminal of described the first transistor.

6. variable resistor circuit according to claim 5 is characterized in that, described the first transistor and described the 3rd transistor have opposite conduction type.

7. variable resistor circuit according to claim 5 is characterized in that, also comprises:

The first current mirroring circuit, it has the first branch road that is coupled to the described the 3rd transistorized the second conductive terminal, and has the second branch road; And

The second current mirroring circuit, it has the first branch road of described the second branch road that is coupled to described the first current mirroring circuit, and has the second branch road of described the first conductive terminal that is coupled to described the first transistor.

8. a variable resistor circuit is characterized in that, comprising:

The fixed attenuation circuit, it is coupling in and is arranged between the first reference node and the second reference node that receives the variable source signal, and described attenuator circuit is arranged to output through the variable source signal of decay;

Constant-resistance circuit;

Variable resistance circuit, wherein said constant-resistance circuit and the described variable resistance circuit output node place series coupled between described the first reference node and described the second reference node; And

Described variable resistance circuit has and is arranged to the first input that receives described variable source signal through decay and is arranged to the second input that receives the variable resistor control signal, and described variable resistance circuit has the resistance that can change in response to described variable source signal through decay and described variable resistor control signal.

9. variable resistor circuit according to claim 8 is characterized in that, described fixed attenuation circuit is bleeder circuit.

10. variable resistor circuit according to claim 8 is characterized in that, described variable resistance circuit comprises:

The difference input amplifier circuit, it has the first input of the described source signal through decaying of the reception of being arranged to, and has the second input that is arranged to receiving feedback signals, and has the output that is arranged to generation the first control signal;

The first transistor, it has the control terminal that is arranged to described the first control signal of reception, the first conductive terminal that is coupled to described output node, and the second conductive terminal;

Transistor seconds, it has and is arranged to the control terminal that receives described variable resistor control signal, is coupled to the first conductive terminal of described second conductive terminal of described the first transistor, and the second conductive terminal that is coupled to described the second reference node.

11. variable resistor circuit according to claim 10, it is characterized in that, described difference input amplifier circuit be arranged to generate comprise first signal and secondary signal, have the dual output of level deviation betwixt, wherein said first signal is applied to the described control terminal of described the first transistor as described the first control signal.

12. variable resistor circuit according to claim 11, it is characterized in that, also comprise the 3rd transistor, the 3rd transistor has the reception of being arranged to as the control terminal of the described secondary signal of the second control signal, be coupled to the first conductive terminal of described second conductive terminal of described the first transistor, and the second conductive terminal that is coupled to described the second reference node.

13. variable resistor circuit according to claim 12 is characterized in that, described the first transistor and described the 3rd transistor have films of opposite conductivity.

14. variable resistor circuit according to claim 12 is characterized in that, also comprises:

The first current mirroring circuit, it has the first branch road that is coupled between the described the 3rd transistorized described the second conductive terminal and described the second reference node, and has the second branch road; And

The second current mirroring circuit, it has the first branch road of described the second branch road that is coupled to described the first current mirroring circuit, and has the second branch road that is coupled to described output node.

15. a variable resistor circuit is characterized in that, comprising:

The first reference node and the second reference node are striden described the first reference node and described the second reference node applies the variable source signal;

The first resistor;

The second resistor;

Wherein said the first resistor and described the second resistor first node place between described the first reference node and described the second reference node is connected in series;

Operational amplifier, it has the first input that is connected to described first node and the second input that is connected to feedback node;

The 3rd resistor, it is connected between described the first reference node and the output node;

The first transistor, it has the first control terminal of the output that is connected to described operational amplifier, and has the first conductive terminal that is connected to described output node, and has the second conductive terminal that is connected to described feedback node; And

Transistor seconds, it has the second control terminal that is arranged to reception variable resistor control signal, and has the first conductive terminal that is connected to described feedback node and the second conductive terminal that is connected to described the second reference node.

16. variable resistor circuit according to claim 15 is characterized in that, described the first transistor is bipolar transistor, and described transistor seconds is MOS transistor.

17. variable resistor circuit according to claim 15, it is characterized in that, described operation amplifier circuit be arranged to generate comprise first signal and secondary signal, have the dual output of level deviation betwixt, wherein said first signal is applied to the described control terminal of described the first transistor.

18. variable resistor circuit according to claim 17, it is characterized in that, also comprise the 3rd transistor, the 3rd transistor has and is arranged to the control terminal that receives described secondary signal from described dual output, and have the first conductive terminal that is connected to described feedback node, and have the second conductive terminal.

19. variable resistor circuit according to claim 18 is characterized in that, also comprises:

The first current mirroring circuit, it has the input that is connected to the described the 3rd transistorized described the second conductive terminal; And

The second current mirroring circuit, it has the input of the output that is connected to described the first current mirror, and described the second current mirroring circuit also has the output that is connected to described output node.

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