CN202648610U - Color code position information recording device based on FPGA (field-programmable gate array) timestamp - Google Patents

Abstract

The utility model relates to a color code position information recording device based on an FPGA (field-programmable gate array) timestamp. An FPGA timing module is adopted for producing high-frequency timestamp information, rising edge or falling edge of each color code signal is recorded through the high-frequency timestamp information, and position offset corresponding to each color code signal is estimated through the duration of each position signal after frequency quadrupling and the time offset of the color code signal, so that the measurement precision is greatly improved; and simultaneously, detected color code information which is too late to process is buffered through an annular FIFO (first-in first-out) buffer area, so that the requirements for high-speed recording of the color code position information can be met. Compared with an ordinary color code signal recording method, the recording method can achieve 10ns and even higher precision and meet the requirements for high-speed and high-precision recording of the color code position information in packaging, printing and other industries.

Description

Colour code positional information pen recorder based on the FPGA timestamp

Technical field

The colour code that the utility model relates in a kind of packing, the printing industry detects information record carrier, relates in particular to a kind of pen recorder of high-speed, high precision of the colour code positional information based on the FPGA timestamp.

Background technology

In the colour code detection field of the industries such as packing, printing, generally adopt the positional information after direct record coding device 4 frequencys multiplication to realize that the method has simply, the characteristics that understand are widely applied in the industries such as packing, printing.But along with packing and print field are more and more higher to the requirement of colour code accuracy of detection, the positional information after simple record coding device 4 frequencys multiplication then can cause following two problems: the first, and record the result and exist the serious situation of discretize; The second, realize by MCU processor interrupt response merely the method for Color mark signal record existing the possibility of losing the colour code positional information, so this method can not satisfy the sector gradually to the requirement of colour code accuracy of detection.

Therefore, how to become a problem demanding prompt solution with the accurate positional information of measuring Color mark signal at a high speed.

Summary of the invention

In order to solve the problems of the technologies described above, the utility model provides a kind of colour code positional information pen recorder based on the FPGA timestamp, it is characterized in that: comprise FPGA timing module, position signalling edge detection module, label information detection module, position estimation; Described FPGA timing module adopts crystal oscillator to carry out timing, and provides corresponding timestamp information; Described position signalling edge detection module can detection signal rising edge or negative edge saltus step, and combining with described FPGA timing module to provide the time of origin of quadruple position signalling rising edge or negative edge; Described label information detection module detects rising edge or the negative edge of Color mark signal, and combining with described FPGA timing module to provide the time of origin of Color mark signal rising edge or negative edge; Described position estimation estimates the corresponding positional information of Color mark signal according to Color mark signal with respect to the shift time of quadruple position signalling.

In technique scheme, further comprise the front-end processing module, described front-end processing module is to Color mark signal and reference signal is carried out the filtering processing and polarity is selected.

In technique scheme, further comprise the colour code message buffer, described colour code message buffer is used for the colour code information that detects that buffer memory has little time to process.

In technique scheme, described colour code message buffer is annular fifo buffer.

The utility model has been obtained following technique effect:

The method of Color mark signal is recorded in the recording method of the high frequency time stamp by FPGA, can improve greatly measuring accuracy, reduces the discretize of measuring position, and its data are more concentrated; Simultaneously, the control adjusted value that high-precision measurement brings can overcome the error problem of the scrambler of low resolution more accurately with stable.Method based on the Color mark signal of FPGA timestamp record algorithm has been improved measuring accuracy and measurement effect greatly.

Description of drawings

Fig. 1 is the recording method synoptic diagram of the high-speed, high precision of colour code positional information;

Fig. 2 is the graph of a relation of label information and FPGA clock signal;

Fig. 3 is reference signal and marking signal are selected flow process by digital filtering and polarity synoptic diagram;

Fig. 4 is that reference signal and marking signal pass through the digital filtering synoptic diagram.

Mark among the figure: 11-high precision record colour code position module; The configurable filtration module of 12-; 13-hardware fifo module.

Embodiment

Understand and enforcement the utility model for the ease of those of ordinary skills, below in conjunction with the drawings and the specific embodiments the utility model is described in further detail.

The utility model has increased FPGA timing module, position signalling edge detection module, label information detection module, position estimation and colour code message buffer on existing colour code positional information recording technique.Wherein, the FPGA timing module adopts crystal oscillator to carry out timing, by producing high-frequency clock behind its inner phase locking frequency multiplying, minimum accuracy of timekeeping can reach nanosecond, the category that belongs to the hardware timing can provide the time point that each signal produces, finishes or change, and provide corresponding timestamp information.Position signalling edge detection module can detection signal rising edge or negative edge saltus step, combines with the FPGA timing module and namely knows the time of origin of signal rising edge or negative edge.The label information detection module can detect rising edge or the negative edge of Color mark signal, combines with the FPGA timing module and namely knows the time of origin of signal rising edge or negative edge.Position estimation is determined the corresponding time span in each position in the 4 frequency multiplication position signallings according to position signalling rising edge or the negative edge of the output of position signalling edge detection module, determine the position P of the 4 frequency multiplication position signallings that this Color mark signal is corresponding by the Color mark signal of label information detection module output, the time span Tp that mistiming by edge transition before and after the P of position (namely from a rising edge to following closely negative edge or from a negative edge to following closely rising edge) calculating location P continues, and the moment distance and position P time span Tm of the zero hour occurs in the Color mark signal that calculates the output of label information detection module, estimate the corresponding position of Color mark signal by formula P+ (Tm/Tp) * L, L is the corresponding length of position signalling interval after 4 frequencys multiplication, i.e. minimum position resolution in the existing colour code positional information recording technique.

Because the precision of FPGA timing module is very high, position so of the present utility model registration accuracy can reach on positional precision rank corresponding to 10ns.

High-speed, high precision record for the Color mark signal positional information, relate generally to three aspect problems, the one, the high precision record of Color mark signal positional information, the 2nd, can dispose the polarity of input signal and the time constant of filtering, the 3rd, the high speed of all Color mark signal positional informations is record exhaustively.

(1) the high precision record of Color mark signal positional information

The relation of label information and clock signal as shown in Figure 2, pA, pB, pC, pD, pE, pF, pG are the A of incremental encoder, and the B signal is by position information such as available 4 frequencys multiplication after the quadruple, Mark1, Mark2, Mark3 are the label information Mark information of left timestamp in the above, T2, to be label information inner a frequency multiplication information and the difference of previous temporal information point for T3, and T1, T4 are two differences between the quadruple signal.If just record merely Mark2 and the information of Mark3 on encoder position, then Mark2 is pB, Mark3 is pF, according to this recording mode, record value problem when accuracy requirement is not high is little, has the shake of maximum one-periods, if but version rod girth is larger, the line number of scrambler is lower, and the actual error value then may be very large, to the obvious effect of follow-up measuring accuracy.

And after the high-resolution timestamp recording mode in use the utility model, as shown in Figure 2, the estimated position of Mark2 is pB+ (T2/T1) * L, this moment L=pD-pC, the estimated position of Mark3 is pF+ (T3/T4) * L, this moment L=pG-pF.

(2) time constant of the polarity of configurable input signal and filtering

By the configuration of front-end processing module, can obtain REF signal and MARK signal after filtering and polarity are selected as shown in Figure 3.

Filtration module as shown in Figure 4, MARK signal and REF signal can effectively be eliminated the signal of burr after by filtering, and some false burr signals are eliminated.Again by the signal selecting switch of rear one-level can be correct NPN signal or the PNP signal of processing front end, improve ability and reliability that signal is processed.

(3) high speed of all Color mark signal positional informations record exhaustively

In the Color mark signal of the polychrome group of some high speed printing detects, there is a large amount of Mark signals to exist, read the information of these marking signals if rely on merely the interruption of processor, not only take in a large number the load of processor section, and exist processor to come reading out data not and the situation that causes data to lose.Do not lose for effective each signal that guarantees, the spy sets up the high-speed and continuous collection that a colour code message buffer is realized data in FPGA inside, and the colour code message buffer preferably adopts the mechanism of the annular fifo buffer of hardware to realize.

Take Fig. 2 as the example explanation, if system has come the information of 3 marking signals within the very short time interval, if there is not the FIFO mechanism of hardware, before finishing, the information processing of Mark1 just occured with regard to Mark2 information, then possibility MCU is merely able to process the information of Mark1, the information dropout of Mark2, if MCU processes than very fast, Mark2 information just occurs after the information processing of Mark1 is finished, information that then may can normal process Mark2.

If hardware FIFO is arranged, when the Mark1 label information has come, enter to interrupt processing, finding has 1, processes.When processing, possible Mark2 has also come, and FPGA puts it among the FIFO, can not lose, and again notifies MCU etc. pending, by that analogy, can know Mark1, and Mark2, Mark3 can not lose, processing that can both be correct.

Above-mentioned only for the preferred embodiment of the utility model principle is described, all equalizations of doing according to the utility model scope change and modify, and are all the utility model claim and contain.

Claims (4)

1. the colour code positional information pen recorder based on the FPGA timestamp is characterized in that: comprise FPGA timing module, position signalling edge detection module, label information detection module, position estimation; Described FPGA timing module adopts crystal oscillator to carry out timing, and provides corresponding timestamp information; Described position signalling edge detection module can detection signal rising edge or negative edge saltus step, and combining with described FPGA timing module to provide the time of origin of quadruple position signalling rising edge or negative edge; Described label information detection module detects rising edge or the negative edge of Color mark signal, and combining with described FPGA timing module to provide the time of origin of Color mark signal rising edge or negative edge; Described position estimation estimates the corresponding positional information of Color mark signal according to Color mark signal with respect to the shift time of quadruple position signalling.

2. the colour code positional information pen recorder based on the FPGA timestamp according to claim 1 is characterized in that: further comprise the front-end processing module, described front-end processing module is to Color mark signal and reference signal is carried out the filtering processing and polarity is selected.

3. the described colour code positional information pen recorder based on the FPGA timestamp of any one according to claim 1-2, it is characterized in that: further comprise the colour code message buffer, described colour code message buffer is used for the colour code information that detects that buffer memory has little time to process.

4. the colour code positional information pen recorder based on the FPGA timestamp according to claim 3, it is characterized in that: described colour code message buffer is annular fifo buffer.

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