CN202634376U - Filter circuit based on filter - Google Patents
Filter circuit based on filter Download PDFInfo
- Publication number
- CN202634376U CN202634376U CN 201220316545 CN201220316545U CN202634376U CN 202634376 U CN202634376 U CN 202634376U CN 201220316545 CN201220316545 CN 201220316545 CN 201220316545 U CN201220316545 U CN 201220316545U CN 202634376 U CN202634376 U CN 202634376U
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- filter
- signal input
- filter circuit
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Abstract
The utility model discloses a filter circuit based on a filter. The filter circuit comprises a filter, wherein the filter comprises 8 pins, wherein the first pin is connected with the signal input end of a CMOS (complementary metal oxide semiconductors) clock, the second pin is connected with the signal input end of a TTL (transistor-transistor logic) level clock, the third pin is connected with the fourth pin, the fifth pin is connected with a signal output end, the seventh pin is connected with a positive supply V<+>, and the eighth pin is connected with the signal input end. By adopting the structure, the filter circuit is higher in stability and better in filter effect.
Description
Technical field
The utility model relates to a kind of filter circuit, specifically is based on the filter circuit of filter.
Background technology
Filter (filter) is a kind of device that is used for eliminating jamming incoherent signal, obtains pure direct current with inputing or outputing through filtration.To the circuit that the frequency or the frequency beyond this frequency of CF are carried out effective filtering, be exactly filter, its function obtains a CF exactly or eliminates a CF.Butterworth quadravalence switching capacity low pass filter is the chief component of filter circuit, adopts the dual power supply of Schmidt trigger oscillator self-timing usually.The general filter or the less stable of filter circuit, the factor that influences filter or filter circuit stability is more, is difficult for controlling.
The utility model content
The utility model provides the filter circuit based on filter, has solved filter or filter circuit less stable in the past, and filter effect is undesirable, and is difficult for controlling the problem of destabilizing factor.
The utility model is that the technical solution problem mainly realizes through following technical scheme: the filter circuit based on filter, comprise filter, and said filter comprises 8 pins; The 1st pin is connected with the cmos clock signal input part; The 2nd pin is connected with the Transistor-Transistor Logic level clock signal input terminal, and the 3rd pin is connected with the 4th pin, and the 5th pin connects signal output part; The 7th pin is connected with positive supply V+, and the 8th pin connects signal input part.
The 3rd pin, the 4th pin of said filter all are connected with earth terminal.
Be connected with between the 6th pin of said filter and the earth terminal between resistance R 1, the 6 pin and the positive supply V+ and be connected with resistance R 2.
Be connected with resistance R F between the 1st pin of said filter and the 2nd pin, and be connected with capacitor C F between the 1st pin and the earth terminal.
The 3rd pin and the 4th pin of said filter all meet negative supply Vss.
Said filter is a Butterworth quadravalence switching capacity low pass filter, and its model is TLC04.Butterworth quadravalence switching capacity low pass filter comprises 8 pins, and 1 pin is an input end of clock, and 2 pin are clock resistance terminal; 3 pin are level mobile terminals, and 4 pin are negative supply inputs, and 5 pin are filter outputs; 6 pin are earth terminals, and 7 pin are positive supply inputs, and 8 pin are filter input ends.The stability of the cut-off frequency of Butterworth quadravalence switching capacity low pass filter is only relevant with clock frequency stability, and the cut-off frequency clock is adjustable, and its clock is 50:1 with the ratio of cut-off frequency.
The utility model compared with prior art has the following advantages and beneficial effect:
(1) the utility model adopts Butterworth quadravalence switching capacity low pass filter; It is the chief component of filter circuit; Usually adopt the dual power supply of Schmidt trigger oscillator self-timing; The stability of the cut-off frequency of Butterworth quadravalence switching capacity low pass filter is only relevant with clock frequency stability, therefore, is easy to obtain advantages of higher stability.
(2) the utility model deft design is easy to realize and control, and can obtains filter effect preferably.
Description of drawings
Fig. 1 is the structural representation of the embodiment 1 of the utility model;
Fig. 2 is the structural representation of the embodiment 2 of the utility model.
Embodiment
Below in conjunction with embodiment the utility model is done further to specify, but the execution mode of the utility model is not limited thereto.
Embodiment 1:
As shown in Figure 1, the utility model comprises filter, and filter comprises 8 pins; The 1st pin is connected with the cmos clock signal input part; The 2nd pin is connected with the Transistor-Transistor Logic level clock signal input terminal, and the 3rd pin is connected with the 4th pin, and the 5th pin connects signal output part; The 7th pin is connected with positive supply V+, and the 8th pin connects signal input part.
The 3rd pin, the 4th pin of the filter of present embodiment all are connected with earth terminal.
Be connected with between the 6th pin of the filter of present embodiment and the earth terminal between resistance R 1, the 6 pin and the positive supply V+ and be connected with resistance R 2.
It is the Butterworth quadravalence switching capacity low pass filter of TLC04 that the filter of present embodiment is selected model for use, and TLC04 is a kind of as Butterworth quadravalence switching capacity low pass filter, has stability and adjustability preferably.
Embodiment 2:
As shown in Figure 2, the utility model comprises filter, and filter comprises 8 pins; The 1st pin is connected with the cmos clock signal input part; The 2nd pin is connected with the Transistor-Transistor Logic level clock signal input terminal, and the 3rd pin is connected with the 4th pin, and the 5th pin connects signal output part; The 7th pin is connected with positive supply V+, and the 8th pin connects signal input part.
Be connected with resistance R F between the 1st pin of the filter of present embodiment and the 2nd pin, and be connected with capacitor C F between the 1st pin and the earth terminal.
The 3rd pin and the 4th pin of the filter of present embodiment all meet negative supply Vss.
It is the Butterworth quadravalence switching capacity low pass filter of TLC04 that the filter of present embodiment is selected model for use, and TLC04 is a kind of as Butterworth quadravalence switching capacity low pass filter, has stability and adjustability preferably.
The operation principle of the utility model is: at first, signal gets into from the 8th pin of filter, realizes in filter that then clock shaping, clock level move, and exports from the 5th pin through filtered signal.
As stated, then can realize the utility model well.
Claims (6)
1. based on the filter circuit of filter, it is characterized in that: comprise filter, said filter comprises 8 pins; The 1st pin is connected with the cmos clock signal input part; The 2nd pin is connected with the Transistor-Transistor Logic level clock signal input terminal, and the 3rd pin is connected with the 4th pin, and the 5th pin connects signal output part; The 7th pin is connected with positive supply V+, and the 8th pin connects signal input part.
2. the filter circuit based on filter according to claim 1 is characterized in that: the 3rd pin, the 4th pin of said filter all are connected with earth terminal.
3. the filter circuit based on filter according to claim 1 is characterized in that: be connected with between the 6th pin of said filter and the earth terminal between resistance R 1, the 6 pin and the positive supply V+ and be connected with resistance R 2.
4. the filter circuit based on filter according to claim 1 is characterized in that: be connected with resistance R F between the 1st pin of said filter and the 2nd pin, and be connected with capacitor C F between the 1st pin and the earth terminal.
5. the filter circuit based on filter according to claim 4 is characterized in that: the 3rd pin and the 4th pin of said filter all meet negative supply Vss.
6. the filter circuit based on filter according to claim 1 is characterized in that: said filter is a Butterworth quadravalence switching capacity low pass filter, and its model is TLC04.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220316545 CN202634376U (en) | 2012-07-03 | 2012-07-03 | Filter circuit based on filter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220316545 CN202634376U (en) | 2012-07-03 | 2012-07-03 | Filter circuit based on filter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202634376U true CN202634376U (en) | 2012-12-26 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220316545 Expired - Fee Related CN202634376U (en) | 2012-07-03 | 2012-07-03 | Filter circuit based on filter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202634376U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103532514A (en) * | 2012-07-03 | 2014-01-22 | 四川蓝讯宝迩电子科技有限公司 | Filter circuit based on wave filter |
-
2012
- 2012-07-03 CN CN 201220316545 patent/CN202634376U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103532514A (en) * | 2012-07-03 | 2014-01-22 | 四川蓝讯宝迩电子科技有限公司 | Filter circuit based on wave filter |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20121226 Termination date: 20130703 |