CN202602680U

CN202602680U - Small data volume communication circuit for data bus

Info

Publication number: CN202602680U
Application number: CN 201220237115
Authority: CN
Inventors: 李辉
Original assignee: CHONGQING FUZIK TECHNOLOGY CO LTD
Current assignee: CHONGQING FUZIK TECHNOLOGY CO LTD
Priority date: 2012-05-24
Filing date: 2012-05-24
Publication date: 2012-12-12
Anticipated expiration: 2022-05-24

Abstract

The utility model belongs to the field of electronic communication and in particular relates to a small data volume communication circuit for a data bus. The small data volume communication circuit comprises the data bus, a pull-up circuit module, a data sending module, a data receiving module, a data processing module and a node module, wherein the data sending module and the data receiving module are both electrically connected between the data bus and the data processing module, and the data processing module is electrically connected with the node module. The data bus is electrically connected with the data processing module through the data sending module and the data receiving module to build a communication path with the node module. The small data volume communication circuit for the data bus is low in cost, good in timeliness and especially suitable for a LIN bus of a branch electronic control unit (ECU) communication network of a vehicle with small communication data volume ratio.

Description

A kind of small data quantity telecommunication circuit that is used for data/address bus

Technical field

The utility model belongs to electronic communication field, specifically is exactly a kind of small data quantity telecommunication circuit that is used for data/address bus.

Background technology

Along with the expansion of electronic technology in automobile; Particularly after the eighties in 20th century; MCU (Micro Control Unit micro-control unit) has obtained extensive use in automobile; The In-vehicle networking based on data communication occurred, this provides effective solution route for improving automotive performance with minimizing wire harness quantity.CAN (the Controller Area Network controller local area network) bus that Bosch releases has outstanding reliability, real-time and flexibility, thereby has obtained the well recognized of industry, and the CAN bus has become the main flow bussing technique of mass car.Certainly; The CAN bussing technique is also in continuous development; LIN (Local Interconnect Network local interconnect network) is a kind of bus network cheaply; Its exploitation purpose is to remedy the deficiency of CAN bus, extensively applies in the ECU of branch (the Electronic Control Unit electronic control unit) communication network of vehicle.

The LIN bus physical layer needs an interface chip usually, like the TJA1020 of NXP company or the MCP201 of MICROCHIP company etc.The LIN bus can be used in the network less than 16 nodes; As shown in Figure 1, in the LIN bus, have a host node and one at least from node, therefore smaller in the data volume of communication; And have only one or two from the short-range communication network of node, its cost is higher relatively; Communication must be initiated by host node, realizes the data upload of each node through poll, and after the host node dormancy, can't the active upload data from node, so real-time is relatively poor.

The utility model content

The purpose of the utility model provides a kind of small data quantity telecommunication circuit that is used for data/address bus, and its cost is low and real-time good.

For realizing above-mentioned purpose; The utility model has adopted following technical scheme: a kind of small data quantity telecommunication circuit that is used for data/address bus; Comprise data/address bus, pull-up circuit module and node module; Described pull-up circuit module and data/address bus electrically connect; Also comprise data transmission blocks, data reception module and data processing module, described data transmission blocks and data reception module are electrically connected with data/address bus, and described data processing module and node module, data transmission blocks, data reception module electrically connect.

Data processing module in the utility model is made up of microcontroller integrated chip and power supply thereof, and the data sending terminal mouth and the Data Receiving port of this microcontroller integrated chip electrically connect data transmission blocks and data reception module respectively.

Data transmission blocks in the utility model and data reception module can be the dual comparator integrated chips, also can constitute through single comparator and peripheral circuit thereof respectively.

The beneficial effect of the utility model is: after adopting said structure; Communicating by letter between node module and data/address bus realizes through data processing module, data transmission blocks and data reception module; Cancel the used higher interface chip of Costco Wholesale of bus physical layer, thereby reduced cost; Internodal communication is transmitted with handshake method, does not distinguish main and subordinate node, and arbitrary node all can be used as the initiating equipment of data, and the dormancy of each node device can wake the real-time height through bus up.

Description of drawings

In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art; To do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below; Obviously, the accompanying drawing in describing below only is some embodiment of the utility model, for those of ordinary skills; Under the prerequisite of not paying creative work property, can also obtain other accompanying drawing according to these accompanying drawings.

Fig. 1 connects sketch map for the interface communication circuit that is used for the automobile LIN bus in the prior art;

Fig. 2 is the circuit block diagram of the utility model;

Fig. 3 is used for a kind of specific embodiment of automobile LIN bus for the utility model circuit connects sketch map;

Interface communication circuit when Fig. 4 contains a plurality of node module for the utility model connects sketch map.

Embodiment

To combine the accompanying drawing among the utility model embodiment below, the technical scheme among the utility model embodiment is carried out clear, intactly description, obviously, described embodiment only is the utility model part embodiment, rather than whole embodiment.Based on the embodiment in the utility model, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the utility model protection.

As shown in Figure 2; A kind of small data quantity telecommunication circuit that is used for data/address bus; Comprise data/address bus, pull-up circuit module 10 and node module 50; Described pull-up circuit module 10 electrically connects with data/address bus; Also comprise data transmission blocks 20, data reception module 30 and data processing module 40, described data transmission blocks 20 is electrically connected with data/address bus with data reception module 30, and described data processing module 40 electrically connects with node module 50, data transmission blocks 20, data reception module 30.The utility model has been realized communicating by letter between node module 50 and data/address bus through data processing module 40, data transmission blocks 20 and data reception module 30, has cancelled the used higher interface chip of Costco Wholesale of bus physical layer, thereby has reduced cost.

In the utility model specific embodiment; The pull-up circuit module 10 of described small data quantity telecommunication circuit; Can select setting to get final product according to prior art, as shown in Figure 3, in this specific embodiment; Pull-up circuit is that power supply, diode and the resistance of 12V is that the resistance of 1k Ω constitutes by voltage, and the setting of pull-up circuit is to guarantee the driving force and the antijamming capability of bus.

Further; As shown in Figure 3; The data processing module 40 of the utility model is made up of microcontroller integrated chip and power supply thereof; Described microcontroller integrated chip can be but be not limited to 8 single-chip microcomputers that its concrete model in the utility model specific embodiment is the STM8S208MB of ST Microelectronics.This controller can be provided for port uC, data sending terminal mouth TX and the Data Receiving port RX of connected node according to prior art, sets up through above-mentioned port and communicates by letter with node module 50 with data transmission blocks 20, data reception module 30.

Special; Described data transmission blocks 20 can be dual comparator integrated chip (not shown) with data reception module 30; Concrete; The model of described dual comparator integrated chip can be LM2903, can be provided with this chip according to prior art, and

data transmission blocks

20 and 30 liang of modules of data reception module are realized through a slice LM2903.

Perhaps, as shown in Figure 3 as the another kind of selectivity embodiment of the utility model, described data transmission blocks 20, data reception module 30 electrically connect through divider resistance R.Divider resistance R resistance is set to 10k Ω in this specific embodiment, and the setting of divider resistance R is the current limliting dividing potential drop, realizes the protective effect to data sending module 20 and data reception module 30.

Further; As shown in Figure 3; Described data transmission blocks 20 comprises the first comparator P1 and divider resistance R; The positive input terminal of the first comparator P1 is connected with the data sending terminal mouth of data processing module 40, and its negative input end connects reference voltage, and its output and data/address bus, divider resistance R electrically connect; Described data reception module 30 comprises the second comparator P2 and divider resistance R; The output of the second comparator P2 is connected with the Data Receiving port of data processing module 40; Its negative input end is connected with the negative input end of the first comparator P1, and its positive input terminal electrically connects through divider resistance R and data/address bus.

Concrete; The negative input end of the described first comparator P1 connects the reference voltage that magnitude of voltage is 2.5V; The TX port of positive input termination microcontroller STM8S208MB; The positive input port of the first comparator P1 receives the logic level signal from the TX port of STM8S208MB, and compares with the reference voltage of 2.5V, thereby to bus output digital signal; The RX port of the output termination microcontroller STM8S208MB of the described second comparator P2; The negative input end of the negative input end and the first comparator P1 is with the reference voltage that meets 2.5V; When bus is sent data; Impose on the second comparator P2 through divider resistance R, the second comparator P2 is through comparing with reference voltage, and its output signal is sent to STM8S208MB through the RX port.

The utility model is not limited to the specific embodiment of individual node pattern, and the layout of a plurality of nodes is as shown in Figure 4, and node is not distinguished the principal and subordinate, and arbitrary node all can be used as the initiating equipment of data, and the dormancy of each equipment can wake up through bus.Can adopt common serial communication protocol between node, realize transmission with handshake method, promptly receiving node must be replied the initiation node and whether correctly accepted data.Owing to be regardless of principal and subordinate and shared bus between node, preferred, it is a frame that 4 bytes are set in the specific embodiment of the utility model, and first byte is a control word, and the 2nd, 3 byte is data, and the 4th byte is verification, and control word is in order to management node quantity; The design of number of nodes is not more than three, and conflict back random delay function is set, and delay time is less than 100ms, to guarantee data correct transmission in time.

The utility model is particularly suitable for the real-time communication module that two needs carry out the small data quantity transmission, like a key start-up control device and a gsm module of automobile.Gsm module can send the startup vehicle, control informations such as switch car door; And a key start-up control module can be responded the gsm module car status information.Use the utility model, control information and state information can communicate through the Frame that comprises the 1bit Data Identification; Arbitrary node all can be used as the initiating equipment of data in the utility model, and outstanding real-time characteristics can satisfy a key start-up control module all needs active upload data and frequent requirement of communicating by letter with gsm module.

The above is merely the preferred embodiment of the utility model; Not in order to restriction the utility model; All within the spirit and principle of the utility model, any modification of being done, be equal to replacement, improvement etc., all should be included within the protection range of the utility model.

Claims

1. small data quantity telecommunication circuit that is used for data/address bus; Comprise data/address bus, pull-up circuit module (10) and node module (50); Described pull-up circuit module (10) electrically connects with data/address bus; It is characterized in that: also comprise data transmission blocks (20), data reception module (30) and data processing module (40); Described data transmission blocks (20) and data reception module (30) are electrically connected with data/address bus, and described data processing module (40) electrically connects with node module (50), data transmission blocks (20), data reception module (30).

2. a kind of small data quantity telecommunication circuit that is used for data/address bus according to claim 1, it is characterized in that: described data processing module (40) is made up of microcontroller integrated chip and power supply thereof.

3. a kind of small data quantity telecommunication circuit that is used for data/address bus according to claim 2 is characterized in that: described microcontroller integrated chip is that model is 8 single-chip microcomputers of STM8S208MB.

4. a kind of small data quantity telecommunication circuit that is used for data/address bus according to claim 1 is characterized in that: described data transmission blocks (20) and data reception module (30) are the dual comparator integrated chip.

5. a kind of small data quantity telecommunication circuit that is used for data/address bus according to claim 4, it is characterized in that: the model of described dual comparator integrated chip is LM2903.

6. a kind of small data quantity telecommunication circuit that is used for data/address bus according to claim 1 is characterized in that: described data transmission blocks (20), data reception module (30) electrically connect through a divider resistance.

7. a kind of small data quantity telecommunication circuit that is used for data/address bus according to claim 6; It is characterized in that: described data transmission blocks (20) comprises first comparator (P1) and divider resistance (R); The positive input terminal of first comparator (P1) is connected with the data sending terminal mouth (TX) of data processing module (40); Its negative input end connects reference voltage, and its output and data/address bus, divider resistance electrically connect.

8. a kind of small data quantity telecommunication circuit that is used for data/address bus according to claim 7; It is characterized in that: described data reception module (30) comprises second comparator (P2) and divider resistance (R); The output of second comparator (P2) is connected with the Data Receiving port (RX) of data processing module (40); Its negative input end is connected with the negative input end of described first comparator (P1), and its positive input terminal electrically connects through divider resistance (R) and data/address bus.