CN202589515U - Intelligent electrocardiogram monitoring system - Google Patents
Intelligent electrocardiogram monitoring system Download PDFInfo
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- CN202589515U CN202589515U CN 201220238642 CN201220238642U CN202589515U CN 202589515 U CN202589515 U CN 202589515U CN 201220238642 CN201220238642 CN 201220238642 CN 201220238642 U CN201220238642 U CN 201220238642U CN 202589515 U CN202589515 U CN 202589515U
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Abstract
The utility model discloses an intelligent electrocardiogram monitoring system. The system comprises a host server and at least one terminal device, wherein the terminal device is arranged at a patient's, the terminal device is in communication connection with the host server through wireless network connection and an internet network, the terminal device comprises a sampling circuit, a filter circuit, an analog digital conversion circuit, a micro-controller, a memory, a human interface and a communication interface, the sampling device is connected with the filter circuit, the filter circuit is connected with the analog digital conversion circuit, the host server comprises an access computer, a database, an expert system, background backup and a view terminal, the access computer and the database are communicated mutually, and the database, the expert system and the background backup are communicated mutually. By the aid of the system, the patient can be monitored in real time, abnormal information can be captured and found and is notified to the patient, disease can be found in the early stage and the patient can be treated early. Simultaneously, the system is operated by hands and is not limited by environment.
Description
Technical field
This utility model relates to a kind of electrocardio-monitor, in particular, relates to a kind of long-distance intelligent electrocardiogram monitor system.
Background technology
Raising along with social progress, people's living standard; Cardiovascular disease has become the No.1 problem of contemporary society; The cardiovascular diseases has become No.1 killer according to statistics, and 3,000,000 people that have an appointment every year die from cardiovascular disease, and in other words per 4 routine people just have a people to die from cardiovascular disease.
A kind of portable electrocardiograph is provided in the prior art, and this instrument comprises main frame and telescopic probe front end of a wrist formula.Main frame is responsible for the processing and the demonstration of acquired signal, and the probe front end can be with hands by realize hands and the cardiac electrical collection in chest in the chest.
In addition, also have a kind of three electrode electrocardio cellphones of mobile phone style, this instrument is integrated three electrodes on the equipment of a mobile phone pattern, need grasp the equipment upper end during test electrocardio and be adjacent to the chest to the lower end.
These two kinds of portable devices can be realized electrocardiogram acquisition easily.But, utilize the mode in chest not to be suitable for the too fat to move situation of clothing in winter, and to utilize the hands breast be not the pattern of standard as the electrocardio of electrode collection, its diagnostic value is unknown.
The utility model content
This utility model technical problem to be solved is, overcomes the shortcoming of prior art, provides a kind of as long as use bimanualness, do not receive environmental limitations, in time patient's electrocardio monitored, and catches the intelligent cardiac monitor system of the information that notes abnormalities.
In order to solve above technical problem; This utility model provides the intelligent cardiac monitor system; Comprise that host server and at least one are arranged at the terminal unit at patient place, said terminal unit is communicated by letter with host server with the internet network through the wireless network connection and is connected;
Said terminal unit comprises sample circuit, filter circuit, analog to digital conversion circuit, microprocessor, memorizer, man-machine interface and communication interface, and said sample circuit is connected with said filter circuit, and the electrocardiogram (ECG) data of gathering is sent to filter circuit; Said filter circuit is connected with analog-digital conversion circuit as described; Said microprocessor is connected with analog-digital conversion circuit as described, said memorizer, said man-machine interface and said communication interface;
Said host server comprises and inserts computer, data base, specialist system, backstage backup and check the terminal, connection, calling and the data interaction at said access Computer Processing terminal, and with said data base's intercommunication; The intercommunication of said data base and said specialist system and the backup of said backstage; Said specialist system carries out preparatory diagnostic test to patient's data, with the intercommunication of said backstage backup, and data are sent to check the terminal.
Be that the communication interface of said terminal unit comprises gsm module and the SIM circuit and the antenna circuit that are connected with said GSM module to further qualification scheme of this utility model.
Further; Said gsm module comprises chip SIM900, and 28 series connection back parallel connections form the UART interface that is connected with microprocessor with resistance R with resistance R 23, resistance R 24, resistance R 25, resistance R 26, resistance R 27 respectively for the foot 3 of said chip SIM900, foot 4, foot 7, foot 8, foot 9, foot 10; The foot 16 of said chip SIM900 forms the reseting port of gsm module with after resistance R 17 is connected; Foot 27 forms debugging interface with foot 28; Foot 30, foot 31, foot 32, foot 33 and foot 34 are connected with said SIM circuit; Foot 52 is the electric wire emission interface, is connected with said antenna circuit; Foot 55, foot 56 and foot 57 are the power supply power supply interface, are connected with power supply; Foot 60 is connected with said cable circuit; Foot 17, foot 18, foot 29, foot 39, foot 45, foot 46, foot 53, foot 54, foot 58, foot 59, foot 61, foot 62, foot 63, foot 64 and foot 65 ground connection.
Further; Said SIM circuit comprises SIM CON2, electrostatic protection chip U1, resistance R 9, resistance R 10, resistance R 11, resistance R 12 and capacitor C 1; The foot 1 of said SIM CON2 is connected the back with the foot 3 of said electrostatic protection chip U1 and is connected with resistance R 11 with foot 4, form input port SIM_CLK; The foot 2 of said SIM CON2 is connected the back connects with resistance R 10 with foot 1, forms input port SIM_RST; Said input port SIM_RST connects with resistance R 9 and forms power interface VDD_EXT; The foot 4 of said SIM CON2 is connected the back and is connected with the foot 3 of SIM CON2 with capacitor C 1, the foot 3 of said SIM CON2 is connected with the foot 4 of said electrostatic protection chip U1; The foot 5 of said SIM CON2 is put sky; The foot 6 of said SIM CON2 is connected back the series connection with resistance R 12 with the foot 3 of said electrostatic protection chip U1 and forms input port SIM_DATA with foot 6; The foot 6 of said electrostatic protection chip U1 forms input port SIM_PRESENCE; Foot 2 ground connection of said electrostatic protection chip U1.
Further, said antenna circuit comprises antenna CON1, resistance R 1, resistance R 2, capacitor C 30 and capacitor C 31, and said antenna CON1 connects with resistance R 2 and resistance R 1, and said resistance R 1 is connected with said gsm module; Said capacitor C 30 and capacitor C 31 and resistance R 1 and resistance R 2 parallelly connected back ground connection, the resistance-capacitance circuit of formation RF provides transmission-receiving function.
Further, said filter circuit comprises electrostatic defending resistance-capacitance circuit, low-power consumption operational amplification circuit, common mode inhibition circuit and bandwidth-limited circuit,
Said electrostatic defending resistance-capacitance circuit comprises low-leakage current double diode D3, low-leakage current double diode D4, resistance R 72, resistance R 73, capacitor C 39 and capacitor C 40; After forming rc filter circuits, said resistance R 72 and capacitor C 39 be connected formation output port 1 with low-leakage current double diode D3; After forming rc filter circuits, said resistance R 73 and capacitor C 40 be connected formation output port 2 with low-leakage current double diode D4;
Said low-power consumption operational amplification circuit comprises low consumed power operational amplifier U4A, low consumed power operational amplifier U4B, capacitor C 2, capacitor C 9, capacitor C 32, capacitor C 33, resistance R 64 and resistance R 65; The foot 3 of said low consumed power operational amplifier U4A is connected with the output port 1 of said electrostatic defending resistance-capacitance circuit; The foot 4 of said low consumed power operational amplifier U4A is connected back ground connection with capacitor C 9; The foot 8 of said low consumed power operational amplifier U4A is connected back ground connection with capacitor C 2; The foot 2 of said low consumed power operational amplifier U4A is connected the back and is connected with the series circuit of capacitor C 32 with resistance R 64 with foot 1, form output port 3; The foot 5 of said low consumed power operational amplifier U4B is connected with the output port 2 of electrostatic defending resistance-capacitance circuit, and the foot 6 of low consumed power operational amplifier U4B is connected the back and is connected with the series circuit of capacitor C 33 with resistance R 65 with foot 7, forms output port 4;
Said common mode inhibition circuit comprises instrument amplifier U5, resistance R 83, resistance R 91, capacitor C 12, capacitor C 13 and capacitor C 43, and the foot 1 of said instrument amplifier U5 is connected with foot 8 with resistance R 83 series connection backs; The foot 3 of said instrument amplifier U5 is connected with the output port 3 of said low-power consumption operational amplification circuit; The foot 2 of said instrument amplifier U5 is connected with the output port 4 of said low-power consumption operational amplification circuit; The foot 7 of said instrument amplifier U5 is connected the back virtual earth with capacitor C 12; The foot 4 of said instrument amplifier U5 is connected the back virtual earth with capacitor C 13; The foot 5 of said instrument amplifier U5 is connected with the parallel circuit of resistance R 91 and resistance C43 and is afterwards formed output port 5; The foot 6 of said instrument amplifier U5 forms output port 6;
Said bandwidth-limited circuit comprises operational amplifier U6A, operational amplifier U6B, resistance R 66, resistance R 67, resistance R 68, resistance R 85, resistance R 86, resistance R 92, capacitor C 35, capacitor C 41, capacitor C 42, capacitor C 8, capacitor C 10 and capacitor C 11, and the foot 2 of said operational amplifier U6A is connected with the output port 5 of said common mode inhibition circuit with resistance R 8 series connection backs; The parallel circuit of the foot 3 of said operational amplifier U6A and resistance R 67 and capacitor C 35 virtual earth afterwards of connect, and with connect power supply after resistance R 66 is connected; The foot 1 of said operational amplifier U6A is connected with the resistance-capacitance circuit of resistance R 86 and capacitor C 11 and is afterwards formed output port 7; Simultaneously, the foot 1 of said operational amplifier U6A is connected with the foot 2 of said operational amplifier U6A with the parallel circuit series connection back of resistance 85 and capacitor C 41; The foot 6 of said operational amplifier U6B is connected with the output port 5 of said common mode inhibition circuit with after resistance R 92 is connected; The foot 6 of said operational amplifier U6B is connected with the foot 7 of said operational amplifier U6B with capacitor C 42 parallel connection backs, and the foot 7 of said operational amplifier U6B is connected with the output port 6 that said mould suppresses circuit.
Further, described wireless network is common cell phone network, comprises GSM, GPRS and 3G.
Further, the man-machine interface of said terminal unit comprises display device and keyboard/button.
The beneficial effect of this utility model is: the described intelligent cardiac monitor system of this utility model, the patient is carried out real-time monitoring, and catch the information that notes abnormalities, offer the patient, thereby realize early finding the purpose of early treatment.Simultaneously, as long as in operation, make with the hands, do not receive environmental limitations yet.
Description of drawings
Fig. 1 is the system block diagram of the described intelligent cardiac monitor system of this utility model;
Fig. 2 is the structural representation of the described host server of this utility model;
Fig. 3 is the structural representation of the described terminal unit of this utility model;
Fig. 4 is the circuit diagram of the described gsm module of this utility model;
Fig. 5 is the circuit diagram of the described SIM circuit of this utility model;
Fig. 6 is the circuit diagram of the described antenna circuit of this utility model;
Fig. 7 is the circuit diagram of electrostatic defending resistance-capacitance circuit in the described filter circuit of this utility model;
Fig. 8 is the circuit diagram of low-power consumption operational amplification circuit in the described filter circuit of this utility model;
Fig. 9 is the circuit diagram of common mode inhibition circuit in the described filter circuit of this utility model;
Figure 10 is the circuit diagram of bandwidth-limited circuit in the described filter circuit of this utility model.
The specific embodiment
It is a kind of that present embodiment provides, and structure is as shown in Figure 1, comprises that host server 6 and at least one are arranged at the terminal unit 2 at patient 1 place.In the present embodiment, the quantity of said terminal unit 2 is 1.Said terminal unit 2 is connected to host server after being connected to internet network 4 through wireless network 3.Wherein, be provided with switch 5 between said internet network 4 and the host server 6.
Fig. 2 is the structural representation of the described host server of this utility model.
As shown in Figure 2: said host server 6 comprises access computer 7, data base 8, specialist system 9, backstage backup 10 and checks terminal 11.Connection, calling and the data interaction of said access computer 7 processing terminals; And with said data base's 8 intercommunication; Said access computer 7 be whole host server 6 foremost; Be responsible for and being connected of numerous terminals, need to handle the demand of magnanimity visit, also will the output of diagnosing be sent through Internet or wireless network GSM/GPRS/CDMA/3G simultaneously.Said data base 8 and the intercommunication of said specialist system 9 with said backstage backup 10, said data base 8 is storage repository of data, can write down a large amount of historical datas of much human, data are carried out the index backup according to name and time.9 pairs of patient's data of said specialist system are carried out preparatory diagnostic test; Intercommunication with said backstage backup 10; And data are sent to check terminal 11, said specialist system 9 is based on database work, and specialist system is analyzed to the data that are stored among the data base; Draw valid conclusion, and the result exported to insert computer module and send.The said terminal 11 checked directly with between doctor/expert 12 carries out showing according to doctor/expert 12 instruction fetch data alternately.
Fig. 3 is the structural representation of the described terminal unit of this utility model.
As shown in Figure 3: said terminal unit comprises sample circuit 14, filter circuit 16, analog to digital conversion circuit 17, microprocessor 19, memorizer 20, man-machine interface 24 and communication interface 28.Said sample circuit 14 is connected with said filter circuit 16, and the electrocardiogram (ECG) data of gathering is sent to filter circuit; Said filter circuit 16 is connected with analog-digital conversion circuit as described 17; Said microprocessor 19 is connected with analog-digital conversion circuit as described 17, said memorizer 20, said man-machine interface 24 and said communication interface 28.
Said sample circuit 14 is made up of two sampling electrode ECGPAD (P1, P2), is used to obtain patient's bio-voltage.Said sample circuit 14 and patient's 13 common patient's parts 15 that constitute terminal unit.Said sample circuit 14 is connected with said filter circuit 16, and the electrocardiogram (ECG) data of gathering is sent to filter circuit 16.
Said filter circuit 16 and the analog-digital conversion circuit as described 17 common analog part 18 that constitute terminal unit.Said filter circuit 16 comprises electrostatic defending resistance-capacitance circuit, low-power consumption operational amplification circuit, common mode inhibition circuit and bandwidth-limited circuit.
Wherein,
The circuit diagram of said electrostatic defending resistance-capacitance circuit is as shown in Figure 7; Comprise low-leakage current double diode D3, low-leakage current double diode D4, resistance R 72, resistance R 73, capacitor C 39 and capacitor C 40; After forming rc filter circuits, said resistance R 72 and capacitor C 39 be connected formation output port 1 with low-leakage current double diode D3; After forming rc filter circuits, said resistance R 73 and capacitor C 40 be connected formation output port 2 with low-leakage current double diode D4.
The circuit diagram of said low-power consumption operational amplification circuit is as shown in Figure 8; Comprise low consumed power operational amplifier U4A, low consumed power operational amplifier U4B, capacitor C 2, capacitor C 9, capacitor C 32, capacitor C 33, resistance R 64 and resistance R 65; The foot 3 of said low consumed power operational amplifier U4A is connected with the output port 1 of said electrostatic defending resistance-capacitance circuit; The foot 4 of said low consumed power operational amplifier U4A is connected back ground connection with capacitor C 9; The foot 8 of said low consumed power operational amplifier U4A is connected back ground connection with capacitor C 2, the foot 2 of said low consumed power operational amplifier U4A is connected the back and is connected with the series circuit of capacitor C 32 with resistance R 64 with foot 1, forms output port 3; The foot 5 of said low consumed power operational amplifier U4B is connected with the output port 2 of electrostatic defending resistance-capacitance circuit, and the foot 6 of low consumed power operational amplifier U4B is connected the back and is connected with the series circuit of capacitor C 33 with resistance R 65 with foot 7, forms output port 4.
The circuit diagram of said common mode inhibition circuit is as shown in Figure 9, comprises instrument amplifier U5, resistance R 83, resistance R 91, capacitor C 12, capacitor C 13 and capacitor C 43, and the foot 1 of said instrument amplifier U5 is connected with foot 8 with resistance R 83 series connection backs; The foot 3 of said instrument amplifier U5 is connected with the output port 3 of said low-power consumption operational amplification circuit; The foot 2 of said instrument amplifier U5 is connected with the output port 4 of said low-power consumption operational amplification circuit; The foot 7 of said instrument amplifier U5 is connected the back virtual earth with capacitor C 12; The foot 4 of said instrument amplifier U5 is connected the back virtual earth with capacitor C 13; The foot 5 of said instrument amplifier U5 is connected with the parallel circuit of resistance R 91 and resistance C43 and is afterwards formed output port 5; The foot 6 of said instrument amplifier U5 forms output port 6.
The circuit diagram of said bandwidth-limited circuit is shown in figure 10; Comprise operational amplifier U6A, operational amplifier U6B, resistance R 66, resistance R 67, resistance R 68, resistance R 85, resistance R 86, resistance R 92, capacitor C 35, capacitor C 41, capacitor C 42, capacitor C 8, capacitor C 10 and capacitor C 11, the foot 2 of said operational amplifier U6A is connected with the output port 5 of said common mode inhibition circuit with resistance R 8 series connection backs; The parallel circuit of the foot 3 of said operational amplifier U6A and resistance R 67 and capacitor C 35 virtual earth afterwards of connect, and with connect power supply after resistance R 66 is connected; The foot 1 of said operational amplifier U6A is connected with the resistance-capacitance circuit of resistance R 86 and capacitor C 11 and is afterwards formed output port 7; Simultaneously, the foot 1 of said operational amplifier U6A is connected with the foot 2 of said operational amplifier U6A with the parallel circuit series connection back of resistance 85 and capacitor C 41; The foot 6 of said operational amplifier U6B is connected with the output port 5 of said common mode inhibition circuit with after resistance R 92 is connected; The foot 6 of said operational amplifier U6B is connected with the foot 7 of said operational amplifier U6B with capacitor C 42 parallel connection backs, and the foot 7 of said operational amplifier U6B is connected with the output port 6 that said mould suppresses circuit.
Said microprocessor 19 and the said memorizer 20 common numerical portions 21 that constitute terminal unit.Said microprocessor has at a high speed, low in power consumption, can the electrocardiogram (ECG) data that collect be calculated and contrast, and with abnormal conditions,, arrhythmia not normal, atrial fibrillation etc. like the rhythm of the heart, real time record is got up.Said memorizer 20 adopts common hard-disc storage to get final product.
Said communication interface 28 comprises gsm module 25 and SIM circuit that is connected with said GSM module 25 26 and antenna circuit 27.
Fig. 4 is the circuit diagram of the described gsm module of this utility model.
As shown in Figure 4: said gsm module comprises chip SIM900, and 28 series connection back parallel connections form the UART interface that is connected with microprocessor with resistance R with resistance R 23, resistance R 24, resistance R 25, resistance R 26, resistance R 27 respectively for the foot 3 of said chip SIM900, foot 4, foot 7, foot 8, foot 9, foot 10; The foot 16 of said chip SIM900 forms the reseting port of gsm module with after resistance R 17 is connected; Foot 27 forms debugging interface with foot 28; Foot 30, foot 31, foot 32, foot 33 and foot 34 are connected with said SIM circuit; Foot 52 is connected with said antenna circuit for for the electric wire emission interface; Foot 55, foot 56 and foot 57 are the power supply power supply interface, are connected with power supply; Foot 60 is connected with said cable circuit; Foot 17, foot 18, foot 29, foot 39, foot 45, foot 46, foot 53, foot 54, foot 58, foot 59, foot 61, foot 62, foot 63, foot 64 and foot 65 ground connection.
Fig. 5 is the circuit diagram of the described SIM circuit of this utility model.
As shown in Figure 5: said SIM circuit comprises SIM CON2, electrostatic protection chip U1, resistance R 9, resistance R 10, resistance R 11, resistance R 12 and capacitor C 1; The foot 1 of said SIM CON2 is connected the back with the foot 3 of said electrostatic protection chip U1 and is connected with resistance R 11 with foot 4, form input port SIM_CLK; The foot 2 of said SIM CON2 is connected the back connects with resistance R 10 with foot 1, forms input port SIM_RST; Said input port SIM_RST connects with resistance R 9 and forms power interface VDD_EXT; The foot 4 of said SIM CON2 is connected the back and is connected with the foot 3 of SIM CON2 with capacitor C 1, the foot 3 of said SIM CON2 is connected with the foot 4 of said electrostatic protection chip U1; The foot 5 of said SIM CON2 is put sky; The foot 6 of said SIM CON2 is connected back the series connection with resistance R 12 with the foot 3 of said electrostatic protection chip U1 and forms input port SIM_DATA with foot 6; The foot 6 of said electrostatic protection chip U1 forms input port SIM_PRESENCE; Foot 2 ground connection of said electrostatic protection chip U1.
Fig. 6 is the circuit diagram of the described antenna circuit of this utility model.
As shown in Figure 6: said antenna circuit comprises antenna CON1, resistance R 1, resistance R 2, capacitor C 30 and capacitor C 31, and said antenna CON1 connects with resistance R 2 and resistance R 1, and said resistance R 1 is connected with said gsm module; Said capacitor C 30 and capacitor C 31 and resistance R 1 and resistance R 2 parallelly connected back ground connection, the resistance-capacitance circuit of formation RF provides transmission-receiving function
Said man-machine interface 24 comprises display device 22 and keyboard/button 23, sends instruction through keyboard/button 23, the operation of control terminal, and, can observe data measured intuitively through display device.
The described terminal unit of native system dials up on the telephone through GSM/GPRS/CDMA/3G etc. abnormal information is sent to host server through Internet.Host server is the webserver based on Internet; Integrated Database Systems on this server, each user has an account, and each data that receive is put in the account separately; The server algorithm routine is analyzed the data that receive, and confirms the state of an illness.Data base's effect is and can compares historical data, judges more accurately and provides and predict the outcome thereby draw.The diagnostic result of main frame can send mailbox or send note to guardian's mobile phone through wireless network GSM/GPRS/CDMA/3G through Internet.
The mode that native system dials up on the telephone through wireless network GSM/GPRS/CDMA/3G realizes the Internet transfer of data, but makes large batch of data real-time Transmission.Because patient's health data is by real-time sampling; Abnormal data has only the fragment of several seconds kinds usually; Electrocardiogram (ECG) data with diagnostic significance is each greater than 10KB usually, and it is each that simple wireless network GSM/GPRS/CDMA/3G transmission technology such as note can only be transmitted about 140B, and time-delay is bigger; Real-time is bad, and the method that wireless network GSM/GPRS/CDMA/3G dials up on the telephone has solved this problem.The more important thing is after wireless network GSM/GPRS/CDMA/3G dials up on the telephone and to link to each other with host server through Internet that server can be done further algorithm process based on PC.This technology has improved the autgmentability at native system terminal, has also reduced the cost and the power consumption of device, because complicated work has been done by server.
Native system has proposed a kind of new Gernral Check-up pattern; Be that the patient can carry out data acquisition as required; The built-in microprocessor in terminal can be realized real-time monitoring, analysis to health parameters; In case note abnormalities or parameter surpasses preset index, device can report to the police and send abnormal data automatically and do further diagnosis to host server.
Except that the foregoing description, this utility model can also have other embodiments.All employings are equal to the technical scheme of replacement or equivalent transformation formation, all drop on the protection domain of this utility model requirement.
Claims (8)
1. the intelligent cardiac monitor system is characterized in that, comprises that host server and at least one are arranged at the terminal unit at patient place, and said terminal unit is communicated by letter with host server with the internet network through the wireless network connection and is connected;
Said terminal unit comprises sample circuit, filter circuit, analog to digital conversion circuit, microprocessor, memorizer, man-machine interface and communication interface, and said sample circuit is connected with said filter circuit, and the electrocardiogram (ECG) data of gathering is sent to filter circuit; Said filter circuit is connected with analog-digital conversion circuit as described; Said microprocessor is connected with analog-digital conversion circuit as described, said memorizer, said man-machine interface and said communication interface;
Said host server comprises and inserts computer, data base, specialist system, backstage backup and check the terminal, connection, calling and the data interaction at said access Computer Processing terminal, and with said data base's intercommunication; The intercommunication of said data base and said specialist system and the backup of said backstage; Said specialist system carries out preparatory diagnostic test to patient's data, with the intercommunication of said backstage backup, and data are sent to check the terminal.
2. intelligent cardiac monitor system according to claim 1 is characterized in that, the communication interface of said terminal unit comprises gsm module and the SIM circuit and the antenna circuit that are connected with said GSM module.
3. intelligent cardiac monitor system according to claim 2; It is characterized in that; Said gsm module comprises chip SIM900, and 28 series connection back parallel connections form the UART interface that is connected with microprocessor with resistance R with resistance R 23, resistance R 24, resistance R 25, resistance R 26, resistance R 27 respectively for the foot 3 of said chip SIM900, foot 4, foot 7, foot 8, foot 9, foot 10; The foot 16 of said chip SIM900 forms the reseting port of gsm module with after resistance R 17 is connected; Foot 27 forms debugging interface with foot 28; Foot 30, foot 31, foot 32, foot 33 and foot 34 are connected with said SIM circuit; Foot 52 is the electric wire emission interface, is connected with said antenna circuit; Foot 55, foot 56 and foot 57 are the power supply power supply interface, are connected with power supply; Foot 60 is connected with said cable circuit; Foot 17, foot 18, foot 29, foot 39, foot 45, foot 46, foot 53, foot 54, foot 58, foot 59, foot 61, foot 62, foot 63, foot 64 and foot 65 ground connection.
4. intelligent cardiac monitor system according to claim 2; It is characterized in that; Said SIM circuit comprises SIM CON2, electrostatic protection chip U1, resistance R 9, resistance R 10, resistance R 11, resistance R 12 and capacitor C 1; The foot 1 of said SIM CON2 is connected the back with the foot 3 of said electrostatic protection chip U1 and is connected with resistance R 11 with foot 4, form input port SIM_CLK; The foot 2 of said SIM CON2 is connected the back connects with resistance R 10 with foot 1, forms input port SIM_RST; Said input port SIM_RST connects with resistance R 9 and forms power interface VDD_EXT; The foot 4 of said SIM CON2 is connected the back and is connected with the foot 3 of SIM CON2 with capacitor C 1, the foot 3 of said SIM CON2 is connected with the foot 4 of said electrostatic protection chip U1; The foot 5 of said SIM CON2 is put sky; The foot 6 of said SIM CON2 is connected back the series connection with resistance R 12 with the foot 3 of said electrostatic protection chip U1 and forms input port SIM_DATA with foot 6; The foot 6 of said electrostatic protection chip U1 forms input port SIM_PRESENCE; Foot 2 ground connection of said electrostatic protection chip U1.
5. intelligent cardiac monitor system according to claim 2; It is characterized in that; Said antenna circuit comprises antenna CON1, resistance R 1, resistance R 2, capacitor C 30 and capacitor C 31, and said antenna CON1 connects with resistance R 2 and resistance R 1, and said resistance R 1 is connected with said gsm module; Said capacitor C 30 and capacitor C 31 and resistance R 1 and resistance R 2 parallelly connected back ground connection, the resistance-capacitance circuit of formation RF provides transmission-receiving function.
6. intelligent cardiac monitor system according to claim 1 is characterized in that, said filter circuit comprises electrostatic defending resistance-capacitance circuit, low-power consumption operational amplification circuit, common mode inhibition circuit and bandwidth-limited circuit,
Said electrostatic defending resistance-capacitance circuit comprises low-leakage current double diode D3, low-leakage current double diode D4, resistance R 72, resistance R 73, capacitor C 39 and capacitor C 40; After forming rc filter circuits, said resistance R 72 and capacitor C 39 be connected formation output port 1 with low-leakage current double diode D3; After forming rc filter circuits, said resistance R 73 and capacitor C 40 be connected formation output port 2 with low-leakage current double diode D4;
Said low-power consumption operational amplification circuit comprises low consumed power operational amplifier U4A, low consumed power operational amplifier U4B, capacitor C 2, capacitor C 9, capacitor C 32, capacitor C 33, resistance R 64 and resistance R 65; The foot 3 of said low consumed power operational amplifier U4A is connected with the output port 1 of said electrostatic defending resistance-capacitance circuit; The foot 4 of said low consumed power operational amplifier U4A is connected back ground connection with capacitor C 9; The foot 8 of said low consumed power operational amplifier U4A is connected back ground connection with capacitor C 2; The foot 2 of said low consumed power operational amplifier U4A is connected the back and is connected with the series circuit of capacitor C 32 with resistance R 64 with foot 1, form output port 3; The foot 5 of said low consumed power operational amplifier U4B is connected with the output port 2 of electrostatic defending resistance-capacitance circuit, and the foot 6 of low consumed power operational amplifier U4B is connected the back and is connected with the series circuit of capacitor C 33 with resistance R 65 with foot 7, forms output port 4;
Said common mode inhibition circuit comprises instrument amplifier U5, resistance R 83, resistance R 91, capacitor C 12, capacitor C 13 and capacitor C 43, and the foot 1 of said instrument amplifier U5 is connected with foot 8 with resistance R 83 series connection backs; The foot 3 of said instrument amplifier U5 is connected with the output port 3 of said low-power consumption operational amplification circuit; The foot 2 of said instrument amplifier U5 is connected with the output port 4 of said low-power consumption operational amplification circuit; The foot 7 of said instrument amplifier U5 is connected the back virtual earth with capacitor C 12; The foot 4 of said instrument amplifier U5 is connected the back virtual earth with capacitor C 13; The foot 5 of said instrument amplifier U5 is connected with the parallel circuit of resistance R 91 and resistance C43 and is afterwards formed output port 5; The foot 6 of said instrument amplifier U5 forms output port 6;
Said bandwidth-limited circuit comprises operational amplifier U6A, operational amplifier U6B, resistance R 66, resistance R 67, resistance R 68, resistance R 85, resistance R 86, resistance R 92, capacitor C 35, capacitor C 41, capacitor C 42, capacitor C 8, capacitor C 10 and capacitor C 11, and the foot 2 of said operational amplifier U6A is connected with the output port 5 of said common mode inhibition circuit with resistance R 8 series connection backs; The parallel circuit of the foot 3 of said operational amplifier U6A and resistance R 67 and capacitor C 35 virtual earth afterwards of connect, and with connect power supply after resistance R 66 is connected; The foot 1 of said operational amplifier U6A is connected with the resistance-capacitance circuit of resistance R 86 and capacitor C 11 and is afterwards formed output port 7; Simultaneously, the foot 1 of said operational amplifier U6A is connected with the foot 2 of said operational amplifier U6A with the parallel circuit series connection back of resistance 85 and capacitor C 41; The foot 6 of said operational amplifier U6B is connected with the output port 5 of said common mode inhibition circuit with after resistance R 92 is connected; The foot 6 of said operational amplifier U6B is connected with the foot 7 of said operational amplifier U6B with capacitor C 42 parallel connection backs, and the foot 7 of said operational amplifier U6B is connected with the output port 6 that said mould suppresses circuit.
7. intelligent cardiac monitor system according to claim 1 is characterized in that described wireless network is common cell phone network, comprises GSM, GPRS and 3G.
8. intelligent cardiac monitor system according to claim 1 is characterized in that the man-machine interface of said terminal unit comprises display device and keyboard/button.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220238642 CN202589515U (en) | 2012-05-24 | 2012-05-24 | Intelligent electrocardiogram monitoring system |
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| CN 201220238642 CN202589515U (en) | 2012-05-24 | 2012-05-24 | Intelligent electrocardiogram monitoring system |
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| CN (1) | CN202589515U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102670195A (en) * | 2012-05-24 | 2012-09-19 | 江苏达科信息科技有限公司 | Intelligent electrocardiographic monitoring system |
| CN103876726A (en) * | 2013-11-15 | 2014-06-25 | 江苏达科信息科技有限公司 | Intelligent electrocardiograph monitoring device based on potential and photoelectric detection method |
-
2012
- 2012-05-24 CN CN 201220238642 patent/CN202589515U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102670195A (en) * | 2012-05-24 | 2012-09-19 | 江苏达科信息科技有限公司 | Intelligent electrocardiographic monitoring system |
| CN102670195B (en) * | 2012-05-24 | 2014-10-08 | 江苏达科信息科技有限公司 | Intelligent electrocardiographic monitoring system |
| CN103876726A (en) * | 2013-11-15 | 2014-06-25 | 江苏达科信息科技有限公司 | Intelligent electrocardiograph monitoring device based on potential and photoelectric detection method |
| CN103876726B (en) * | 2013-11-15 | 2017-06-13 | 江苏达科信息科技有限公司 | A kind of intelligent cardiac monitor device based on potential and photoelectric detecting method |
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