CN202584139U - Physical experiment platform for power consumption analysis of cryptographic chip - Google Patents
Physical experiment platform for power consumption analysis of cryptographic chip Download PDFInfo
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- CN202584139U CN202584139U CN 201220159944 CN201220159944U CN202584139U CN 202584139 U CN202584139 U CN 202584139U CN 201220159944 CN201220159944 CN 201220159944 CN 201220159944 U CN201220159944 U CN 201220159944U CN 202584139 U CN202584139 U CN 202584139U
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Abstract
The utility model discloses a physical experiment platform for power consumption analysis of a cryptographic chip. The physical experiment platform comprises a computer information processing module, a single-chip microcomputer module, a power supply module and a digital dual-channel oscilloscope. A sampling resistor is in series connection between a Vss pin of a microprocessor chip of the single-chip microcomputer and the ground and used for measuring power consumption waveform generated when instructions are executed by the single-chip microcomputer module. A first-channel probe of the digital dual-channel oscilloscope is connected with the single-chip microcomputer module and receives trigger signals of the single-chip microcomputer module as sampling signals, a second-channel probe is connected with the sampling resistor and used for collecting and receiving voltage waveform on the sampling resistor. The computer information processing module is connected with the single-chip microcomputer through an RS232 serial port and used for issuing a decryption operational program to the single-chip microcomputer module. The power supply module is connected with the single-chip microcomputer module and provides a power supply for the single-chip microcomputer module. The physical experiment platform is simple, rapid and flexible in construction, and brings convenience to modification and verification of power consumption characteristic of the encryption algorithm.
Description
Technical field
The utility model relates to dedicated devices encryption technology field, relates in particular to a kind of crypto chip power consumption analysis Physical Experiment platform.
Background technology
Continuous propelling along with integrated circuit; Safety chip is used more and more wider; The problem that the most urgently will solve at present is the physical protection problem of research safety chip, and data are not just stolen in the chip operational process, in ciphering process, might be stolen equally.Different with the conventional cipher analysis means is; Because AES is accomplished on chip; The encryption chip circuit can leak some Useful Informations in operational process, for example power consumption, electromagnetic radiation, operation time etc., these information can be used for analyzing AES; Obtain some sensitive datas or key, this method is a bypass attack.Bypass attack cost easy to implement and required is low, and its principle cracks applicable to various cryptographic algorithms.Wherein, utilize power consumption information to carry out the bypass attack means and be called power consumption attack.It is proposed in 1998 by people such as Paul Kocher, and this method can be with lower cost, fast, nondestructively extract the key information in the cryptosecurity chip, and this safety to crypto chip has proposed severe challenge.
Usually the power consumption analysis attack all is on the physical hardware platform of target encryption device, to accomplish; Concerning the deviser of encryption device, must, sample device could verify whether its algorithm software and otherwise design can resisting energy analysis attacks after creating.Therefore, in R&D process, be badly in need of one and be used for the power consumption analysis physical platform, be used for improving design proposal, raise the efficiency, practice thrift cost of development and time.The experiment of power consumption analysis at present implements more complicated, makes up also very difficulty, mainly is in default of the integrated analysis tool of fully automatic system, and minority has the integrated analysis tool of fully automatic system but equipment price is expensive.
Summary of the invention
The purpose of the utility model is to overcome the deficiency of prior art, provide a kind of structure simply, fast, crypto chip power consumption analysis Physical Experiment platform flexibly.
For achieving the above object, the technical scheme that the utility model adopted is that a kind of crypto chip power consumption analysis Physical Experiment platform comprises computer information processing module, one-chip computer module, power module and digital dual channel oscilloscope; One-chip computer module is used for accomplishing the encrypting and decrypting computing, the sampling resistor of between the Vss of one-chip computer module microprocessor chip pin and ground, connecting, the power consumption waveform that is produced when measuring the one-chip computer module execution command; Numeral dual channel oscilloscope first passage probe links to each other with one-chip computer module, receives the trigger pip of one-chip computer module, and as the signal of sampling, the second channel probe links to each other with sampling resistor, gathers the voltage waveform that receives on the sampling resistor; The computer information processing module is connected with one-chip computer module through the RS232 serial ports; Be used to issue the encryption and decryption operation program to one-chip computer module; Be connected with digital dual channel oscilloscope through the RS232 serial ports, be used for oscillograph is provided with and accomplishes data transmission and processing; Power module links to each other with one-chip computer module, for one-chip computer module provides power supply.
Further, said one-chip computer module adopts the ATmega16 chip, and the sampling resistor size is 10 Ω, and power module adopts 4 joint 1.5V alkaline batteries.
Further, said one-chip computer module two ends parallel connection one filter capacitor, the frequency that is used to reduce variable power is with the defence power consumption analysis.
Further, said filter capacitor size is 0.1 μ F.
The utility model makes up simple relatively, quick; The experiment arithmetic speed is very fast; Have the dirigibility that AES is easy to revise, can easily the power consumption characteristics of AES be improved and verify, improved encryption device deviser design efficiency; Practice thrift cost of development and time, had very big practical value.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the utility model is further specified.
Fig. 1 is the structural representation of the utility model;
Fig. 2 is that the main circuit of the utility model embodiment connects synoptic diagram.
Embodiment
Like Fig. 1, shown in Figure 2, a kind of crypto chip power consumption analysis Physical Experiment platform comprises computer information processing module, one-chip computer module, power module and digital dual channel oscilloscope.One-chip computer module is used for accomplishing the encrypting and decrypting computing, the sampling resistor of between the Vss of one-chip computer module microprocessor chip pin and ground, connecting, the power consumption waveform that is produced when measuring the one-chip computer module execution command.One-chip computer module selects for use the Atmega16 chip to be used as processor, and power module adopts 4 joint 1.5V alkaline batteries, for one-chip computer module provides the direct supply of 4*1.5v, can not have the shake of supply voltage, and the size of sampling resistor is 10 Ω.The first passage CH2 probe of numeral dual channel oscilloscope links to each other with one-chip computer module, receives the trigger pip of one-chip computer module, and as the signal of sampling, second channel CH1 probe links to each other with sampling resistor, gathers the voltage waveform that receives on the sampling resistor.The Wave data that sampling is obtained is stored in the digital dual channel oscilloscope, accomplishes digital dual channel oscilloscope data through mobile memory medium and derives, and transfer to the computer information processing module and carry out analyzing and processing.The numeral dual channel oscilloscope is when specifically being provided with, and according to the chip operation situation, selection can represent that the signal of chip operation state is as triggering; Use difference detector as far as possible, perhaps adopt dual channel mode; Sample mode is selected real-time mode for use.The computer information processing module is connected with one-chip computer module through the RS232 serial ports, is used to issue the encryption and decryption operation program to one-chip computer module; Be connected with digital dual channel oscilloscope through the RS232 serial ports, be used for oscillograph is provided with and accomplishes data transmission and processing.
The utility model not only can be realized the attack of simple power consumption analysis; Can also carry out certain defence opposing to power consumption attack, that is to say that its capacitance size is 0.1 μ F at the two ends of one-chip computer module chip parallel connection one filter capacitor; Can be under the condition that does not influence the chip operate as normal; Reduce the operating rate of circuit, reduce the frequency of variable power, reduce requirement the oscillograph SF.
The foregoing description is as to the qualification of the utility model, all any modifications of in the scope of the utility model, being done, is equal to replacement, improvement etc., all belongs to the protection domain of the utility model.
Claims (4)
1. a crypto chip power consumption analysis Physical Experiment platform is characterized in that: comprise computer information processing module, one-chip computer module, power module and digital dual channel oscilloscope;
One-chip computer module is used for accomplishing the encrypting and decrypting computing, the sampling resistor of between the Vss of one-chip computer module microprocessor chip pin and ground, connecting, the power consumption waveform that is produced when measuring the one-chip computer module execution command;
Numeral dual channel oscilloscope first passage probe links to each other with one-chip computer module, receives the trigger pip of one-chip computer module, and as the signal of sampling, the second channel probe links to each other with sampling resistor, gathers the voltage waveform that receives on the sampling resistor;
The computer information processing module is connected with one-chip computer module through the RS232 serial ports; Be used to issue the encryption and decryption operation program to one-chip computer module; Be connected with digital dual channel oscilloscope through the RS232 serial ports, be used for oscillograph is provided with and accomplishes data transmission and processing;
Power module links to each other with one-chip computer module, for one-chip computer module provides power supply.
2. a kind of crypto chip power consumption analysis Physical Experiment platform according to claim 1 is characterized in that, said one-chip computer module adopts the ATmega16 chip, and the sampling resistor size is 10 Ω, and power module adopts 4 joint 1.5V alkaline batteries.
3. a kind of crypto chip power consumption analysis Physical Experiment platform according to claim 1 is characterized in that, said one-chip computer module two ends parallel connection one filter capacitor, and the frequency that is used to reduce variable power is with the defence power consumption analysis.
4. a kind of crypto chip power consumption analysis Physical Experiment platform according to claim 3 is characterized in that said filter capacitor size is 0.1 μ F.
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CN 201220159944 CN202584139U (en) | 2012-04-17 | 2012-04-17 | Physical experiment platform for power consumption analysis of cryptographic chip |
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CN 201220159944 CN202584139U (en) | 2012-04-17 | 2012-04-17 | Physical experiment platform for power consumption analysis of cryptographic chip |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
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CN103954904A (en) * | 2014-04-28 | 2014-07-30 | 工业和信息化部电子第五研究所 | Hardware Trojan horse test system |
CN104301088A (en) * | 2014-09-20 | 2015-01-21 | 北京电子科技学院 | Crypto chip power consumption analyzing device and method and power consumption analysis protection device and method |
CN104572541A (en) * | 2013-10-10 | 2015-04-29 | 上海华虹集成电路有限责任公司 | System and method for acquiring running power consumption of USBKEY |
CN104992114A (en) * | 2015-06-09 | 2015-10-21 | 北京电子科技学院 | Analytic system and method of electromagnetism based on inserted-type cipher chip |
CN105187197A (en) * | 2015-10-22 | 2015-12-23 | 成都芯安尤里卡信息科技有限公司 | Energy track extractor aiming at USB (Universal Serial Bus) Key |
CN106771551A (en) * | 2016-11-25 | 2017-05-31 | 上海华虹集成电路有限责任公司 | Collection smart card runs the device of power consumption information |
-
2012
- 2012-04-17 CN CN 201220159944 patent/CN202584139U/en not_active Expired - Fee Related
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104572541A (en) * | 2013-10-10 | 2015-04-29 | 上海华虹集成电路有限责任公司 | System and method for acquiring running power consumption of USBKEY |
CN104572541B (en) * | 2013-10-10 | 2017-09-29 | 上海华虹集成电路有限责任公司 | Gather the system and method that USBKEY runs power consumption |
CN103954904A (en) * | 2014-04-28 | 2014-07-30 | 工业和信息化部电子第五研究所 | Hardware Trojan horse test system |
CN103954904B (en) * | 2014-04-28 | 2016-08-24 | 工业和信息化部电子第五研究所 | hardware Trojan horse test system |
CN104301088A (en) * | 2014-09-20 | 2015-01-21 | 北京电子科技学院 | Crypto chip power consumption analyzing device and method and power consumption analysis protection device and method |
CN104992114A (en) * | 2015-06-09 | 2015-10-21 | 北京电子科技学院 | Analytic system and method of electromagnetism based on inserted-type cipher chip |
CN105187197A (en) * | 2015-10-22 | 2015-12-23 | 成都芯安尤里卡信息科技有限公司 | Energy track extractor aiming at USB (Universal Serial Bus) Key |
CN106771551A (en) * | 2016-11-25 | 2017-05-31 | 上海华虹集成电路有限责任公司 | Collection smart card runs the device of power consumption information |
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Granted publication date: 20121205 Termination date: 20130417 |