CN202565162U - Semiconductor device, switching regulator and television set - Google Patents
Semiconductor device, switching regulator and television set Download PDFInfo
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- CN202565162U CN202565162U CN2012200430561U CN201220043056U CN202565162U CN 202565162 U CN202565162 U CN 202565162U CN 2012200430561 U CN2012200430561 U CN 2012200430561U CN 201220043056 U CN201220043056 U CN 201220043056U CN 202565162 U CN202565162 U CN 202565162U
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Abstract
The utility model provides a semiconductor device, a switching regulator and a television set. The semiconductor device (1) comprises first, second and third external terminals (BST, SW and HO), a driver, an overvoltage protection circuit and an overvoltage protection switch, wherein the driver outputs a signal to the external terminal HO after accepting the supply of the drive voltage applied on the external terminal (BST) and the reference voltage applied on the external terminal (SW); the overvoltage protection circuit monitors the inter-terminal voltage (Vy) applied between the external terminal (BST) and the external terminal (SW) to generate an overvoltage detection signal; and the overvoltage protection switch is under the conduction/cut-off control according to overvoltage detection signal. The driver comprises a preceding-stage circuit for processing and outputting the input signal, and a post-stage circuit for processing the output signal of the preceding-stage signal and outputting the processed signal to the external terminal (HO); and the overvoltage protection switch is arranged at a position where the overvoltage protection switch can cut off the drive voltage supply path to the preceding-stage circuit under a condition of conducting the drive voltage supply path to the post-stage circuit when being switched off.
Description
Technical field
The utility model relate to the switch drive control of carrying out output transistor semiconductor device, used the switching regulaor of this semiconductor device and with the television set of this switching regulaor as power supply.
Background technology
Fig. 8 is the circuit block diagram of an existing example of expression switching regulaor.As shown in Figure 8; In the switching regulaor of this existing example,, used N channel-type MOS [Metal Oxide Semiconductor] field-effect transistor N1 as output transistor; In order to make this transistor N1 conducting, grid voltage that need be higher than input voltage vin.Therefore; In switching regulaor of this existing example, be provided with boostrap circuit (diode 103 and capacitor C2), exceeding booster voltage (boots voltage) Vbst of amount corresponding to the charging voltage of capacitor C2 (voltage deduct the forward voltage drop Vf of diode 103 from constant voltage Vreg after) to the switching voltage Vsw that the last side driver 101 of the grid voltage that generates transistor N1 provides than in switch terminal SW, occurs.
In addition, as an example of the prior art related, can enumerate patent documentation 1 or patent documentation 2 with switching regulaor.
[patent documentation 1] TOHKEMY 2009-106115 communique
[patent documentation 2] TOHKEMY is put down the 10-14217 communique
Fig. 9 is the oscillogram of an existing example of expression bootstrapping action.In addition, the solid line among Fig. 9 is represented switching voltage Vsw, and dotted line is represented booster voltage Vbst.
When moving usually,, therefore need driver 101 be designed to high withstand voltage owing between bootstrapping terminal BST and switch terminal SW, can not produce the potential difference more than the constant voltage Vreg (for example 5V).
But; For example; In bootstrapping terminal BST, (for example produced the high voltage short circuit; The short circuit that applies end to input voltage vin) under the situation, owing between bootstrapping terminal BST and switch terminal SW, produce the potential difference (for example 12V) that is equivalent to input voltage vin, the therefore damage of side driver 101 on this moment might produce.In addition; Even the damage of side driver 101 on this has been avoided constantly; In the moment of transistor N1 conducting, between bootstrapping terminal BST and switch terminal SW, because of the bootstrapping action produces the about 2 times potential difference (for example 24V) that is equivalent to input voltage vin; Therefore only otherwise will go up side driver 101 is designed to high withstand voltagely, just can not avoid the damage of side driver 101.Thus,, then can not make transistor N1 normally/end, therefore under the worst situation, also possibly cause smoldering or on fire if produce to go up the damage of side driver 101
In addition; If will go up side driver 101 is designed to high withstand voltage; So that it can anti-ly firmly be equivalent to 2 times potential difference of input voltage vin, the occupied area of then going up side driver 101 can become very big, and therefore existence causes the maximization of Switching Power Supply IC100 or the problem that cost rises.
Summary of the invention
The utility model is put in view of the above-mentioned problems and is accomplished, but the semiconductor device of whole high withstand voltageization of implement device when purpose is to provide maximization or the cost of restraining device to rise, and uses the switching regulaor of this semiconductor device.
In order to achieve the above object, the semiconductor device of the utility model is following structure (the 1st structure), promptly possesses: the 1st～the 3rd outside terminal; Driver, its acceptance are applied to the driving voltage and the supply that is applied to the reference voltage of said the 2nd outside terminal of said the 1st outside terminal, to said the 3rd outside terminal output signal; Excess voltage protection, its supervision are applied to the voltage between terminals between said the 1st outside terminal and said the 2nd outside terminal, generate excess voltage detection signal; With the over-voltage protection switch that is carried out conduction and cut-off control according to said excess voltage detection signal; Said driver comprises: the front stage circuits of exporting after input signal implement is handled and the output signal of said front stage circuits implemented to handle after export to the late-class circuit of said the 3rd outside terminal, said over-voltage protection switch is set at when making the drive voltage supply path conducting of leading to said late-class circuit when it breaks off and cuts off on the position in the drive voltage supply path of leading to said front stage circuits.
In addition, in the semiconductor device that is made up of above-mentioned the 1st structure, also can constitute (the 2nd structure) and do, said late-class circuit is designed to than taller withstand voltage of said front stage circuits.
In addition; In the semiconductor device that constitutes by above-mentioned the 2nd structure; Also can constitute (the 3rd structure) does; Said front stage circuits comprises the 2nd inverter of exporting to said the 3rd outside terminal after the output signal logic counter-rotating that the 1st inverter of exporting after the said input signal logic inversion, said late-class circuit is comprised make said front stage circuits.
In addition; In the semiconductor device that constitutes by above-mentioned the 3rd structure; Also can constitute (the 4th structure) does; Said the 1st inverter comprises to be made the upside inverter of exporting after the said input signal logic inversion and makes the downside inverter of exporting after the said input signal logic inversion, and said the 2nd inverter comprises side switch that the output signal according to said upside inverter is switched on/ends and the side switch that is switched on/ends according to the output signal of said downside inverter.
In addition, in the semiconductor device that is made up of above-mentioned the 4th structure, also can constitute (the 5th structure) and do, said side switch is the P channel type field effect transistors, and said side switch is the N channel type field effect transistors.
In addition; In the semiconductor device that constitutes by above-mentioned the 5th structure; Also can constitute (the 6th structure) does, pull-up resistor that is connected between the grid that said late-class circuit is included in said P channel type field effect transistors and the supply end of said driving voltage and the pull down resistor that between the supply end of the grid of said N channel type field effect transistors and said reference voltage, is connected.
In addition, in the semiconductor device that is made up of above-mentioned the 6th structure, also can constitute (the 7th structure) is that said upside inverter comprises: the 1st switch that between the supply end of said driving voltage and signal output part, is connected; The 2nd switch that is connected between the end said signal output part and applying of said reference voltage; Be connected on said the 1st switch with anode, negative electrode is connected the diode on the said signal output part.
In addition, in the semiconductor device that is made up of above-mentioned the 7th structure, also can constitute (the 8th structure) and do, said the 2nd switch and said diode are designed to than taller withstand voltage of said the 1st switch.
In addition, the semiconductor device that the arbitrary structure by the above-mentioned the 1st～8 constitutes also can constitute (the 9th structure), also possesses: the 4th outside terminal of input feedback voltage; With the control circuit that generates said input signal with the said feedback voltage mode consistent with the desired value of regulation.
In addition, the switching regulaor of the utility model constitutes (the 10th result) for to possess: the semiconductor device that is made up of above-mentioned the 9th structure; According to the transistor that is carried out conduction and cut-off control from the output signal of said the 3rd outside terminal; The switching voltage of the pulse type of drawing from a said transistorized end is carried out rectification/smoothly the generate rectification/smoothing circuit of output voltage; Feedback voltage generative circuit with the generation said feedback voltage corresponding with said output voltage.
In addition; In the switching regulaor that constitutes by above-mentioned the 10th structure; Also can constitute (the 11st structure) does; Apply than the taller booster voltage that goes out the regulation current potential of said switching voltage to said the 1st outside terminal, apply said switching voltage, on said the 3rd outside terminal, connect said transistorized grid to said the 2nd outside terminal.
In addition; In the switching regulaor that is made up of above-mentioned the 10th structure, also can constitute (the 12nd structure) is to apply constant voltage to said the 1st outside terminal; Apply earthed voltage to said the 2nd outside terminal, on said the 3rd outside terminal, connect said transistorized grid.
In addition, it is to possess that the television set of the utility model constitutes (the 13rd structure): tuner portion, and it selects the broadcast singal of desired channel according to receiving signal; Decoder portion, it generates signal of video signal and voice signal according to the broadcast singal of being selected by said tuner; Display part, it is exported said signal of video signal as image; Speaker portion, it is exported said voice signal as sound; Operating portion, it accepts user's operation; Interface portion, it accepts external input signal; Control part, the action of its above-mentioned each one of unified control; And power supply unit, it provides electric power to above-mentioned each one, and said power supply unit comprises the switching regulaor that is made up of arbitrary structure of the above-mentioned the 10th～the 12nd.
(invention effect)
Semiconductor device according to the utility model; But but therefore whole high withstand voltageization of implement device when the maximization of restraining device and cost rise can further help to use the miniaturization and cost reduction of the switching regulaor and even the television set of this semiconductor device.
Description of drawings
Fig. 1 is the block diagram of the 1st execution mode of expression switching regulaor.
Fig. 2 is the sequential chart that is used to explain the overvoltage protection action.
Fig. 3 is the circuit diagram that is used to explain the problem of the 1st execution mode.
Fig. 4 is the block diagram that is used to represent the 2nd execution mode of switching regulaor.
Fig. 5 is the block diagram of the 3rd execution mode of expression switching regulaor.
Fig. 6 is the block diagram of a structure example that the television set of switching regulaor has been carried in expression.
Fig. 7 A is the vertical view that has carried the television set of switching regulaor.
Fig. 7 B is the end view that has carried the television set of switching regulaor.
Fig. 7 C is the rearview that has carried the television set of switching regulaor.
Fig. 8 is the circuit block diagram of an existing example of expression switching regulaor.
Fig. 9 is the oscillogram of an existing example of expression bootstrapping action.
Symbol description: 1-Switching Power Supply IC; The last side driver of 10-; 11-the 1st inverter (front stage circuits); 11P-P channel-type MOS field-effect transistor; 11N-N channel-type MOS field-effect transistor; 11U-upside inverter; 11UP-P channel-type MOS field-effect transistor; 11UN-N channel-type MOS field-effect transistor; The 11UD-diode; 11L-downside inverter; 11LP-P channel-type MOS field-effect transistor; 11LN-N channel-type MOS field-effect transistor; 12-the 2nd inverter (late-class circuit); 12P-P channel-type MOS field-effect transistor; 12N-N channel-type MOS field-effect transistor; The 13-pull-up resistor; The 14-pull down resistor; Side driver under the 20-; The 30-diode; The 40-control circuit; The 50-excess voltage protection; 60,61-over-voltage protection switch; N1-N channel-type MOS field-effect transistor (output transistor); N2-N channel-type MOS field-effect transistor (synchronous rectification transistor); The L1-inductor; R1, R2-resistance; C1, C2-capacitor; HO-upside lead-out terminal; LO-downside lead-out terminal; The BST-terminal of booting; The SW-switch terminal; The FB-feedback terminal; REG-constant voltage terminal; The GND-earth terminal; The X-television set; The X0-antenna; X1-tuner portion; X2-decoder portion; The X3-display part; The X4-speaker portion; The X5-operating portion; The X6-interface portion; The X7-control part; The X8-power supply unit.
Embodiment
Below, be example with the structure of in the down switching regulator of bootstrap approach, having used the utility model, at length describe.
< the 1st execution mode >
Fig. 1 is the circuit block diagram of the 1st execution mode of expression switching regulaor.As shown in the drawing; The switching regulaor of the 1st execution mode is except Switching Power Supply IC1; Also possessing N channel-type MOS field-effect transistor N1 and N2, inductor L1, resistance R 1 and R2 and capacitor C1 and C2 in addition, is the down switching regulator (synchronous commutation type adjuster) that comes to generate according to input voltage vin the output voltage V out of expectation through the conduction and cut-off control of carrying out transistor N1 and N2.
Switching Power Supply IC1 possesses last side driver 10, the monolithic semiconductor integrated circuit device of side driver 20, diode 30, control circuit 40, excess voltage protection 50, over-voltage protection switch 60 down.
In addition, as with the electrical connecting unit of outside, Switching Power Supply IC1 possesses upside lead-out terminal HO, downside lead-out terminal LO, bootstrapping terminal BST, switch terminal SW, feedback terminal FB, constant voltage terminal REG, earth terminal GND.
In the outside of Switching Power Supply IC1, the drain electrode of transistor N1 is connected applying on the end of input voltage vin.The source electrode of transistor N1 and back grid all are connected on the switch terminal SW.The grid of transistor N1 is connected on the upside lead-out terminal HO.The drain electrode of transistor N2 is connected on the switch terminal SW.Source electrode and the back grid of transistor N2 all are connected on the earth terminal.The grid of transistor N2 is connected on the downside lead-out terminal LO.The 1st end of inductor L1 is connected on the switch terminal SW.The 2nd end of inductor L1 is connected applying on the end of output voltage V out, on the other hand, also is connected on the 1st end of the 1st end and resistance R 1 of capacitor C1.The 2nd end of capacitor C1 is connected on the earth terminal.The 2nd end of resistance R 1 is connected on the earth terminal via resistance R 2.The connected node of resistance R 1 and resistance R 2 is connected on the feedback terminal FB, as the end that applies of feedback voltage Vfb.Between switch terminal SW and bootstrapping terminal BST, connected capacitor C2.Constant voltage terminal REG is connected between the applying of constant voltage Vreg.Earth terminal GND is connected on the earth terminal.
In addition; Transistor N1 and N2 are the pair of switches elements between end and the earth terminal that applies that is connected in series in input voltage vin; Make this to the switch element conduction and cut-off with the mode of auxilliary (exclusive) mutually, thereby according to the switching voltage Vsw of input voltage vin production burst shape.In addition, transistor N1 plays the effect of output transistor, and transistor N2 plays the effect of synchronous rectification transistor.In addition, the term of employed in above-mentioned " mutually auxilliary (exclusive) " also comprises the situation between the off period when viewpoint that prevents from perforation electric current is provided with transistor N1 and N2 except the situation that the conduction and cut-off that comprises transistor N1 and N2 is reversed fully.
In addition, inductor L1 and capacitor C1 play the effect of rectification/smoothing circuit of the switching voltage Vsw that draws from switch terminal SW being carried out generating after rectification/smoothing the output voltage V out of expectation.Resistance R 1 and R2 play the effect of the feedback voltage generative circuit (resistor voltage divider circuit) that generates the feedback voltage Vfb corresponding with output voltage V out.Capacitor C2 forms boostrap circuit with diode built-in in Switching Power Supply IC1 30.
The internal structure of Switching Power Supply IC1 then, is described.
Over-voltage protection switch 60 is connected between the negative electrode of bootstrapping terminal BST and diode 30, according to excess voltage detection signal S1, makes conducting/blocking-up between bootstrapping terminal BST and the internal circuit (driving voltage of going up side driver 10 applies end).In addition; As over-voltage protection switch 60, even also can not produce the high withstand voltage element (the for example withstand voltage P channel-type MOS field-effect transistor of 30V) of damage as long as use produces 2 times the potential difference (for example 24V) that is equivalent to input voltage vin between bootstrapping terminal BST and switch terminal SW.
Below, at first, specify the bootstrapping action of the switching regulaor that constitutes by said structure.In addition, the overvoltage protection action that the prerequisite of explanation is stated after being does not start, and over-voltage protection switch 60 is connected.
Transistor N1 by and the switching voltage Vsw that on switch terminal SW, occurs when becoming low level (0V); Because in the path of constant voltage terminal REG via diode 30 and capacitor C2, flowing through electric current, the capacitor C2 that therefore is connected between bootstrapping terminal BST and the switch terminal SW is recharged.At this moment, the booster voltage Vbst (that is the charging voltage of capacitor C2) that on bootstrapping terminal BST, occurs be from constant voltage Vreg deduct the forward voltage drop Vf of diode 30 magnitude of voltage (=Vreg-Vf).
On the other hand; Under the state that capacitor C2 is recharged; If transistor N1 conducting; Switching voltage Vsw rises to high level (Vin) from low level (0V), and then booster voltage Vbst rises to that high level (Vin) than switching voltage Vsw is taller to go out the amount corresponding with the charging voltage of capacitor C2 (=Vreg-Vf) magnitude of voltage (=Vin+ (Vreg-Vf)).Therefore, through this booster voltage Vbst is provided as the driving voltage Vx of last side driver 10, thereby the conduction and cut-off that can carry out transistor N1 drives.
Then, specify the action of excess voltage protection 50 with reference to Fig. 2.Fig. 2 is the sequential chart that is used to explain the overvoltage protection action.In addition, described each voltage waveform of switching voltage Vsw, booster voltage Vbst and driving voltage Vx, described the conduction and cut-off state of over-voltage protection switch 60 at the hypomere of Fig. 2 at the epimere of Fig. 2.
Be applied under the situation that voltage between terminals Vy between bootstrapping terminal BST and the switch terminal SW is a near normal value (Vreg-Vf with and value), excess voltage protection 50 is made as logic level (for example low level) just often with excess voltage detection signal S1.When excess voltage detection signal S1 was set as logic level just often, over-voltage protection switch 60 was in on-state.Therefore, it is consistent with booster voltage Vbst that the driving voltage that offers side driver 10 applies the driving voltage Vx of end.
On the other hand; For example; On bootstrapping terminal BST, produce the high potential short circuit short circuit that applies end of input voltage vin (for example to) and the voltage between terminals Vy that is applied between bootstrapping terminal BST and the switch terminal SW is under the situation of overvoltage condition, excess voltage protection 50 switches to the logic level (for example high level) when unusual with excess voltage detection signal S1 from just often logic level (for example low level).When excess voltage detection signal S1 was set as the logic level when unusual, over-voltage protection switch 60 was in off-state.Therefore, the driving voltage Vx that the driving voltage that offers side driver 10 applies end does not rely on booster voltage Vbst, but is fixed on the magnitude of voltage after constant voltage Vreg has deducted the forward voltage drop Vf of diode 30.
Thus; Supply path from bootstrapping terminal BST to internal circuit (going up side driver 10) connects over-voltage protection switch 60; And when being applied to voltage between terminals Vy between bootstrapping terminal BST and the switch terminal SW and being in overvoltage condition; If the structure that over-voltage protection switch 60 is broken off; Then need not improve the component pressure of internal circuit (going up side driver 10), therefore can dwindle the occupied area of internal circuit (going up side driver 10), can realize that the miniaturization of Switching Power Supply IC1 or cost reduce.
In addition, owing to apply 2 times the potential difference (for example 24V) that is equivalent to input voltage vin, therefore need to use the big high withstand voltage element of component size as over-voltage protection switch 60 to over-voltage protection switch 60.But, since need not with internal circuit (go up side driver 10) be designed to high withstand voltage also can, therefore whole as Switching Power Supply IC1, can contribute to dwindling of chip size.
< the 2nd execution mode >
Fig. 3 is the circuit diagram that is used to explain the problem of the 1st execution mode.The structure of the 1st execution mode of explanation is very effective aspect the protection internal circuit (last side driver 10) when being applied to voltage between terminals Vy between bootstrapping terminal BST and the switch terminal SW and becoming overvoltage condition before.
But; In the structure of the 1st execution mode; When being applied to voltage between terminals Vz between upside lead-out terminal HO and the switch terminal SW and becoming overvoltage condition; Because driving voltage Vx rises via the body diode BD that forms the transistor 12P that goes up side driver 10, therefore transistor 11P, 11N, 12P, the 12N of side driver 10 is made as under the situation of low withstand voltage element (LV element) on will forming, and might destroy them.
Thus; The structure of the 1st execution mode is not provided with under the situation (being built-in with the situation of transistor N1) of upside lead-out terminal HO effective especially in Switching Power Supply IC1; In Switching Power Supply IC1, be provided with under the situation (situation of transistor N1 in addition) of upside lead-out terminal HO, also exist and further improve leeway.
Fig. 4 is the circuit diagram of the 2nd execution mode of expression switching regulaor, has particularly described the internal structure of last side driver 10.
In the switching regulaor of the 2nd execution mode, last side driver 10 comprises: the 1st inverter (inverter) 11, and it makes from after the input signal of control circuit 40 (upside drive signal) logic inversion and exports; With the 2nd inverter 12, it makes the output signal (counter-rotating upside drive signal) of the 1st inverter 11 further export to upside lead-out terminal HO after the logic inversion.In addition; The 1st inverter 11 is equivalent to the front stage circuits of implementing from the input signal of control circuit 40 to export after the predetermined process, and the 2nd inverter 12 is equivalent to the output signal of front stage circuits is implemented the late-class circuit that predetermined process is exported to upside lead-out terminal HO afterwards.
The 1st inverter 11 comprises P channel-type MOS field-effect transistor 11P and N channel-type MOS field-effect transistor 11N.The source electrode of transistor 11P and back grid all are connected via over-voltage protection switch 61 on the bootstrapping terminal BST.The drain electrode of transistor 11P is connected in the drain electrode of transistor 11N.The source electrode of transistor 11N and back grid all are connected on the switch terminal SW.The grid of transistor 11P and 11N all is connected on the signal output part of control circuit 40 (not shown).
The 2nd inverter 12 comprises P channel-type MOS field-effect transistor 12P and N channel-type MOS field-effect transistor 12N.The source electrode of transistor 12P and back grid be via over-voltage protection switch 61, but directly be connected on the bootstrapping terminal BST.The drain electrode of transistor 12P and 12N all is connected on the upside lead-out terminal HO.The source electrode of transistor 12N and back grid all are connected on the switch terminal SW.The grid of transistor 12P and 12N all is connected on the signal output part (connected node between the drain electrode of the drain electrode of transistor 11P and transistor 11N) of the 1st inverter 11.
As stated; In the switching regulaor of the 2nd execution mode, over-voltage protection switch 61 is set on the position in the open close drive voltage supply path to the 1st inverter 11 (front stage circuits) of the situation incision that when it breaks off, makes the drive voltage supply path conducting of leading to the 2nd inverter 12 (late-class circuit).
In addition, the 2nd inverter 12 is designed to be and has than higher withstand voltage of the 1st inverter 11.More specifically, the transistor 11P and the 11N that form the 1st inverter 11 are configured to low withstand voltage element (LV element), and the transistor 12P and the 12N that form the 2nd inverter 12 are configured to high withstand voltage element (HV element).
In the switching regulaor that constitutes by said structure; Be applied under the situation that voltage between terminals Vy between bootstrapping terminal BST and the switch terminal SW is a near normal value (Vreg-Vf with and value), excess voltage protection 50 is arranged to logic level (for example low level) just often with excess voltage detection signal S1.When excess voltage detection signal S1 was configured to logic level just often, over-voltage protection switch 61 was in off-state.Therefore, to the 1st inverter 11 and the 2nd inverter 12 booster voltage Vbst is provided all.
On the other hand; For example; In bootstrapping terminal BST, produce the high potential short circuit short circuit that applies end of input voltage vin (for example to) and the voltage between terminals Vy that is applied between bootstrapping terminal BST and the switch terminal SW becomes under the situation of overvoltage condition, excess voltage protection 50 switches to the logic level (for example high level) when unusual with excess voltage detection signal S1 from just often logic level (for example low level).When excess voltage detection signal S1 is configured to the logic level when unusual; Because over-voltage protection switch 61 is in off-state; Therefore the feed path that is directed against the booster voltage Vbst of the 1st inverter 11 is cut off, and protection forms the transistor 11P and the 11N (all being low withstand voltage element (LV element)) of the 1st inverter 11 under overvoltage condition.On the other hand, all be configured to high withstand voltage element (HV element) owing to form transistor 12P and the 12N of the 2nd inverter 12, even so voltage between terminals Vy become overvoltage condition and also can not be damaged.
In addition; Voltage between terminals Vz being applied between upside lead-out terminal HO and the switch terminal SW becomes under the situation of overvoltage condition; Because booster voltage Vbst is abnormal ascending via the body diode BD that forms the transistor 12P that goes up side driver 10, the voltage between terminals Vy that therefore is applied between bootstrapping terminal BST and the switch terminal SW also becomes overvoltage condition.Its result is activated with identical before overvoltage protection action, and protection forms the transistor 11P and the 11N (all being low withstand voltage element (LV element)) of the 1st inverter 11 under overvoltage condition.
Thus; If the final output stage that will go up side driver 10 as the withstand voltage element of height (HV element) and within it side disposed the structure of over-voltage protection switch 61; Then can the area increase of monopolizing of going up side driver 10 be suppressed to Min.; Even and when being applied to voltage between terminals Vz between upside lead-out terminal HO and the switch terminal SW and becoming overvoltage condition, also can suitably protect side driver 10.
< the 3rd execution mode >
The structure of the 2nd execution mode of explanation not only becomes under the situation of overvoltage condition at the voltage between terminals Vy that is applied between bootstrapping terminal BST and the switch terminal SW before; Side driver 10 in the due care very effectively; And become under the situation of overvoltage condition also side driver 10 in the due care very effectively at the voltage between terminals Vz that is applied between upside lead-out terminal HO and the switch terminal SW.
But; In the structure of the 2nd execution mode, after over-voltage protection switch 61 is switched on, be in the state that driving voltage Vint is not provided to the 1st inverter 11; The output signal of the 1st inverter 11 becomes low level; Therefore the output signal of the 2nd inverter 12 becomes high level, and transistor N1 is in the state that by mistake is switched on, and might bring fault to the whole action of assembly.
Thus, though the structure of the 2nd execution mode is very effective aspect protection switch power supply IC1 self,, then also exists and further improve leeway if be conceived to the whole protection of assembly.
Fig. 5 is the block diagram of the 3rd execution mode of expression switching regulaor, has particularly described the internal structure of last side driver 10.
In the switching regulaor of the 3rd execution mode, the 1st inverter 11 comprises upside inverter 11U and the downside inverter 11L that exports after input signal (upside drive signal) logic inversion that makes respectively from control circuit 40 (not shown).
On the other hand, the 2nd inverter 12 comprises P channel-type MOS field-effect transistor 12P and N channel-type MOS field-effect transistor 12N.The source electrode of transistor 12P and back grid all do not have via over-voltage protection switch 61, but directly are connected on the bootstrapping terminal BST.The drain electrode of transistor 12P and 12N all is connected on the upside lead-out terminal HO.The source electrode of transistor 12N and back grid all are connected on the switch terminal SW.The grid of transistor 12P is connected on the signal output part (connected node between the drain electrode of the negative electrode of diode 11UD and transistor 11UN) of upside inverter 11U.The grid of transistor 12N is connected on the signal output part (connected node between the drain electrode of the drain electrode of transistor 11LP and transistor 11LN) of downside inverter 11L.In addition, as previously mentioned, the transistor 12P and the 12N that form the 2nd inverter 12 are set as high withstand voltage element (HV element).
In addition, in the switching regulaor of the 3rd execution mode, between the grid of transistor 12P and bootstrapping terminal BST, be connected pull-up resistor 13, between the grid of transistor 12N and switch terminal SW, be connected pull down resistor 14.
In the switching regulaor that constitutes by said structure; Under the situation that over-voltage protection switch 61 is disconnected; Upside inverter 11U and downside inverter 11L are in the state that is not provided driving voltage Vint, become the state of the signal that can not control the transistor 12P that forms the 2nd inverter 12 and 12N.At this moment, the signal of transistor 12P is set as high level via pull-up resistor 13, so transistor 12P ends.In addition, the signal of transistor 12N is set as low level via pull down resistor 13, so transistor 12N also ends.Therefore, upside lead-out terminal HO becomes high impedance status, can prevent that transistor N1 from becoming the state that by mistake is switched on, and can improve the assembly whole reliability.
In addition; In the structure of on the grid that makes transistor 12P, drawing; When over-voltage protection switch 61 is disconnected; Because the grid of transistor 12P becomes high level (booster voltage Vbst), therefore form the current path that applies end that arrives driving voltage Vint via the body diode (not shown) of the transistor 11UP that forms upside inverter 11.Therefore, the switching regulaor of the 3rd execution mode is to use diode 11UD to block the structure of above-mentioned current path.Through being arranged to this structure, even, the damage of the low withstand voltage element (LV element) that forms the 1st inverter 11 is taken precautions against in possible trouble owing under the situation of drawing on the grid that makes transistor 12P, also can avoid the abnormal ascending of driving voltage Vint.
Thus; If following structure; Promptly on the architecture basics of the 2nd execution mode; Transistor 12P that forms the 2nd inverter 12 and the drive system of 12N are separated into 2 systems, and pull-up resistor 13 and pull down resistor 14 are set on each grid, further in the upside inverter 11U of the signal that generates transistor 12P, adverse current is set and prevents to use diode 11UD; Then not only can protection switch power supply IC1 self, but also can suitably protect the assembly that is equipped on the Switching Power Supply IC1 whole.
< to the application of television set >
Fig. 6 is the block diagram of a structure example that the television set of switching regulaor has been carried in expression.In addition, Fig. 7 A～Fig. 7 C is respectively vertical view, side view and the back view that has carried the television set of switching regulaor.The television set X of this structure example possesses the X1 of tuner portion, the X2 of decoder portion, display part X3, speaker portion X4, operating portion X5, interface portion X6, control part X7 and power supply unit X8.
The X1 of tuner portion selects the broadcast singal of desired channel according to the reception signal that is received by the antenna X0 that is connected with television set X outside.
The X2 of decoder portion generates signal of video signal and voice signal according to the broadcast singal of being selected by tuner X1.In addition, the X2 of decoder portion also possesses the function that generates signal of video signal and voice signal based on the external input signal from interface portion X6.
Display part X3 will be exported as image by the signal of video signal that the X2 of decoder portion generates.As display part X3, use display panels or Plasmia indicating panel.
Speaker portion X4 will be exported as sound by the voice signal that decoder portion generates.
Operating portion X5 is one of man-machine interface that receives user's operation.As operating portion X5, can use button, switch, remote controller etc.
Interface portion X6 is a front end port of accepting external input signal from external equipment (Disc player or hard disk drive etc.).
The action of above-mentioned each the X1～X6 of of the unified control of control part X7.As control part X7, can use CPU [central processing unit] etc.
Power supply unit X8 provides electric power to above-mentioned each X1～X7 of.As power supply unit X8, can preferably use the switching regulaor that comprises aforesaid Switching Power Supply IC1.
< other variation >
In addition, the structure of the utility model in the scope of the purport that is no more than the utility model, can be carried out various changes except above-mentioned execution mode.Promptly; Above-mentioned execution mode all is an illustration, is not what limit, and the technical scope of the utility model is not the explanation of above-mentioned execution mode; But determined by the technical scheme of utility model, be interpreted as comprising all changes in the scope that belongs to the technical scheme equivalence of utility model.
For example; In above-mentioned the 2nd execution mode and the 3rd execution mode; Be that example is illustrated all, but the application of the utility model is not limited to this, also can using the utility model in the side driver 20 down with the structure of in last side driver 10, having used the utility model.At this moment, as long as Fig. 4 or bootstrapping terminal BST depicted in figure 5, upside lead-out terminal HO and switch terminal SW are replaced to constant voltage terminal REG, downside lead-out terminal LO and earth terminal GND respectively.
In addition, in above-mentioned execution mode, N channel-type MOS field-effect transistor is replaced to npn type bipolar transistor or P channel-type MOS field-effect transistor is replaced to pnp type bipolar transistor all is arbitrarily.Under the situation of carrying out this replacement, be connected with base stage, collector electrode, the emitter corresponding mode of bipolar transistor respectively with grid, drain electrode, the source electrode of MOS field-effect transistor and get final product.
(utilizability on the industry)
The utility model is for example extensively be used as LCD, plasma display, the personal computer aspect of performance technology of great use with the switching regulaor of the supply unit of power supply (DDR [Double-Data-Rate] memory with power supply etc.), DVD [Digital Versatile Disc] player/recorder etc. improving.
Claims (13)
1. semiconductor device is characterized in that possessing:
The the 1st～the 3rd outside terminal;
Driver, its acceptance are applied to the driving voltage and the supply that is applied to the reference voltage of said the 2nd outside terminal of said the 1st outside terminal, to said the 3rd outside terminal output signal;
Excess voltage protection, its supervision are applied to the voltage between terminals between said the 1st outside terminal and said the 2nd outside terminal, generate excess voltage detection signal; With
Over-voltage protection switch is carried out conduction and cut-off control according to said excess voltage detection signal,
Said driver comprises: export to the late-class circuit of said the 3rd outside terminal after front stage circuits of exporting after input signal is implemented to handle and the output signal enforcement processing to said front stage circuits,
Said over-voltage protection switch is set at when making the drive voltage supply path conducting of leading to said late-class circuit when it breaks off and cuts off on the position in the drive voltage supply path of leading to said front stage circuits.
2. semiconductor device according to claim 1 is characterized in that,
Said late-class circuit is designed to than taller withstand voltage of said front stage circuits.
3. semiconductor device according to claim 2 is characterized in that,
Said front stage circuits comprises makes said input signal carry out the 1st inverter of exporting after the logic inversion,
Said late-class circuit comprises that the output signal that makes said front stage circuits carries out the 2nd inverter that logic inversion is exported to said the 3rd outside terminal afterwards.
4. semiconductor device according to claim 3 is characterized in that,
Said the 1st inverter comprises the downside inverter that makes said input signal carry out the upside inverter of output after the logic inversion and make said input signal carry out output after the logic inversion,
Said the 2nd inverter comprises side switch that the output signal according to said upside inverter is switched on/ends and the side switch that is switched on/ends according to the output signal of said downside inverter.
5. semiconductor device according to claim 4 is characterized in that,
Said side switch is the P channel type field effect transistors,
Said side switch is the N channel type field effect transistors.
6. semiconductor device according to claim 5 is characterized in that,
Said late-class circuit comprises: the pull down resistor that between pull-up resistor that is connected between the supply end of the grid of said P channel type field effect transistors and said driving voltage and the supply end at the grid of said N channel type field effect transistors and said reference voltage, is connected.
7. semiconductor device according to claim 6 is characterized in that,
Said upside inverter comprises:
The 1st switch that between the supply end of said driving voltage and signal output part, is connected;
The 2nd switch that is connected between the end said signal output part and applying of said reference voltage; With
Anode is connected in the diode that said the 1st switch, negative electrode are connected in said signal output part.
8. semiconductor device according to claim 7 is characterized in that,
Said the 2nd switch and said diode are designed to have than taller withstand voltage of said the 1st switch.
9. according to each described semiconductor device of claim 1～8, it is characterized in that,
This semiconductor device possesses:
The 4th outside terminal, it imports feedback voltage; With
Control circuit, the mode consistent with the desired value of regulation with said feedback voltage generates said input signal.
10. switching regulaor is characterized in that possessing:
The described semiconductor device of claim 9;
Transistor is according to carried out conduction and cut-off control from the output signal of said the 3rd outside terminal;
Rectification/smoothing circuit, its switching voltage to the pulse type of drawing from a said transistorized end carry out rectification/smoothly to generate output voltage; With
The feedback voltage generative circuit, it generates and the corresponding said feedback voltage of said output voltage.
11. switching regulaor according to claim 10 is characterized in that,
Apply the booster voltage that exceeds the regulation current potential than said switching voltage to said the 1st outside terminal, apply said switching voltage to said the 2nd outside terminal, said transistorized grid is connected with said the 3rd outside terminal.
12. switching regulaor according to claim 10 is characterized in that,
Apply constant voltage to said the 1st outside terminal, apply earthed voltage to said the 2nd outside terminal, said transistorized grid is connected with said the 3rd outside terminal.
13. a television set is characterized in that possessing:
Tuner portion, it selects the broadcast singal of desired channel according to receiving signal;
Decoder portion, it generates signal of video signal and voice signal according to the broadcast singal of being selected by said tuner;
Display part, it is exported said signal of video signal as image;
Speaker portion, it is exported said voice signal as sound;
Operating portion, it accepts user's operation;
Interface portion, it accepts external input signal;
Control part, the action of its above-mentioned each one of unified control; With
Power supply unit, it provides electric power to above-mentioned each one,
Said power supply unit comprises each described switching regulaor of claim 10～claim 12.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011-028487 | 2011-02-14 | ||
| JP2011028487 | 2011-02-14 | ||
| JP2012-005280 | 2012-01-13 | ||
| JP2012005280A JP5863027B2 (en) | 2011-02-14 | 2012-01-13 | Semiconductor device, switching regulator, TV |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202565162U true CN202565162U (en) | 2012-11-28 |
Family
ID=47016533
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2012200430561U Expired - Lifetime CN202565162U (en) | 2011-02-14 | 2012-02-10 | Semiconductor device, switching regulator and television set |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP5863027B2 (en) |
| CN (1) | CN202565162U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106558979A (en) * | 2015-09-29 | 2017-04-05 | 罗姆股份有限公司 | Semiconductor device |
| CN109600133A (en) * | 2017-09-30 | 2019-04-09 | 瑞昱半导体股份有限公司 | It can be avoided the circuit of the damage of overvoltage |
| CN109792162A (en) * | 2016-10-18 | 2019-05-21 | 株式会社富士 | Contactless power supply device |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4705264B2 (en) * | 2001-04-18 | 2011-06-22 | ローム株式会社 | Switching regulator |
| JP4497991B2 (en) * | 2004-04-14 | 2010-07-07 | 株式会社ルネサステクノロジ | Power supply driver circuit and switching power supply device |
| JP2009011080A (en) * | 2007-06-28 | 2009-01-15 | Toshiba Corp | Switching power supply circuit and broadcasting device |
| TWI376869B (en) * | 2009-04-13 | 2012-11-11 | Anpec Electronics Corp | Direct current converter |
| JP2011014738A (en) * | 2009-07-02 | 2011-01-20 | Mitsumi Electric Co Ltd | Semiconductor integrated circuit |
| JP5618733B2 (en) * | 2009-12-09 | 2014-11-05 | ローム株式会社 | Semiconductor device and switching regulator using the same |
-
2012
- 2012-01-13 JP JP2012005280A patent/JP5863027B2/en active Active
- 2012-02-10 CN CN2012200430561U patent/CN202565162U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106558979A (en) * | 2015-09-29 | 2017-04-05 | 罗姆股份有限公司 | Semiconductor device |
| CN106558979B (en) * | 2015-09-29 | 2020-01-07 | 罗姆股份有限公司 | Semiconductor device with a plurality of semiconductor chips |
| CN109792162A (en) * | 2016-10-18 | 2019-05-21 | 株式会社富士 | Contactless power supply device |
| CN109600133A (en) * | 2017-09-30 | 2019-04-09 | 瑞昱半导体股份有限公司 | It can be avoided the circuit of the damage of overvoltage |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2012186990A (en) | 2012-09-27 |
| JP5863027B2 (en) | 2016-02-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20121128 |