CN202471791U

CN202471791U - FPGA-based digital storage oscilloscope

Info

Publication number: CN202471791U
Application number: CN 201220088792
Authority: CN
Inventors: 韩敬伟
Original assignee: Binzhou University
Current assignee: Binzhou University
Priority date: 2012-03-12
Filing date: 2012-03-12
Publication date: 2012-10-03
Anticipated expiration: 2022-03-12

Abstract

The utility model relates to an oscilloscope, in particular to an FPGA (Field Programmable Gate Array) digital storage oscilloscope. The digital storage oscilloscope is composed of a channel 1, a channel 2, a singlechip (8), an FPGA, a step delaying circuit DS1032 (20), an LCD touch screen and a button (21), wherein the channel 1 is composed of a 1MOmega input impedance matching (1), a former-stage signal conditioning (2) and an A/D (Analog/Digital) sampling (3); the channel 2 is composed of a 1MOmega input impedance matching (5), a former-stage signal conditioning (4) , a comparing model (7) and an A/D sampling (6); and the FPGA is composed of an A/D sampling controlling and internal trigger controlling part, a signal conditioning controlling part, a waveform display controlling part, a system bus (17), frequency measuring modules (12) with equal precision, a data storing module (13) and a step delaying circuit controlling module (14). The A/D sampling controlling and internal trigger controlling part is composed of a real-time sampling controlling module (9), a step delay (10) generated by the FPGA, and a step delay (11) generated by an integrated circuit chip. The signal conditioning controlling part is composed of an amplification controlling module (15) and a DC bias module (16). The waveform display controlling part is composed of an LCD control module (18) and a knob control module (19). The digital storage oscilloscope can store the measured waveform, and is large in storage content and convenient in adjusting and taking.

Description

Storage digital oscilloscope based on FPGA

Technical field

The utility model relates to a kind of oscillograph, particularly a kind of storage digital oscilloscope based on FPGA.

Background technology

Oscillograph has purposes widely as a kind of electronic equipment commonly used at aspects such as electronics manufacturing, designs, but existing digital storage oscilloscope, memory space is smaller, transfers inconvenience, and this is the weak point of prior art.

Summary of the invention

The utility model proposes a kind of storage digital oscilloscope based on FPGA, can effectively improve the memory space of digital storage oscilloscope, and transfers conveniently.

The technical scheme that the utility model adopts is: the storage digital oscilloscope based on FPGA is made up of passage 1, passage 2, single-chip microcomputer (8), FPGA, stepping delay circuit DS1032 (20) and LCD liquid crystal display touch screen and button (21); Wherein said passage 1 is made up of 1M Ω input impedance matching (1), prime signal condition (2) and A/D sampling (3); Wherein said passage 2 is made up of 1M Ω input impedance matching (5), prime signal condition (4), comparison model (7) and A/D sampling (6); Wherein said FPGA by A/D sampling control and internal trigger control section, signal condition control section, waveform display control section, system bus (17), etc. precision frequency measurement module (12), data memory module (13) and stepping delay circuit control module (14) form; Said A/D sampling control and internal trigger control section produce stepping time-delay (10) by real time sample control module (9), FPGA and IC chip generation stepping time-delay (11) is formed; Said signal condition control section becomes with direct current biasing module (16) level by amplifying control module (15); Said waveform display control section is made up of LCD liquid crystal control module (18) and knob controlling module (19), and this oscillograph can be stored measured waveform, and memory space is big, transfers conveniently.

The beneficial effect of the utility model is: can effectively improve the memory space of digital storage oscilloscope, and transfer conveniently.

Description of drawings

Fig. 1 is the structure principle chart of the utility model.

Embodiment

Below in conjunction with accompanying drawing the utility model is made detailed description further.

Referring to Fig. 1; The utility model relates to a kind of oscillograph; Be particularly related to a kind of storage digital oscilloscope based on FPGA, said storage digital oscilloscope based on FPGA is made up of passage 1, passage 2, single-chip microcomputer (8), FPGA, stepping delay circuit DS1032 (20) and LCD liquid crystal display touch screen and button (21); Wherein said passage 1 is made up of 1M Ω input impedance matching (1), prime signal condition (2) and A/D sampling (3); Wherein said passage 2 is made up of 1M Ω input impedance matching (5), prime signal condition (4), comparison model (7) and A/D sampling (6); Wherein said FPGA by A/D sampling control and internal trigger control section, signal condition control section, waveform display control section, system bus (17), etc. precision frequency measurement module (12), data memory module (13) and stepping delay circuit control module (14) form; Said A/D sampling control and internal trigger control section produce stepping time-delay (10) by real time sample control module (9), FPGA and IC chip generation stepping time-delay (11) is formed; Said signal condition control section becomes with direct current biasing module (16) level by amplifying control module (15); Said waveform display control section is made up of LCD liquid crystal control module (18) and knob controlling module (19), and this oscillograph can be stored measured waveform, and memory space is big, transfers conveniently.

Claims

1. based on the storage digital oscilloscope of FPGA, it is characterized in that: said storage digital oscilloscope based on FPGA is made up of passage 1, passage 2, single-chip microcomputer (8), FPGA, stepping delay circuit DS1032 (20) and LCD liquid crystal display touch screen and button (21); Wherein said passage 1 is made up of 1M Ω input impedance matching (1), prime signal condition (2) and A/D sampling (3); Wherein said passage 2 is made up of 1M Ω input impedance matching (5), prime signal condition (4), comparison model (7) and A/D sampling (6); Wherein said FPGA by A/D sampling control and internal trigger control section, signal condition control section, waveform display control section, system bus (17), etc. precision frequency measurement module (12), data memory module (13) and stepping delay circuit control module (14) form; Said A/D sampling control and internal trigger control section produce stepping time-delay (10) by real time sample control module (9), FPGA and IC chip generation stepping time-delay (11) is formed; Said signal condition control section becomes with direct current biasing module (16) level by amplifying control module (15); Said waveform display control section is made up of LCD liquid crystal control module (18) and knob controlling module (19).