CN202433894U - Data collector based on USB (Universal Serial Bus) and OTG (On-The-Go) bus - Google Patents
Data collector based on USB (Universal Serial Bus) and OTG (On-The-Go) bus Download PDFInfo
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- CN202433894U CN202433894U CN2011205526937U CN201120552693U CN202433894U CN 202433894 U CN202433894 U CN 202433894U CN 2011205526937 U CN2011205526937 U CN 2011205526937U CN 201120552693 U CN201120552693 U CN 201120552693U CN 202433894 U CN202433894 U CN 202433894U
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- arm microprocessor
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Abstract
The utility model discloses a data collector based on a USB (Universal Serial Bus) and OTG (On-The-Go) bus. The data collector comprises a high-speed A/D (Analog to Digital) converter, an FPGA (Field Programmable Gate Array) control chip, an ARM microprocessor and a USBOTG transmission module, wherein the USBOTG function is realized by the ARM microprocessor, when a USBOTG controller works at a slave state, the collected data is transmitted to a PC (Personnel Computer) to carry out corresponding treatments, when the USBOTG controller works in a host state, the data is transmitted to a slave device connected with the USBOTG controller. The data controller can be directly connected with the PC machine to transmit the data; or PC can be completely independent so as to realize connection and data exchange between different devices or mobile devices; the data collector can adapt to field and site test requirements, and the data is stored in an external U disc under an off-line state.
Description
Technical field
The utility model relates to the data acquisition technology field, is specifically related to a kind of data acquisition unit based on the USB+OTG bus.
Background technology
In modern industrial and the scientific research field; The application of data acquisition system (DAS) more and more widely, traditional data acquisition systems collection and transmission speed are slow, real-time is poor, the requirement that problems such as trouble, the perfection of wind resistance interference performance have been difficult to adapt to present data acquisition is installed.
On the problem of data transmission; The A/D card based on ISA, pci bus is mainly adopted in the traditional data collection; Trouble not only is installed, is subject to the interference of environment in the cabinet based on the capture card of serial ports, parallel port and based on bus integrated circuit boards such as 433,485; And owing to the restriction that receives computer slot quantity and address, interrupt resources, poor expandability.Move the place at some especially, traditional harvester can't adapt to field requirement at all, and is portable poor.
The utility model content
To above-mentioned prior art, the technical matters that the utility model will solve is: traditional harvester can't adapt to on-the-spot utilization, and is portable poor.
In order to solve the problems of the technologies described above, the utility model adopts following technical scheme:
A kind of data acquisition unit based on the USB+OTG bus is provided; It is characterized in that; Comprise high-speed a/d converter, FPGA control chip, ARM microprocessor, USBOTG transport module, the control of ARM microprocessor realizes the USBOTG function, and FPGA produces control signal starts working the A/D change-over circuit; Convert the analog input amount to digital signal, receive image data by the ARM microprocessor behind the FIFO buffer memory in FPGA again; When the USBOTG controller is operated in slave status, the data that collect is sent to does corresponding processing on the PC, when being operated in Host Status, data are sent to connected slave unit.
Said ARM microprocessor control USBOTG control chip realizes that the data transmission of main frame and equipment room, principal and subordinate's machine switch.
Said USB interface control chip is ISP1262.
Compared with prior art, the utlity model has following beneficial effect:
The utility model can directly link to each other with PC and carry out data transmission; Also can thoroughly break away from PC, realize connection and exchanges data between various distinct devices or mobile device; The demand that can adapt to field and on-the-spot test, under off-line state with data storage in external USB flash disk.
Description of drawings
The structural representation of Fig. 1 the utility model.
Embodiment
To combine accompanying drawing and embodiment that the utility model is done further to describe below.
A kind of data acquisition unit based on the USB+OTG bus is provided; It is characterized in that; Comprise high-speed a/d converter, FPGA control chip, ARM microprocessor, USBOTG transport module, the control of ARM microprocessor realizes the USBOTG function, and FPGA produces control signal starts working the A/D change-over circuit; Convert the analog input amount to digital signal, receive image data by the ARM microprocessor behind the FIFO buffer memory in FPGA again; When the USBOTG controller is operated in slave status, the data that collect is sent to does corresponding processing on the PC, when being operated in Host Status, data are sent to connected slave unit.Said ARM microprocessor control USBOTG control chip realizes that the data transmission of main frame and equipment room, principal and subordinate's machine switch.Said USB interface control chip is ISP1262.Can directly link to each other and carry out data transmission with PC; Also can thoroughly break away from PC, realize connection and exchanges data between various distinct devices or mobile device; The demand that can adapt to field and on-the-spot test, under off-line state with data storage in external USB flash disk.
Claims (3)
1. data acquisition unit based on the USB+OTG bus; It is characterized in that; Comprise high-speed a/d converter, FPGA control chip, ARM microprocessor, USBOTG transport module, the USBOTG controller in the ARM microprocessor control USBOTG transport module, FPGA produces control signal starts working the A/D change-over circuit; Convert the analog input amount to digital signal, receive image data by the ARM microprocessor behind the FIFO buffer memory in FPGA again; When the USBOTG controller is operated in slave status, the data that collect is sent to does corresponding processing on the PC, when being operated in Host Status, data are sent to connected slave unit.
2. the data acquisition unit based on the USB+OTG bus according to claim 1 is characterized in that, said ARM microprocessor control USBOTG control chip realizes that the data transmission of main frame and equipment room, principal and subordinate's machine switch.
3. the data acquisition unit based on the USB+OTG bus according to claim 1 is characterized in that, said USB interface control chip is ISP1262.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011205526937U CN202433894U (en) | 2011-12-27 | 2011-12-27 | Data collector based on USB (Universal Serial Bus) and OTG (On-The-Go) bus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011205526937U CN202433894U (en) | 2011-12-27 | 2011-12-27 | Data collector based on USB (Universal Serial Bus) and OTG (On-The-Go) bus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202433894U true CN202433894U (en) | 2012-09-12 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011205526937U Expired - Fee Related CN202433894U (en) | 2011-12-27 | 2011-12-27 | Data collector based on USB (Universal Serial Bus) and OTG (On-The-Go) bus |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202433894U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103217930A (en) * | 2013-05-02 | 2013-07-24 | 浙江中控技术股份有限公司 | Data interaction system for industrial controllers |
-
2011
- 2011-12-27 CN CN2011205526937U patent/CN202433894U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103217930A (en) * | 2013-05-02 | 2013-07-24 | 浙江中控技术股份有限公司 | Data interaction system for industrial controllers |
| CN103217930B (en) * | 2013-05-02 | 2016-01-27 | 浙江中控技术股份有限公司 | Data interaction system between a kind of industrial control unit (ICU) |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120912 Termination date: 20121227 |