CN202433437U - Pulse signal peak level detection system - Google Patents
Pulse signal peak level detection system Download PDFInfo
- Publication number
- CN202433437U CN202433437U CN 201120527808 CN201120527808U CN202433437U CN 202433437 U CN202433437 U CN 202433437U CN 201120527808 CN201120527808 CN 201120527808 CN 201120527808 U CN201120527808 U CN 201120527808U CN 202433437 U CN202433437 U CN 202433437U
- Authority
- CN
- China
- Prior art keywords
- trigger
- detection system
- counter
- triode
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
The utility model discloses a pulse signal peak level detection system, which is characterized in that a fault reference level and a sampling signal are simultaneously connected into a voltage comparator and is then sequentially connected into a counter through a second trigger, a triode Q3 and a photoelectric coupler B2; a synchronous pulse signal passes through a pulse delay regulating circuit and is connected into a first trigger, the Q end of the first trigger passes through a triode Q1 and a photoelectric coupler B1 and is then connected into the counter, and the end of the first trigger is connected into the photoelectric coupler B2 through a triode Q2. As the circuit structure is adopted, a circuit has the following advantages that 1, the sensitivity of the detection system can be regulated, and the detection system is suitable for occasions with different needs; 2, the sensitivity is regulated by regulating the alarm numerical value of the counter, which is convenient and reliable; and 3, the production cost of the whole detection system is lower.
Description
Technical field
The utility model relates to the pulse signal field, particularly a kind of pulse signal peak level detection system.
Background technology
Often need detect and protect at circuit protection system, such as pulse voltage overvoltage, pulse current overcurrent or the like the excessive fault of the peak level of some pulse signals.
Traditional way is that the pulse signal that is sampled to is directly delivered to comparer and reference signal compares, in case the peak level of sampling greater than reference signal, the output level of comparer overturns at once, and it is kept realizing the fault interlock protection.
But this holding circuit sensitivity is too high; When the peak level of taking a sample is greater than reference signal, react at once; And to require in some pulse signals be not that very high occasion is just inapplicable; The too high words of sensitivity cause the pulse signal can't operate as normal probably, but the peak level that these occasions again must pulse signals detects and protects.
Providing a kind of sensitivity adjustable pulse signal peak level detection system, is the problem that prior art need solve with the occasion that is suitable for different demands.
The utility model content
The utility model technical matters to be solved is, a kind of pulse signal peak level detection system is provided, and it can used sensitivity requirement different occasions.
For achieving the above object; The technical scheme of the utility model is; A kind of pulse signal peak level detection system is characterized in that: described detection system is to insert counter through second trigger, triode Q3, photoelectrical coupler B2 successively after fault reference level, sampled signal insert voltage comparator simultaneously; Synchronization pulse inserts first trigger through the pulse delay regulating circuit; Insert counter behind the Q end process triode Q1 of first trigger, the photoelectrical coupler B1,
end of first trigger inserts photoelectrical coupler B2 through triode Q2.
Described photoelectrical coupler B1 inserts the counting end of counter; Photoelectrical coupler B2 inserts the reset terminal of counter.
Described first trigger, second trigger are monostalbe trigger.
Described triode Q1, Q3 are NPN type triode; Triode Q2 is the positive-negative-positive triode.
Described counter be the high-speed counter of CPU device.
A kind of pulse signal peak level detection system, owing to adopt the foregoing circuit structure, this circuit has the following advantages: 1, the sensitivity of this detection system can be regulated, and is applicable to the occasion of different demands; 2, carry out sensitivity adjusting through the warning numerical value of regulating counter, convenient and reliable; 3, the production cost of whole detection system is lower.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the utility model is done further detailed explanation:
Fig. 1 is the structured flowchart of a kind of pulse signal peak level of the utility model detection system;
Fig. 2 is the voltage comparator input and output waveform synoptic diagram of a kind of pulse signal peak level of the utility model detection system;
Fig. 3 is the output waveform synoptic diagram of peak level monostalbe trigger
end when too high;
In Fig. 1,1, the pulse delay regulating circuit; 2, first trigger; 3, voltage comparator; 4, second trigger; 5, counter.
Embodiment
The utility model on the traditional circuit basis, increase by one the tunnel with the identical synchronization pulse of pulse sampling signal sequence that need to detect; Utilization has the CPU device (like single-chip microcomputer, PLC) of the high-speed counter function of the input that can reset, and software and hardware combining realizes the peak level fault detection system of scalable sensitivity.
The utility model mainly utilizes the high-speed counter of counter 5 that synchronization pulse is counted, and one direct sending reset signal makes the count value zero clearing to counter 5 when operate as normal simultaneously, when fault takes place, stops the input of reset signal, and at this moment count value increases.If fault recurs, count value can continue to increase.In software, be provided with and carry out corresponding operation when count value reaches certain default value and can realize the fault interlock protection.
As shown in Figure 1, the utility model is that fault reference level, sampled signal insert simultaneously behind the voltage comparator 3 successively through second trigger 4, triode Q3, photoelectrical coupler B2 and insert counter 5; Synchronization pulse inserts first trigger 2 through pulse delay regulating circuit 1;
end that inserts counter 5, the first triggers 2 behind the Q end process triode Q1 of first trigger 2, the photoelectrical coupler B1 inserts photoelectrical coupler B2 through triode Q2.
Photoelectrical coupler B1 inserts the counting end of counter 5; Photoelectrical coupler B2 inserts the reset terminal of counter 5.
First trigger, second trigger are monostalbe trigger.Triode Q1, Q3 are NPN type triode; Triode Q2 is the positive-negative-positive triode.Counter 5 be the high-speed counter of CPU device.
Synchronization pulse is input to pulse delay regulating circuit 1, the pulse shaping circuit that the pulse delay regulating circuit 1 and first trigger 2 constitute; Pulse sampling signal to be detected is input to voltage comparator 3, and voltage comparator 3 is connected with second trigger 4.The Q end of first trigger 2 is input to the counting end of counter 5 through photoelectrical coupler B1 through triode Q1;
end of first trigger 2 cooperates conducting photoelectrical coupler B2 through triode Q2 with triode Q3, deliver to counter 5 as counter 5 reset signals.
Behind pulse sampling to be detected synchronous the pulse signal process pulse delay regulating circuit 1 and first trigger 2; End produces and synchronous positive pulse and the negative pulse of its sequential respectively with
at the Q of first trigger 2 end; The positive pulse of Q end makes corresponding saturation conduction of triode Q1 and then conducting photoelectrical coupler B1 make pulse train be input to counter 5, and the negative pulse of
end makes the corresponding saturation conduction of triode Q2 and moves high level on 1 pin of photoelectrical coupler B2 to the form of pulse.
Under trouble-free situation; The output of voltage comparator 3 keeps, then
of second trigger 4 end keep always the high level state of normality make triode Q3 always saturation conduction move 2 pin of photoelectrical coupler B2 to low level.Pulse on 1 pin of photoelectrical coupler B2 just can make its conducting and this pulse is delivered to counter 5 as the reset signal of counter 5.
Voltage comparator 3 output redirects when pulse sampling signal level to be detected is higher than reference level; Voltage comparator 3 outputs return to normal when end-of-pulsing; As shown in Figure 2, each sampled signal that is higher than benchmark all can make pulse signal of comparer output and produce a negative pulse at second trigger 4
end.No longer conducting of triode Q3 when negative pulse.Regulate this negative pulse and make the negative pulse of its width greater than
end of first trigger 2; And regulating impulse delay adjustment circuit 1 makes the negative pulse of its
that comprises first trigger 2 in time end, like Fig. 3.Can make the photoelectrical coupler B2 can't conducting, counter reset signal disappears, and counter 5 begins counting.If malfunction takes place always, then count value does not increase always and can be cleared, and reaches the counter prevalue that in the program of counter 5, is provided with and can call corresponding interrupt routine, reaches the effect of protection.
Regulate the sensitivity that detects if desired, the prevalue that only need in program, revise counter 5 gets final product, and can control the number of the pulse of breaking down continuously accurately.
Combine accompanying drawing that the utility model has been carried out exemplary description above; Obviously the concrete realization of the utility model does not receive the restriction of aforesaid way; As long as the various improvement of having adopted the utility model technical scheme to carry out; Or directly apply to other occasion without improvement, all within the protection domain of the utility model.
Claims (5)
1. pulse signal peak level detection system is characterized in that: described detection system is to insert counter (5) through second trigger (4), triode Q3, photoelectrical coupler B2 successively after fault reference level, sampled signal insert voltage comparator (3) simultaneously; Synchronization pulse inserts first trigger (2) through pulse delay regulating circuit (1); Insert counter (5) behind the Q end process triode Q1 of first trigger (2), the photoelectrical coupler B1,
end of first trigger (2) inserts photoelectrical coupler B2 through triode Q2.
2. a kind of pulse signal peak level detection system according to claim 1 is characterized in that: described photoelectrical coupler B1 inserts the counting end of counter (5); Photoelectrical coupler B2 inserts the reset terminal of counter (5).
3. a kind of pulse signal peak level detection system according to claim 1 is characterized in that: described first trigger (2), second trigger (4) are monostalbe trigger.
4. a kind of pulse signal peak level detection system according to claim 1 is characterized in that: described triode Q1, Q3 are NPN type triode; Triode Q2 is the positive-negative-positive triode.
5. a kind of pulse signal peak level detection system according to claim 1 and 2 is characterized in that: described counter (5) be the high-speed counter of CPU device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201120527808 CN202433437U (en) | 2011-12-16 | 2011-12-16 | Pulse signal peak level detection system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201120527808 CN202433437U (en) | 2011-12-16 | 2011-12-16 | Pulse signal peak level detection system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202433437U true CN202433437U (en) | 2012-09-12 |
Family
ID=46782876
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201120527808 Expired - Fee Related CN202433437U (en) | 2011-12-16 | 2011-12-16 | Pulse signal peak level detection system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202433437U (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103491679A (en) * | 2013-09-13 | 2014-01-01 | 南京工程学院 | High-power LED flashlight |
| CN106405309A (en) * | 2016-08-31 | 2017-02-15 | 武汉海奥电气有限公司 | System and method for rapidly determining single phase earth fault |
| CN109239446A (en) * | 2018-08-03 | 2019-01-18 | 广东美的制冷设备有限公司 | AC overvoltage detection circuit, air conditioner, internal machine of air-conditioner and its control panel |
| CN113376428A (en) * | 2021-06-09 | 2021-09-10 | 上海光之虹光电通讯设备有限公司 | Repetitive pulse and high-speed repetitive pulse amplitude detection method |
| CN114325040A (en) * | 2021-12-06 | 2022-04-12 | 东莞声索电子有限公司 | Pulse voltage detection circuit |
-
2011
- 2011-12-16 CN CN 201120527808 patent/CN202433437U/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103491679A (en) * | 2013-09-13 | 2014-01-01 | 南京工程学院 | High-power LED flashlight |
| CN103491679B (en) * | 2013-09-13 | 2015-10-21 | 南京工程学院 | A kind of high-power LED flashlight |
| CN106405309A (en) * | 2016-08-31 | 2017-02-15 | 武汉海奥电气有限公司 | System and method for rapidly determining single phase earth fault |
| CN109239446A (en) * | 2018-08-03 | 2019-01-18 | 广东美的制冷设备有限公司 | AC overvoltage detection circuit, air conditioner, internal machine of air-conditioner and its control panel |
| CN109239446B (en) * | 2018-08-03 | 2021-11-19 | 广东美的制冷设备有限公司 | Alternating-current overvoltage detection circuit, air conditioner indoor unit and control panel thereof |
| CN113376428A (en) * | 2021-06-09 | 2021-09-10 | 上海光之虹光电通讯设备有限公司 | Repetitive pulse and high-speed repetitive pulse amplitude detection method |
| CN114325040A (en) * | 2021-12-06 | 2022-04-12 | 东莞声索电子有限公司 | Pulse voltage detection circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN202433437U (en) | Pulse signal peak level detection system | |
| CN201477172U (en) | Electric leakage detection circuit system | |
| CN103916012A (en) | Intrinsic safety power conversion device | |
| CN203838302U (en) | Fault detection system for charge-discharge circuit | |
| CN105807175B (en) | Signal method for implanting and the signal injection device for searching singlephase earth fault | |
| CN103308755B (en) | The insulation detection device of high voltage direct current remote electric power system and method | |
| CN209559337U (en) | A kind of single photon detection dead time control device | |
| CN204536411U (en) | A kind of pot Acquisition Circuit with burn out detection | |
| CN204116485U (en) | A kind of lightning arrester lightning monitoring instrument | |
| CN207524548U (en) | It is a kind of weighed based on smoke box before separation smoke box device | |
| CN106612116B (en) | Novel design method of existing edge type high-resistance digital phase discriminator | |
| CN203136143U (en) | Self-adaptive connecting circuit of headset | |
| CN104748881A (en) | Pt1000 temperature transmitter with wide power supply range | |
| CN203617681U (en) | Pulse over-current detection and protection circuit | |
| CN204992525U (en) | Undervoltage protection circuit of delaying of switch electrical apparatus | |
| CN203595740U (en) | Device for measuring currents in direct current system | |
| CN203645299U (en) | Hardware overload or short circuit protective circuit and DC power supply circuit | |
| CN202997521U (en) | Motor drive controller having current-limiting protection function | |
| CN103208774B (en) | A kind of intrinsic safety electric source short-circuit protection circuit | |
| CN206272139U (en) | A kind of electronic type of distribution terminal it is anti-jump and point, combined floodgate monitoring arrangement | |
| CN201830235U (en) | Switching value stabilizing output circuit | |
| CN203933592U (en) | A kind of photoelectricity Isolation input Acquisition Circuit of low-power consumption | |
| CN204216878U (en) | A kind of mining Multichannel data acquisition device | |
| CN204836660U (en) | Multichannel differential pressure sampling circuit | |
| CN204731302U (en) | A kind of electric moter voltage testing circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee |
Owner name: GLORYMV ELECTRONICS CO., LTD. Free format text: FORMER NAME: WUHU GLORYMV ELECTRONICS CO., LTD. |
|
| CP01 | Change in the name or title of a patent holder |
Address after: 241009 Anhui city of Wuhu Province Economic and Technological Development Zone Jiuhua Road West Patentee after: GLORYMV ELECTRONICS CO., LTD. Address before: 241009 Anhui city of Wuhu Province Economic and Technological Development Zone Jiuhua Road West Patentee before: Wuhu GloryMV Electronics Co., Ltd. |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120912 Termination date: 20171216 |