CN202421764U - 1+N standby system for master turret clock - Google Patents
1+N standby system for master turret clock Download PDFInfo
- Publication number
- CN202421764U CN202421764U CN2012200118419U CN201220011841U CN202421764U CN 202421764 U CN202421764 U CN 202421764U CN 2012200118419 U CN2012200118419 U CN 2012200118419U CN 201220011841 U CN201220011841 U CN 201220011841U CN 202421764 U CN202421764 U CN 202421764U
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- clock
- master
- master clock
- turret
- standby system
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Abstract
The utility model relates to a 1+N standby system for a master turret clock, which belongs to the field of turret clocks. The standby system comprises a plurality of master clock modules in communication connection with a central control CPU and a clock back panel interface through buses; and each master clock module comprises a clock source card, a programmable logic device and a master clock CPU, wherein the master clock CPU is in communication connection with the central control CPU. According to the utility model, as the high-speed programmable logic devices and the multi-master-clock standby scheme are adopted and master clock with the best signal quality are automatically selected, the clock source stability and reliability of the system are remarkably improved and effective measuring mechanism, intelligent preferential choice and intelligent switching among the master clocks are realized.
Description
Technical field
The utility model relates to the intelligent master clock 1+N standby system in a kind of turret clock system, belongs to turret clock systems technology field.
Background technology
In the present turret clock time service product; The mode that all provides 1+1 backup backs up the turret clock master clock; And switch between the master clock that to exist mutual detecting reaction slower; Signal quality lacks effective measurement mechanism between two master clocks, switches slowly, can exist in the handoff procedure and occur wrong second phenomenon in " burr " phenomenon, the handoff procedure.Key is the general very severe of the applied environment of turret clock; Be very easy to receive the interference of various extraneous factors; 1+1 master clock backup in this time just seems and is not very safe that for stability, the reliability that improves system, this time, we proposed the master clock backup scenario of 1+N.
Summary of the invention
The utility model purpose is to provide a kind of state detecting that can realize each master clock fast, and the intelligent relatively signal quality of each master clock, selects the 1+N standby system of the best master clock of signal quality automatically for use.
The utility model is realized through following technical scheme:
The 1+N standby system of turret clock master clock; Its special character is to comprise a plurality of master clock modules 1; Master clock module 1 is connected with middle control CPU5,3 communications of clock backplane interface through bus; Source card 6 when master clock module 1 comprises, be used for to the time source card 6 control and programmable logic device of detecting 2 and the time source CPU4 that is connected with programmable logic device 2 communications, the time source CPU4 be connected with middle control CPU5 communication.
The 1+N standby system of the utility model turret clock master clock adopts the PLD at a high speed and the backup scenario of many master clocks, realizes the state detecting of each master clock module fast; And intelligence compares the signal quality of each master clock; Automatically select for use the best master clock of signal quality to system's time service, the stability and the reliability of the operation of farthest raising system are among the master clock of N road; One the tunnel can operate as normal as long as have, then total system still can be guaranteed normal operation.And realized between the master clock effective measurement mechanism, intelligence according to qualifications, intelligence switches, and avoided occurring in the handoff procedure problem of burr.
Description of drawings
Fig. 1: the structural representation of the 1+N standby system of the utility model turret clock master clock;
Fig. 2: the structural representation of master clock module 1.
Embodiment
Provide the embodiment of the utility model below with reference to accompanying drawing, be used for the utility model is done further explanation.
The 1+N standby system of turret clock master clock; Comprise a plurality of master clock modules 1; Master clock module 1 is connected with middle control CPU5,3 communications of clock backplane interface through bus; Source card 6 when master clock module 1 comprises, be used for to the time source card 6 control and programmable logic device of detecting 2 and the time source CPU4 that is connected with programmable logic device 2 communications, the time source CPU4 be connected with middle control CPU5 communication;
The time service method of the 1+N standby system of above-mentioned turret clock master clock may further comprise the steps:
1, each programmable logic device 2 usefulness self time measurement be connected with its communication the time source card 6 precision, and source CPU4 when reporting to separately gathers to middle control CPU5;
2, middle control CPU5 compares each master clock module 1, and state that reports according to each master clock and precision are selected optimum master clock and carried out time service;
3, middle control CPU5 will remain master clock module 1 and carry out priority queueing according to precision and running status;
4, detect the output of each master clock modules 1 through time source CPU4 and the programmable logic controller (PLC) 2 of time top grade master clock module 1, when master clock module 1 broke down, control CPU5 carried out time service during inferior top grade master clock module 1 switched to.
Burr in the handoff procedure, said in control CPU5 can the state of each master clock be carried out investigations, handoff procedure is controlled by programmable logic device 2, carries out change action after being chosen in the pulse per second (PPS) negative edge.
The useful technique effect that the utility model technical scheme can reach:
1, because native system adopts Source backups for a long time; Can under complicated rugged environment, move; When wherein one the tunnel or after break down in the source when writing down; System still can automatically switch to other and source system carried out time service when normal, and sufficient redundant performance and handoff functionality efficiently improve stability, the reliability of system greatly.
2, the native system switching in source for a long time all is to carry out state detecting, judgement, switching at self middle control CPU, and its process need not artificial participation, improves the intellectuality of system greatly.
Switch in the source when 3, carrying out fast, handoff procedure can not cause mistake, can not produce wrong second, can not produce burr, with the time source handoff procedure be controlled at the rank of nanosecond, can be because of switching situation such as system being caused delay, mistake, burr mistake second.
Claims (1)
1. the 1+N standby system of turret clock master clock; It is characterized in that comprising a plurality of master clock modules (1); Master clock module (1) is connected with middle control CPU (5), clock backplane interface (3) communication through bus; Master clock module (1) source card (6) when comprising, be used for to the time source card (6) control and programmable logic device of detecting (2) and the time source CPU (4) that is connected with programmable logic device (2) communication, the time source CPU (4) be connected with middle control CPU (5) communication.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012200118419U CN202421764U (en) | 2012-01-12 | 2012-01-12 | 1+N standby system for master turret clock |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012200118419U CN202421764U (en) | 2012-01-12 | 2012-01-12 | 1+N standby system for master turret clock |
Publications (1)
Publication Number | Publication Date |
---|---|
CN202421764U true CN202421764U (en) | 2012-09-05 |
Family
ID=46746509
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN2012200118419U Expired - Fee Related CN202421764U (en) | 2012-01-12 | 2012-01-12 | 1+N standby system for master turret clock |
Country Status (1)
Country | Link |
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CN (1) | CN202421764U (en) |
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2012
- 2012-01-12 CN CN2012200118419U patent/CN202421764U/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120905 Termination date: 20180112 |
|
CF01 | Termination of patent right due to non-payment of annual fee |