CN202404180U - Novel electric energy quality multi-index data processing module - Google Patents
Novel electric energy quality multi-index data processing module Download PDFInfo
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- CN202404180U CN202404180U CN2012200010940U CN201220001094U CN202404180U CN 202404180 U CN202404180 U CN 202404180U CN 2012200010940 U CN2012200010940 U CN 2012200010940U CN 201220001094 U CN201220001094 U CN 201220001094U CN 202404180 U CN202404180 U CN 202404180U
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Abstract
The utility model relates to a novel electric energy quality multi-index data processing module which is characterized by comprising an FPGA (Field Programmable Gate Array) chip; a sampling process is controlled, the obtained data is subjected to real-part calculation by virtue of a sine table, two real-part calculation multipliers and a real-part adder, and is subjected to imaginary-part calculation by virtue of a cosine table, two imaginary-part calculation multipliers and an imaginary-part adder, the output ends of the real-part calculation adder and the imaginary-part calculation adder form a complex number and the complex number is stored in a DFT (Discrete Fourier Transformation) result storage area in a DPRAM (Dual Ported Random Access Memory), the DFT result storage area of the DPRAM and a sample data storage area commonly output data to a DSP (Digital Signal Processor) to perform analysis and process of the electric energy quality. The design of the novel electric energy quality multi-index data processing module is reasonable, a parallel process way is used in the FPGA without very high clock frequency, thus very large data processing load is accomplished and the module has the characteristics of good real-time property, quick speed and the like. The novel electric energy quality multi-index data processing module is matched with the DSP for use, thus the integration degree of the system is improved and furthermore the high-speed electric energy quality data processing can be easily and conveniently realized.
Description
Technical field
The utility model belongs to the electric energy quality monitoring field, especially a kind of many achievement datas of new electric energy quality processing module.
Background technology
Along with the fast development of China's power grid construction, to the electrical network quality of power supply require increasingly high.Solve the electrical network power quality problem, just must implement effectively to monitor and the carrying out of monitoring information effectively managed, analyzes and assess the quality of power supply situation of electrical network.The assessment of the quality of power supply is the basis with the measurement data, its calculating and statistical study are drawn assessment result, and electric energy quality monitoring is the direct sources of assessment data, is the important prerequisite in the electricity quality evaluation.Because electric energy quality monitoring relates to many index, a plurality of calculating process; Wherein Harmonics Calculation and voltage flicker are analyzed the operand maximum; In order to guarantee gathering in real time, accurately and data analysis capabilities of parameters of electric power, will cause timing conflict because of the DSP overload if adopt single DSP to do data processing in the on-line real time monitoring, therefore; The bus-structured dsp chip of very high processing speed and broad be must use, complex equipments degree and equipment cost increased.
Summary of the invention
The purpose of the utility model is to overcome the deficiency of prior art, and a kind of reasonable in design, integrated level is high, processing speed is fast many achievement datas of new electric energy quality processing module is provided.
The utility model solves its technical matters and takes following technical scheme to realize:
A kind of many achievement datas of new electric energy quality processing module; Constitute by fpga chip; In this FPGA, be provided with the SRAM storer that is used for the store sample data, sine table, cosine table, two real part operational multipliers, two imaginary-part operation multipliers, real part totalizer, imaginary part totalizer and DPRAM storer; The output terminal of SRAM storer is connected respectively to an input end of two real part operational multipliers, two imaginary-part operation multipliers; The sampled data of SRAM storer is sent to the sampled data memory block of DPRAM storer simultaneously; Another input end of two real part operational multipliers is connected with sine table respectively; Another input end of two imaginary-part operation multipliers is connected with cosine table respectively; The output terminal of two real part operational multipliers is connected with the real part totalizer, and the output terminal of two imaginary-part operation multipliers is connected with the imaginary part totalizer, and the output terminal of real part computing totalizer and imaginary-part operation totalizer constitutes a plural number and is stored in the DFT memory block as a result among the DPRAM; This DPRAM comprises two DFT memory block and sampled data memory block as a result, and two memory blocks among the DPRAM output to jointly carries out the power quality analysis processing among the DSP.
And described SRAM storer adopts table tennis double buffering structure, each buffer stores 10 cycle sampled data.
The advantage and the good effect of the utility model are:
The utility model utilizes the characteristics flexible able to programme of FPGA, in the FPGA indoor design a plurality of functional modules, these modules are independent operating separately, the common each item function of being given of accomplishing satisfies high speed power quality data processing requirements fully.Because in the inner parallel processing mode that adopts of FPGA, so individual module does not need very high clock frequency just can accomplish very big data processing amount, the frequency surplus is also very big, real-time is good, and speed is fast.The utility model and DSP are used, and have alleviated the burden of DSP effectively, have improved the integrated degree of system, make the processing of high speed power quality data to realize simply and easily.
Description of drawings
Fig. 1 is the circuit diagram of the utility model.
Embodiment
Below in conjunction with accompanying drawing the utility model embodiment is done further detailed description:
A kind of many achievement datas of new electric energy quality processing module, as shown in Figure 1, constitute by fpga chip, in the present embodiment, fpga chip adopts the EP3C5E144 of altera corp chip.Comprise the SRAM storer that is used to store 10 cycle sampled datas, sine table, cosine table, two real part operational multipliers, two imaginary-part operation multipliers, real part totalizer, imaginary part totalizer and DPRAM storer in FGPA inside.In the present embodiment, the SRAM storer adopts table tennis double buffering structure, and current sampled data is temporarily stored in the A district, and this moment, FPGA can carry out computing to the 10 cycle sampled datas in B district; After the A district is filled with 10 cycles; The data in B district have been calculated and have been finished; Sampled data changes into deposits the B district; At this moment can carry out computing to the 10 cycle data in A district, and circulate with this, the output terminal of SRAM storer is connected respectively to an input end of two real part operational multipliers, two imaginary-part operation multipliers; The sampled data of SRAM storer is sent to the sampled data memory block of DPRAM storer simultaneously; Another input end of two real part operational multipliers is connected with sine table respectively, and another input end of two imaginary-part operation multipliers is connected with cosine table respectively, and the output terminal of two real part operational multipliers is connected with the real part totalizer; The output terminal of two imaginary-part operation multipliers is connected with the imaginary part totalizer; The output terminal of real part computing totalizer and imaginary-part operation totalizer constitutes a plural number and is stored in the DFT memory block as a result among the DPRAM, and this DPRAM comprises two DFT memory block and sampled data memory block as a result, and two memory blocks among the DPRAM output among the DSP jointly and are for further processing.
But the utility model makes full use of the high-performance, high flexibility of FPGA, friendly characteristics such as development environment online programming, makes and has satisfied the high-speed digital signal treatment requirement based on the design of FPGA.In order to improve processing speed, be provided with 2 streamlines in FPGA inside, one is calculated real part with DFT, and one is calculated imaginary part with DFT, and 2 streamlines are handled with same data source (sampled data of SRAM) simultaneously.Between FPGA and DSP, carry out exchanges data through dual port RAM (DPRAM), can effectively improve processing speed, simultaneously, DPRAM leaves DFT result in different memory block respectively with sampled data can prevent data collision effectively.
The utility model processing procedure is: FPGA controls sampling process; Read sampled data and be stored among the SRAM; Sampled data is delivered among the DSP through DPRAM on the one hand; Through DFT computation processes such as real part calculating and imaginary part calculating, DFT result's (harmonic value) is sent among the DSP through DPRAM on the other hand, DSP does quality of power supply index of correlation analyzing and processing according to DFT result and sampled data.
It is emphasized that; The described embodiment of the utility model is illustrative; Rather than it is determinate; Therefore the utility model is not limited to the embodiment described in the embodiment, every by those skilled in the art according to other embodiments that the technical scheme of the utility model draws, belong to the scope of the utility model protection equally.
Claims (2)
1. many achievement datas of new electric energy quality processing module; It is characterized in that: constitute by fpga chip; In this FPGA, be provided with the SRAM storer that is used for the store sample data, sine table, cosine table, two real part operational multipliers, two imaginary-part operation multipliers, real part totalizer, imaginary part totalizer and DPRAM storer; The output terminal of SRAM storer is connected respectively to an input end of two real part operational multipliers, two imaginary-part operation multipliers; The sampled data of SRAM storer is sent to the sampled data memory block of DPRAM storer simultaneously; Another input end of two real part operational multipliers is connected with sine table respectively; Another input end of two imaginary-part operation multipliers is connected with cosine table respectively; The output terminal of two real part operational multipliers is connected with the real part totalizer, and the output terminal of two imaginary-part operation multipliers is connected with the imaginary part totalizer, and the output terminal of real part computing totalizer and imaginary-part operation totalizer constitutes a plural number and is stored in the DFT memory block as a result among the DPRAM; This DPRAM comprises two DFT memory block and sampled data memory block as a result, and two memory blocks among the DPRAM output to jointly carries out the power quality analysis processing among the DSP.
2. many achievement datas of new electric energy quality processing module according to claim 1 is characterized in that: described SRAM storer adopts table tennis double buffering structure, each buffer stores 10 cycle sampled data.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102565584A (en) * | 2012-01-04 | 2012-07-11 | 天津市电力公司 | Power quality multi-index data processing module based on FPGA (Field Programmable Gate Array) |
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2012
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102565584A (en) * | 2012-01-04 | 2012-07-11 | 天津市电力公司 | Power quality multi-index data processing module based on FPGA (Field Programmable Gate Array) |
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