CN202385083U

CN202385083U - Signal demultiplexer

Info

Publication number: CN202385083U
Application number: CN2011205612788U
Authority: CN
Inventors: 胡东
Original assignee: Zhejiang E-Bang Communication Science And Technology Co Ltd
Current assignee: Zhejiang billion state communications technology Co., Ltd.
Priority date: 2011-12-29
Filing date: 2011-12-29
Publication date: 2012-08-15
Anticipated expiration: 2021-12-29

Abstract

The utility model discloses a signal demultiplexer. At present, the business volume of digital to analog conversion (DAC) is becoming larger and larger, and the conversion stability is required. If purposes of high integrity, good stability and low consumption are tried to realize, the existing one way digital to analog (DA) conversion circuit cannot meet the business requirements, and application range limits exist. The utility model provides a signal demultiplexer, which comprises a data collection circuit and a DAC chip connected with the data collection circuit, and is characterized in that the DAC chip outputs a plurality of channels of serial analog signals, and each of the plurality of the channels of the analog signals is connected with a retaining chip, a plurality of retaining chips are connected with a controller circuit, the controller circuit sends clock signals to the DAC chip, so that ordered output of one channel of analog signals is achieved, and the other analog signals are retained in the chip. According to the signal demultiplexer, DAC is increased to a plurality of channels, and ordered output of one channel of analog signals is achieved.

Description

A kind of signal tapping device

Technical field

The utility model relates to the conversion of signals field, especially a kind of signal tapping device.

Background technology

Usually, the DA transducer is widely known by the people.Traditional DA change-over circuit can only carry out the single channel data-signal and convert single channel analog signal or multichannel data conversion of signals to and become multichannel analog signals output; The cloth board space is not fully utilized; And the traffic carrying capacity of logarithmic mode conversion at present is increasing, and will aspire for stability.If attempt to realize integrated level height, good stability, purpose low in energy consumption, present single channel DA change-over circuit can not satisfy business demand, has the restriction of range of application.

The utility model content

The utility model technical problem to be solved is to overcome the defective that above-mentioned prior art exists, and a kind of signal tapping device is provided, when realizing multichannel DA conversion and have only the output of one tunnel analog signal.

For this reason; The utility model adopts following technical scheme: a kind of signal tapping device, comprise the analog-digital chip that a data acquisition circuit and links to each other with data acquisition circuit, and it is characterized in that; The multichannel analog signals of described analog-digital chip output serial; Every road analog signal and one keeps chip to link to each other, and described a plurality of maintenance chips link to each other with a controller circuitry, and this controller circuitry tranmitting data register signal is given analog-digital chip; Realize the orderly output of 1 tunnel analog signal, all the other analog signals are in keeping chip.

As long as the utility model is the D/A conversion of using an analog-digital chip can solve multichannel analog signals, can save pin and the PCB space of the IC that a plurality of D/A chips link to each other with the D/A chip.

The utility model has solved prior art and has existed and can only the single channel data-signal convert the problem that single channel analog signal or multichannel data conversion of signals become multichannel analog signals to; Can select simultaneously arbitrary road analog signal output of analog-digital chip, all the other analog signals are in keeping chip.

Above-mentioned signal tapping device, controller circuitry is made up of the timing output circuit, and described timing output circuit links to each other with keeping chip, is used to control the orderly output that keeps chip.

Above-mentioned signal tapping device, described timing output circuit by the multiple signals enable circuits and one or the multipath clock input circuit constitute.

Above-mentioned signal tapping device, described data acquisition circuit, analog-digital chip, controller circuitry and maintenance chip are integrated in 1 or 2 chips, save a large amount of encapsulated space and chip cost.

The course of work of the utility model is following: data acquisition circuit (being the SPI circuit) communicates with parallel mode with various ancillary equipment, inserts parallel data signal; The parallel duplex data-signal is through the multichannel analog signals of analog-digital chip output serial; Controller circuitry mainly is made up of the timing output circuit, can give in move instruction sometime (high level) to keep chip access point " A ", keeps chip to obtain instruction (high level) and triggers its output analog signal.

The beneficial effect of the utility model: the utility model makes digital-to-analogue conversion be increased to multichannel; And having realized the orderly output of one tunnel analog signal, a large amount of pin resources that can save the IC that links to each other with this circuit have been dwindled the Chip Packaging space of multichannel DA more greatly; Simple in structure, easy to use and maintenance; Can make circuit more succinct with controller circuitry, reliability is higher; Stable, low-power consumption, integrated level are high.

Below in conjunction with Figure of description and embodiment the utility model is described further.

Description of drawings

Fig. 1 is the principle schematic of the utility model.

Fig. 2 is the maintenance chip sketch map of the utility model.

Fig. 3 is the timing output map of the utility model controller circuitry.

Embodiment

Signal tapping device as shown in Figure 1; It is made up of data acquisition circuit, analog-digital chip and a plurality of maintenance chip; Analog-digital chip output serial multichannel analog signals (VN); The N road analog signal that forms keeps chip to link to each other with N, and N road analog signal realizes the orderly output of one tunnel analog signal through a controller circuitry.

The course of work of said analog-digital chip is following: utilize a segmented current source structure and special-purpose switching technique to realize the conversion of low-power consumption high-speed digital-analog, current source array is divided into equal 31, is controlled by Gao Wuwei.Remaining low three altogether control be the 7/8th of high five Control current.The high output resistance that current source high-order and low level control separately can be kept DAC.Realized high-precision digital-to-analogue conversion.

Described signal tapping device, controller circuitry is sent into clock signal to analog-digital chip, and sampling rate is high.

As shown in Figure 2, a plurality of maintenance chip work relationships have been described, enable signal N (CS _N) be low level, the output tracking analog input signal V of maintenance _N: V _NThrough amplifier A ₁, COMS switch (A ₂Be the high level switch closure) to capacitor C _HCharging; Enable signal N (CS _N) be high level, the COMS switch closure, capacitor charging end value is from A ₂End output obtains V _N

As shown in Figure 3, the work relationship of controller circuitry has been described, regularly output circuit enables 1 (CS ₁) to enabling N (CS _N) instruction with N the maintenance chip link to each other.Graph of a relation is described the course of work: regularly output enables 1 (CS with frequency phase difference 1/N ₁) to enabling N (CS _N), enable signal N (CS sometime _N) send into high level signal for maintenance chip N, high level signal triggers and keeps chip to see analog signal V off _N

Claims

1. a signal tapping device comprises the analog-digital chip that a data acquisition circuit and links to each other with data acquisition circuit, it is characterized in that; The multichannel analog signals of described analog-digital chip output serial; Every road analog signal and one keeps chip to link to each other, and described a plurality of maintenance chips link to each other with a controller circuitry, and this controller circuitry tranmitting data register signal is given analog-digital chip; Realize the orderly output of 1 tunnel analog signal, all the other analog signals are in keeping chip.

2. signal tapping device according to claim 1 is characterized in that described controller circuitry is made up of the timing output circuit, and described timing output circuit links to each other with keeping chip.

3. signal tapping device according to claim 2 is characterized in that, described timing output circuit by the multiple signals enable circuits and one or the multipath clock input circuit constitute.

4. according to claim 1,2 or 3 described signal tapping devices, it is characterized in that described data acquisition circuit, analog-digital chip, controller circuitry and maintenance chip are integrated in 1 or 2 chips.