CN202385071U - Novel power field effect tube driver - Google Patents

Novel power field effect tube driver Download PDF

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Publication number
CN202385071U
CN202385071U CN 201220004451 CN201220004451U CN202385071U CN 202385071 U CN202385071 U CN 202385071U CN 201220004451 CN201220004451 CN 201220004451 CN 201220004451 U CN201220004451 U CN 201220004451U CN 202385071 U CN202385071 U CN 202385071U
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CN
China
Prior art keywords
level
field effect
circuit
power field
effect tube
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN 201220004451
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Chinese (zh)
Inventor
夏振宏
陈连喜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HUANAN MEDICAL ELECTRICAL TECH Co Ltd HENAN
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HUANAN MEDICAL ELECTRICAL TECH Co Ltd HENAN
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Priority to CN 201220004451 priority Critical patent/CN202385071U/en
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Publication of CN202385071U publication Critical patent/CN202385071U/en
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Abstract

The utility model discloses a novel power field effect tube driver, wherein a power field effect tube driver comprises a PWM controller, an input driver, a level converting circuit, a current-type switch circuit and an output loading circuit; the PWM controller is used for outputting frequency and a square wave signal; the square wave signal may be TTL level or CMOS level; the input driver is used for converting input-stage TLL level into level needed by a back-stage circuit; the level converting circuit is used for converting a single-side control signal output by a drive into a double-side positive/negative drive signal; the current-type switch circuit is used for converting a positive/negative voltage drive signal obtained by the level into a current-type drive signal; and the current-type drive signal drives a back-stage loading circuit. According to the novel power field effect tube driver provided by the utility model, problems in the prior art are solved effectively based on a current-driven field effect tube driver; and switching speed of a field effect tube can be increased greatly.

Description

Novel power field effect pipe driver
Technical field
The application of the utility model is an electric and electronic technical field, relates generally to a kind of novel power field effect pipe driver.
Background technology
There is technical bottleneck in ultrahigh speed power field effect tube drive circuit always, has greatly limited the performance of power field effect pipe.Power field effect pipe has a wide range of applications in fields such as Digit Control Machine Tool, automotive electronics, Switching Power Supply, digital sound, wireless telecommunications.The switching speed that improves power field effect pipe can increase machining accuracy of NC machine tool; Improve the speed of electric automobile engine; Can promote the efficient of Switching Power Supply, can reduce the distortion of digital sound, can also improve the application efficiency of communication system power amplifier.Yet in the actual application, the switching speed of power field effect pipe driver generally all is no more than 2MHz, and peak drive current is no more than 4A, has brought many technical barriers thus.
The utility model content
In view of this, the purpose of the utility model is to provide a kind of novel power field effect pipe driver, efficiently solves the problems of the prior art, is based on current drives FET driver, can significantly improve the switching speed of FET.
The utility model adopts following technical scheme:
A kind of novel power field effect pipe driver, wherein, said power field effect pipe driver comprises PWM controller, enter drive, level shifting circuit, current mode switch circuit and output loading circuit; Said PWM controller is used for output frequency and square-wave signal, and said square-wave signal can be Transistor-Transistor Logic level or CMOS level; Said enter drive is used to realize the conversion of the TLL level of input stage to the required level of late-class circuit; Said level shifting circuit, the monolateral control signal that is used for driver output converts bilateral positive and negative drive signal into; Said current mode switch circuit is used for the drive signal that generating positive and negative voltage drive signal that level conversion obtains converts current mode into, level load circuit after the drive of current mode.
Further, said enter drive, level shifting circuit and current mode switch circuit are two.
Further, said output loading circuit comprises resistance, power field effect pipe and load resistance.
The beneficial effect of the utility model is:
The utility model is based on current drives FET driver, is different from the driving FET driver of voltage (logic level) of general commercial.The utility model driving force is strong, can effectively reduce the influence of fet gate electric capacity; Can significantly improve the switching speed of FET pipe, simple in structure, cost is low, is easy to realize; Switching speed is fast, can satisfy the demand in different application place.
Description of drawings
Fig. 1 is the theory diagram of the utility model;
Fig. 2 is the new circuit theory diagrams of this practicality.
Embodiment
Below in conjunction with accompanying drawing and instance the utility model is further described:
As shown in Figure 1, the utility model comprises PWM controller 1, two enter drives 2, two level shifting circuits 3, two current mode switch circuit 4 and output loading circuit 5.Enter drive 2 is used to realize the conversion of the TLL level of input stage to the required level of late-class circuit; Level shifting circuit 3 converts the monolateral control signal of driver output into bilateral positive and negative drive signal; The generating positive and negative voltage drive signal that current mode switch circuit 4 obtains level conversion converts the drive signal of current mode into; Level load circuit after the drive of current mode; Can effectively improve the conducting and the turn-off speed of FET, reduce gate charge the fet switch velocity effect.
As shown in Figure 2, PWM controller 1 is used for the square-wave signal of output frequency and EDM Generator of Adjustable Duty Ratio, and the square-wave signal of being exported by PWM controller 1 can be Transistor-Transistor Logic level or CMOS level.
R1, R2 are used to realize the signal input of low-resistance in the enter drive 2, are used to eliminate the signal reflex that the input stage high resistant brings.The low at a high speed enter drive 2 that postpones converts the Transistor-Transistor Logic level of input stage into 0 to 12 volt of flat logic level.The Transistor-Transistor Logic level of input stage is the signal from PWM controller 1 or high-frequency clock; The logic level at its place can not directly be used for driving high-power FET; The logical signal that comes out through enter drive is being 0 volt or 12 volts, can be used for driving high-power FET.
The output level of enter drive 2 is 0 volt or 12 volts, one group 0 volt, 12 volts logic levels of output and one group of-12 volts, 0 volt logic level behind level shifting circuit 3.Two groups of logic levels are respectively applied for and drive the back level by P-channel field-effect transistor (PEFT) pipe and N channel field-effect pipe.
In the current mode switch circuit 4, P-channel field-effect transistor (PEFT) pipe and N channel field-effect pipe produce two groups of electric current outputs under the driving of two groups of logic levels of prime.Electric current output produces two groups of current mode logic signals corresponding to the logical signal of prime level conversion.Wherein by the P-channel field-effect transistor (PEFT) pipe produce for current signal is used for the unlatching of back level load circuit, by N channel field-effect pipe produce for current signal be used for after the shutoff of grade load circuit.
Output loading circuit 5 is made up of resistance, power field effect pipe, load resistance.When FET turn-offed fast, resistance was used for eliminating the oscillator signal that is caused by FET, effectively turn-offed and conducting with the guaranteed output FET.
Explanation is at last; Above embodiment is only unrestricted in order to the technical scheme of explanation the utility model; Other modifications that those of ordinary skills make the technical scheme of the utility model perhaps are equal to replacement; Only otherwise break away from the spirit and the scope of the utility model technical scheme, all should be encompassed in the middle of the claim scope of the utility model.

Claims (3)

1. novel power field effect pipe driver, it is characterized in that: said power field effect pipe driver comprises PWM controller, enter drive, level shifting circuit, current mode switch circuit and output loading circuit; Said PWM controller is used for output frequency and square-wave signal, and said square-wave signal can be Transistor-Transistor Logic level or CMOS level; Said enter drive is used to realize the conversion of the TLL level of input stage to the required level of late-class circuit; Said level shifting circuit, the monolateral control signal that is used for driver output converts bilateral positive and negative drive signal into; Said current mode switch circuit is used for the drive signal that generating positive and negative voltage drive signal that level conversion obtains converts current mode into, level load circuit after the drive of current mode.
2. a kind of novel power field effect pipe driver according to claim 1, it is characterized in that: said enter drive, level shifting circuit and current mode switch circuit are two.
3. a kind of novel power field effect pipe driver according to claim 1 and 2, it is characterized in that: said output loading circuit comprises resistance, power field effect pipe and load resistance.
CN 201220004451 2012-01-06 2012-01-06 Novel power field effect tube driver Expired - Lifetime CN202385071U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201220004451 CN202385071U (en) 2012-01-06 2012-01-06 Novel power field effect tube driver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201220004451 CN202385071U (en) 2012-01-06 2012-01-06 Novel power field effect tube driver

Publications (1)

Publication Number Publication Date
CN202385071U true CN202385071U (en) 2012-08-15

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201220004451 Expired - Lifetime CN202385071U (en) 2012-01-06 2012-01-06 Novel power field effect tube driver

Country Status (1)

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CN (1) CN202385071U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102522971A (en) * 2012-01-06 2012-06-27 河南华南医电科技有限公司 Novel power field effect transistor drive

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102522971A (en) * 2012-01-06 2012-06-27 河南华南医电科技有限公司 Novel power field effect transistor drive

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Granted publication date: 20120815

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