CN202373308U - Recording circuit for improving recording quality - Google Patents
Recording circuit for improving recording quality Download PDFInfo
- Publication number
- CN202373308U CN202373308U CN2011205107581U CN201120510758U CN202373308U CN 202373308 U CN202373308 U CN 202373308U CN 2011205107581 U CN2011205107581 U CN 2011205107581U CN 201120510758 U CN201120510758 U CN 201120510758U CN 202373308 U CN202373308 U CN 202373308U
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- recording
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Abstract
The utility model discloses a recording circuit for improving recording quality. The recording circuit comprises a central processing unit (CPU), a power supply circuit, an earphone output circuit and a recording and detecting circuit, wherein the power supply output end of the power supply circuit is connected with the power supply input end of the CPU unit; the earphone output circuit is connected with the audio signal output end of the CPU unit; the recording and detecting circuit is provided with a detection circuit and a recording signal source input interface for connecting a recording signal or recording equipment; the input end of the detection circuit is connected with the recording signal source input interface; and the output end of the detection circuit is connected with the CPU unit. According to the recording circuit, recording tone quality is not influenced by environmental noise and the distance of peripheral players during recording, so that the recording quality is improved.
Description
Technical field:
The utility model relates to multimedia player technical fields such as MP3 with sound-recording function, MP4, refers in particular to a kind of recording circuit that improves recording quality.
Background technology:
The MP4 player is a kind of music, video player.
At present; The MP4 player adopts CPU (Central Processing Unit mostly; Central processing unit) built-in coding decoder (CODEC); Direct output audio signal is given audio output device after the decoding of the coding decoder that voice data process CPU is built-in, perhaps is directly inputted into flash memory (NAND) chip behind the coding of sound signal through the built-in coding decoder of CPU by recording unit collection.And the MP4 player has only the built-in microphone recording device, and it is that CPU samples, encodes, stores recording file, and can pass through this recording file of decoding process repeat play again when recording.During therefore this employing built-in microphone recording, recording tonequality receives the influence of distance of influence and the peripheral hardware player of environmental noise.
The sensitivity of built-in microphone is constant, cannot the highly sensitive microphone of conversion.Again the tonequality that plays back is poor.And cannot monitor for Recording Process.Therefore, the recording circuit of multimedia players such as the MP3 of prior art, MP4 has improved needs.
The utility model content:
The purpose of the utility model is that the deficiency to prior art provides a kind of recording circuit that improves recording quality, and recording tonequality does not receive the influence of distance of influence and the peripheral hardware player of environmental noise during recording, improves recording quality.
For realizing above-mentioned purpose, the utility model is realized through following technical scheme:
Improve the recording circuit of recording quality; Comprise CPU element, power circuit and earphone output circuit; The power output end of power circuit connects the power input of CPU element; Earphone output circuit connects the audio signal output end of CPU element, and recording circuit also comprises recording and testing circuit, and recording and testing circuit are provided with testing circuit and the recorded audio signals source input interface that is used to insert recorded audio signals or sound pick-up outfit; The input end of testing circuit connects recorded audio signals source input interface, and the output terminal of testing circuit connects CPU element.
Said recorded audio signals source input interface comprises line input recorded audio signals source interface and is used to peg graft the external microphone signal source interface of outer microphone.
Said recording circuit comprises earphone output circuit, and CPU element is provided with an audio signal output end, and earphone output circuit connects the audio signal output end of CPU element.
Said recording circuit comprises LCD and key circuit, and CPU element is provided with a signal input end, and LCD and key circuit connect the signal input end of CPU element.
Said recording circuit comprises USB interface, and USB interface connects CPU element.
Said recording circuit comprises internal memory and flash memory, and CPU element is provided with a data output end, and internal memory and flash memory are connected the data output end of CPU element respectively.
Said testing circuit comprises L channel branch road, right sound branch road and ground wire branch road; A L channel branch road capacitor C 3, a right sound branch road capacitor C 4, the ground wire branch road circuit R5 that connects that connects that connects; CPU element is provided with left channel signals pin, right voice signal pin and the 3rd pin; L channel branch road one end connects the left channel signals pin unit of CPU element, the L channel pin that the other end connects recorded audio signals source input interface; R channel branch road one end connects the right-channel signals pin unit of CPU element, the R channel pin that the other end connects recorded audio signals source input interface, and ground wire branch road one end connects the 3rd pin of CPU element, the 3rd pin that the other end connects recorded audio signals source input interface.
Said testing circuit comprises feed circuit; Feed circuit comprise first branch road that is in series by resistance R 1, R3 and adjustable resistance VR1; Second branch road that is in series by resistance R 2, R4 and adjustable resistance VR2, the 3rd branch road that constitutes by resistance R 6, the 4th branch road that constitutes by adjustable resistance VR2; First branch road, one end connects positive source, other end ground connection; Second branch road, one end connects positive source, other end ground connection, and the 3rd branch road one end connects the 3rd pin of positive source, other end connection recorded audio signals source input interface, and the 4th branch road one end connects the 3rd pin, the other end ground connection of recorded audio signals source input interface.
Said testing circuit also comprises the 6th branch road that the 5th branch road that is made up of capacitor C 2 and is made up of capacitor C 1; The 5th branch road one end is connected between resistance R 1 and the R3, other end ground connection, and the 6th branch road one end is connected between resistance R 2 and the R4, other end ground connection.
The beneficial effect that the utility model has owing to the employing technique scheme: the utility model increases by a recording and a testing circuit; Can the output of peripheral hardware player be directly inputted in the MP4 player; It does not receive the influence of environmental noise, improves recording quality, can also insert a wired microphone; The distance of itself and peripheral hardware player can be reduced, and the microphone of different sensitivity can be changed at any time.We can monitor in Recording Process.
Description of drawings:
Below in conjunction with accompanying drawing the utility model is done further explanation:
Fig. 1 is the circuit diagram of the utility model.
---CPU element, 2---the external microphone signal source interface of recording and testing circuit, 3---line input recorded audio signals source interface, 4---among the figure: 1.
Embodiment:
The embodiment of the recording circuit of the raising recording quality of the utility model is as shown in Figure 1; Improve the recording circuit of recording quality; Comprise CPU element 1, power circuit and earphone output circuit, the power output end of power circuit connects the power input of CPU element 1, and earphone output circuit connects the audio signal output end of CPU element 1; Recording circuit also comprises recording and testing circuit 2; Recording and testing circuit 2 are provided with testing circuit and the recorded audio signals source input interface that is used to insert recorded audio signals or sound pick-up outfit, and the input end of testing circuit connects recorded audio signals source input interface, and the output terminal of testing circuit connects CPU element 1.
Said recorded audio signals source input interface comprises line input recorded audio signals source interface 3 and is used to peg graft the external microphone signal source interface 4 of outer microphone.External microphone signal source interface 4 can be selected socket and headset for use.
The utlity model has and be available for users to select the recording mode that uses, as follows.
Line input recording: the line input recorded audio signals source interface 3 that is input to this MP4 player when a peripheral hardware player plays output through tone frequency channel wire; CPU element 1 is adopted, encodes, is stored for this input simulating signal, and decodes and plays output can be carried out monitoring recording.
External microphone location: when outer microphone inserts the external microphone signal source interface 4 of this player, by the external microphone power supply of this player.CPU element 1 is adopted, encodes, is stored for the simulating signal of microphone input, and decodes and plays output can be carried out monitoring recording.
Said recording circuit comprises earphone output circuit, and CPU element 1 is provided with an audio signal output end, and earphone output circuit connects the audio signal output end of CPU element 1.
Said recording circuit comprises LCD and key circuit, and CPU element 1 is provided with a signal input end, and LCD and key circuit connect the signal input end of CPU element 1.
Said recording circuit comprises USB interface, and USB interface connects CPU element 1.
Said recording circuit comprises internal memory and flash memory, and CPU element 1 is provided with a data output end, and internal memory and flash memory are connected the data output end of CPU element 1 respectively.
Said testing circuit comprises L channel branch road, right sound branch road and ground wire branch road; A L channel branch road capacitor C 3, a right sound branch road capacitor C 4, the ground wire branch road circuit R5 that connects that connects that connects; CPU element 1 is provided with left channel signals pin, right voice signal pin and the 3rd pin; L channel branch road one end connects the left channel signals pin unit of CPU element 1, the L channel pin that the other end connects recorded audio signals source input interface; R channel branch road one end connects the right-channel signals pin unit of CPU element 1, the R channel pin that the other end connects recorded audio signals source input interface, and ground wire branch road one end connects the 3rd pin of CPU element 1, the 3rd pin that the other end connects recorded audio signals source input interface.
Said testing circuit comprises feed circuit; Feed circuit comprise first branch road that is in series by resistance R 1, R3 and adjustable resistance VR1; Second branch road that is in series by resistance R 2, R4 and adjustable resistance VR2, the 3rd branch road that constitutes by resistance R 6, the 4th branch road that constitutes by adjustable resistance VR2; First branch road, one end connects positive source, other end ground connection; Second branch road, one end connects positive source, other end ground connection, and the 3rd branch road one end connects the 3rd pin of positive source, other end connection recorded audio signals source input interface, and the 4th branch road one end connects the 3rd pin, the other end ground connection of recorded audio signals source input interface.
Said testing circuit also comprises the 6th branch road that the 5th branch road that is made up of capacitor C 2 and is made up of capacitor C 1; The 5th branch road one end is connected between resistance R 1 and the R3, other end ground connection, and the 6th branch road one end is connected between resistance R 2 and the R4, other end ground connection.
Line input recording: when audio signal wire (Line in cable) is inserted into the line input recorded audio signals source interface 3 of recording circuit and testing circuit of the MP4 player (in running order) of using this novel practical technology; The detection pin of testing circuit transfers low level to by high level, and CPU element can be through the R5 resistance detection to this low level.By the button of this player, make this player be in line input recording state, when outer player output is input to player through audio signal wire again; Record button by this player just begins recording again; CPU element 1 just carries out A/D sampling, coding for the simulating signal of input, also can be through software adjustment sampling rate, and CPU element 1 is saved in buffer memory and flash memory with data; CPU element 1 can be exported the file of recording simultaneously, monitors recording exactly.LCD can show record length and recording file name.
The recording of outer microphone: when outer microphone is inserted into the external microphone signal source interface 4 of recording circuit and testing circuit of the MP4 player (in running order) of using this novel practical technology; The detection pin of testing circuit transfers low level to by high level, and CPU element can be through the R5 resistance detection to this low level.By the button of this player, make this player be in recording state again.The voltage of this player is through resistance R 1, R2, R3, R4 and capacitor C 1 and the C2 outer microphone of supplying power; Make microphone in running order; When microphone signal was input to player, the record button by this player just began recording again, and CPU element 1 just carries out A/D sampling, coding for the simulating signal of input; Also can be through software adjustment sampling rate; CPU element 1 is saved in buffer memory and flash memory with data, and CPU element 1 can be exported the file of recording simultaneously, monitors recording exactly.LCD can show record length and recording file name.
Above content is merely the preferred embodiment of the utility model; For those of ordinary skill in the art; According to the thought of the utility model, the part that on embodiment and range of application, all can change, this description should not be construed as the restriction to the utility model.
Claims (9)
1. improve the recording circuit of recording quality; Comprise CPU element, power circuit and earphone output circuit; The power output end of power circuit connects the power input of CPU element; Earphone output circuit connects the audio signal output end of CPU element, it is characterized in that: also comprise recording and testing circuit, recording and testing circuit are provided with testing circuit and the recorded audio signals source input interface that is used to insert recorded audio signals or sound pick-up outfit; The input end of testing circuit connects recorded audio signals source input interface, and the output terminal of testing circuit connects CPU element.
2. the recording circuit of raising recording quality according to claim 1 is characterized in that: said recorded audio signals source input interface comprises line input recorded audio signals source interface and is used to peg graft the external microphone signal source interface of outer microphone.
3. the recording circuit of raising recording quality according to claim 1 is characterized in that: said recording circuit comprises earphone output circuit, and CPU element is provided with an audio signal output end, and earphone output circuit connects the audio signal output end of CPU element.
4. the recording circuit of raising recording quality according to claim 1 is characterized in that: said recording circuit comprises LCD and key circuit, and CPU element is provided with a signal input end, and LCD and key circuit connect the signal input end of CPU element.
5. the recording circuit of raising recording quality according to claim 1 is characterized in that: said recording circuit comprises USB interface, and USB interface connects CPU element.
6. the recording circuit of raising recording quality according to claim 1 is characterized in that: said recording circuit comprises internal memory and flash memory, and CPU element is provided with a data output end, and internal memory and flash memory are connected the data output end of CPU element respectively.
7. the recording circuit of raising recording quality according to claim 1; It is characterized in that: said testing circuit comprises L channel branch road, right sound branch road and ground wire branch road; A L channel branch road capacitor C 3, a right sound branch road capacitor C 4, the ground wire branch road circuit R5 that connects that connects that connects; CPU element is provided with left channel signals pin, right voice signal pin and the 3rd pin; L channel branch road one end connects the left channel signals pin unit of CPU element, the L channel pin that the other end connects recorded audio signals source input interface; R channel branch road one end connects the right-channel signals pin unit of CPU element, the R channel pin that the other end connects recorded audio signals source input interface, and ground wire branch road one end connects the 3rd pin of CPU element, the 3rd pin that the other end connects recorded audio signals source input interface.
8. according to the recording circuit of the described raising recording quality of one of claim 1 to 6; It is characterized in that: said testing circuit comprises feed circuit; Feed circuit comprise first branch road that is in series by resistance R 1, R3 and adjustable resistance VR1; Second branch road that is in series by resistance R 2, R4 and adjustable resistance VR2, the 3rd branch road that constitutes by resistance R 6, the 4th branch road that constitutes by adjustable resistance VR2; First branch road, one end connects positive source, other end ground connection; Second branch road, one end connects positive source, other end ground connection, and the 3rd branch road one end connects the 3rd pin of positive source, other end connection recorded audio signals source input interface, and the 4th branch road one end connects the 3rd pin, the other end ground connection of recorded audio signals source input interface.
9. the recording circuit of raising recording quality according to claim 7; It is characterized in that: said testing circuit also comprises the 6th branch road that the 5th branch road that is made up of capacitor C 2 and is made up of capacitor C 1; The 5th branch road one end is connected between resistance R 1 and the R3, other end ground connection, and the 6th branch road one end is connected between resistance R 2 and the R4, other end ground connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011205107581U CN202373308U (en) | 2011-12-09 | 2011-12-09 | Recording circuit for improving recording quality |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011205107581U CN202373308U (en) | 2011-12-09 | 2011-12-09 | Recording circuit for improving recording quality |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202373308U true CN202373308U (en) | 2012-08-08 |
Family
ID=46597002
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011205107581U Expired - Fee Related CN202373308U (en) | 2011-12-09 | 2011-12-09 | Recording circuit for improving recording quality |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202373308U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104733031A (en) * | 2015-03-10 | 2015-06-24 | 董志豪 | Memory with real-time audio recording, storing and playing function |
| CN107205191A (en) * | 2017-07-24 | 2017-09-26 | 成都杰华科技有限公司 | A kind of interior recording device extended by ear microphone jack and method |
-
2011
- 2011-12-09 CN CN2011205107581U patent/CN202373308U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104733031A (en) * | 2015-03-10 | 2015-06-24 | 董志豪 | Memory with real-time audio recording, storing and playing function |
| CN107205191A (en) * | 2017-07-24 | 2017-09-26 | 成都杰华科技有限公司 | A kind of interior recording device extended by ear microphone jack and method |
| CN107205191B (en) * | 2017-07-24 | 2019-04-30 | 成都杰华科技有限公司 | A kind of interior recording device extended by ear microphone jack and method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120808 Termination date: 20121209 |