CN202363732U - Burst mode laser optical power monitoring circuit - Google Patents

Burst mode laser optical power monitoring circuit Download PDF

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Publication number
CN202363732U
CN202363732U CN2011204863064U CN201120486306U CN202363732U CN 202363732 U CN202363732 U CN 202363732U CN 2011204863064 U CN2011204863064 U CN 2011204863064U CN 201120486306 U CN201120486306 U CN 201120486306U CN 202363732 U CN202363732 U CN 202363732U
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China
Prior art keywords
sampling
voltage
time
module
output
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Expired - Fee Related
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CN2011204863064U
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Chinese (zh)
Inventor
林永辉
章可循
葛军华
林少衡
李发明
高全川
陈伟
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Xiamen UX High Speed IC Co Ltd
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Xiamen UX High Speed IC Co Ltd
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Abstract

The present utility model discloses a burst mode laser optical power monitoring circuit. The circuit is characterized in that the circuit comprises a real-time sampling module which is provided with a sampling end, an enabled end for controlling sampling and a following end for outputting voltage of the sampling end in real time; and an off-line maintaining module which is provided with an input end and a control end connected with the following end; the control end is communicated with the enabled end, and the off-line maintaining module is also provided with an output end for outputting the sampling voltage when the enabled end is valid, and outputting another preset voltage when the invalid time of the enabled end exceeds a preset time. When the bursting prohibition time of the laser is too long, voltage obtained by a rear grade module (such as an analog-digital conversion module) is still the sampling voltage of a backlight diode during normal working period, the voltage will not drop or even approach to zero, thus a rather stable monitoring value can be obtained by equipment which is used for monitoring the voltage, and detection and state judgment can be facilitated.

Description

A kind of burst mode laser optical power monitoring circuit
Technical field
The utility model relates to a kind of supervisory circuit of optical communication field laser, specifically is the maintenance supervisory circuit that is used for burst mode laser optical power.
Background technology
The laser of burst mode need be monitored its light output state in real time, so that other control circuits are made corresponding decision-making; And this type monitoring all is the diode backlight that has adopted in the individual laser package usually, and the light that converter is kept watch on is output as photoelectric current, and the voltage that converts direct ratio into by photoelectric current is again sampled, as monitoring parameter.Work in the laser of burst mode, be not constantly all to enable conducting, and the state that long-time burst is forbidden can take place, this burst illegal state, laser itself end, so can not make diode monitoring backlight obtain photoelectric current.During so except laser works the whether normal state; The voltage attenuation that also can sample so, can make the magnitude of voltage of monitoring display unstable to zero situation; Bring extra trouble to monitoring; Because need distinguish the unusual of diode optical current attenuation backlight and, make judgement and detection seem loaded down with trivial details and inconvenient because the unsettled situation of the sampled voltage that brings itself is forbidden in burst.Even if the sampled voltage holding circuit is arranged, also can forbid overlong time, and the sampling capacitance discharge off makes likewise sampled voltage level off to zero because of its burst.
The utility model content
Forbid that in burst overlong time causes monitoring voltage to descend and hangs down the problem that influence is judged according to the above general monitoring sample circuit, the utility model proposes a kind of burst mode light power holding circuit, and its technical scheme is following:
A kind of burst mode laser optical power monitoring circuit, it comprises:
One real-time sampling module, have a sampling end, one control its sampling Enable Pin and export one of said sampling end voltage in real time and follow end; And
One off-line keeps module, has to be connected in a said input and a control end of following end; Said control end is communicated with said Enable Pin, and this off-line keeps module also to have the output of then exporting another predeterminated voltage when said Enable Pin is exported said sampled voltage when effective, Enable Pin is invalid surpasses a Preset Time.
As the preferred person of present technique scheme, can aspect as follows, have improvement:
In one preferred embodiment, said real-time sampling module comprises a sampling hold circuit one voltage follower circuit of cascade, and said sampling end is positioned at said sampling hold circuit; The said end of following is positioned at said voltage follower circuit.
In the preferred embodiment on the last technical scheme basis; Said off-line keeps module to comprise a time-delay handover module, and this time-delay handover module comprises that said control end, a clock counting end, the said preset voltage of a control be communicated with said output often opens control end and control said following and hold a normally closed control end that is communicated with said output.
In the preferred embodiment on the last technical scheme basis, said time-delay handover module comprises: a NOR gate, said enable signal and system's reset signal are connected in two inputs of this NOR gate, and this NOR gate output connects the said reset terminal of a counter; The clock end of said counter is as said counting end, and its output is as said normally closed control end, and said normally closed control end is output as the said control end of often opening through an inverter.
Have in the preferred embodiment of sampling hold circuit, said sampling hold circuit comprises a sampling switch, one first filter resistance and one first filter capacitor; Said sampling end is connected with said first filter resistance through said sampling switch again; The said first filter resistance other end connects said first filter capacitor to ground, connects said voltage follower circuit simultaneously.
In one preferred embodiment, said off-line keeps module also to comprise one second filter resistance and one second filter capacitor; Said input connects said output through said second filter resistance; Said second filter capacitor connects said output and ground.
The beneficial effect that the present technique scheme is brought is:
1. when overlong time is forbidden in the burst of laser; Sampled voltage when the voltage that obtains of level module such as analog-digital conversion module remains diode operate as normal backlight thereafter; Can not descend and even level off to zero, make the equipment of this voltage of monitoring can obtain a more stable monitored value, reduced the domain of walker of voltage; Eliminated the low excessively situation of monitoring voltage, convenient detection and state judgement.
2. adopt the time-delay handover module of counter, its circuit is simply effective, promptly accomplishes the automatic time delay switching controls through a counter and simple gate circuit, has stronger practicality.
Description of drawings
Embodiment is described further the utility model below in conjunction with accompanying drawing:
Fig. 1 is the utility model embodiment one sketch map;
Fig. 2 is the utility model embodiment two part sketch mapes;
Fig. 3 is the sketch map of time-delay handover module embodiment illustrated in fig. 2.
Embodiment
Embodiment one:
Like Fig. 1, the utility model embodiment one sketch map;
Laser LD is anodal to be connected in Vdd with diode PD negative pole backlight; And LD and PD are positioned at same encapsulation; Light output part from laser LD divides entering diode PD backlight; Make diode PD backlight in its current circuit, produce certain photoelectric current, just can obtain the sampled voltage that is directly proportional with photoelectric current to such an extent as to flow through R2.
One real-time sampling module 20 has the sampling end 21 that inserts above-mentioned sampled voltage, has inserted the enable signal EN of laser LD simultaneously through an Enable Pin 23; Enable signal is that laser LD burst makes workable mark; Generally speaking, enable signal EN is that high level is effective usually, when EN is effective; The end 22 of following of real-time sampling module 20 is exported the sampled voltage that its sampling ends 21 obtain, and this follows end 22 and sampling end 21 electric currents are isolated and not influence mutually.When EN is a low level, when promptly invalid, follow the sampled voltage of R2 when holding 22 can't export the LD operate as normal.
Follow end 22 rears and be connected in the input 11 that an off-line keeps module 10.Off-line keeps module 10 to have a control end 12 that is connected in enable signal EN, and the output 13 of level analog-digital conversion equipment 30 outputs backward; This output 13 is exported sampled voltage in real time when enable signal EN is effective, also be the voltage that real-time sampling module 20 obtains from its sampling end 21.This state promptly is the monitor state of ordinary circumstance---laser LD burst enables work; Diode PD backlight produces real-time photoelectric current; Sampling end 21 obtains being proportional to the sampled voltage of photoelectric current; Keep module 10 through real-time sampling module 20, off-line, finally export analog-digital conversion module 30 to.
EN is invalid at enable signal, and promptly during low level, meaning laser LD has been in the burst illegal state; Naturally diode PD backlight does not have corresponding photoelectric current; The voltage of the sampling end 21 of real-time sampling module 20 is 0, follows the sampled voltage when keeping operate as normal in 22 short time of end, along with time lapse; Because the non-ideal characteristic of sampling hold circuit; Follow the voltage of end on 22 can be discharged into gradually until being 0, analog-digital conversion module 30 will obtain gradually zero voltage, the magnitude of voltage that obtains on final other downstream components such as display device from behind will go to zero by this state.But because off-line keeps module 10 when enable signal EN is invalid, to get into a delay link, make enable signal EN keep through behind the preset time time, off-line keeps preset voltage Vref of output 13 outputs of module 10; The sampled voltage that this preset voltage Vref and diode backlight obtain when indicating the laser operate as normal is suitable---and preset time is set according to the sampling maintenance situation of entire circuit; As long as when output 13 output preset voltage Vref, the sampled voltage on the script output 13 does not descend and too much gets final product, in this example; The control off-line keeps the delay link in the module 10; When making EN invalid, the sample voltage value of output 13 slightly descends and promptly arrives preset time, and off-line keeps module 10 just to cut off and follows being connected of end 22; And insert a stable Vref immediately, make output 13 output Vref.So; When overlong time was forbidden in the burst of laser LD, the voltage that obtains of level module such as analog-digital conversion module 30 remained Vref thereafter, can not descend and even level off to zero; Make the equipment of this voltage of monitoring can obtain a more stable monitored value; Reduce the domain of walker of voltage, eliminated the low excessively situation of monitoring voltage, thus also just convenient detection and state judgement.
Embodiment two:
Like Fig. 2, the utility model embodiment two part sketch mapes; Fig. 3 is the sketch map of time-delay handover module embodiment illustrated in fig. 2; Explain in conjunction with this two figure:
Sampling switch K1, both series connection of the first filter resistance R0, and the left end of sampling switch K1 is connected the positive pole of diode PD backlight as sampling end 21; The first filter resistance R0 and the first filter capacitor C0 have constituted filter network; And through a voltage follower Buffer export to follow the end 22; Therefore, sampling switch K1, the first filter resistance R0 and the first filter capacitor C 0 have constituted the main contents of real-time sampling module 20; Sampling switch K1 is controlled by enable signal EN, and high level is effective.
Off-line keeps having the second filter resistance R1 and the second filter capacitor C1 in the module 10, and the filter network output of the two composition connects the analogue-to-digital converters 30 of back level as output 13; Have switch arrays before the second filter resistance R1, comprised a normally closed switch K2 and normal open switch K3, K2 is controlled by normally closed control end CRL, and K3 is controlled by and often opens control end CRLV.And the signal of CRL and CRLV comes from time-delay handover module 40.
Time-delay handover module 10 comprises a counter 41, a NOR gate and an inverter; Control end 12 is positioned at an input of NOR gate, connects the enable signal EN of laser LD; Counter 41 has a clock counting end 42, and the clock signal input that this clock counting end 42 is a counter is connected in the clock CLK of system; The terminal count output 44 of counter 41 is as normally closed control end CRL, simultaneously terminal count output 44 through an inverter after as often opening control end CRLV, visible, the CRL end is with CRLV end signal level synchronization and fully on the contrary.In addition, NOR gate is the form of two inputs, the reset signal POR of another input connecting system; NOR gate has connected the reset terminal of counter 41, and low level is effective.
It is thus clear that, after systematic reset signal POR zero clearing, begin counting during for low level at EN, after counting down to preset time, normally closed control end CRL is a high level; Then counter 41 resets when EN is high level, and CRL is a low level.Just, to such an extent as to after low level that long enough reaches preset time appearred in EN, time-delay handover module 10 was just brought into play function; Normally closed control end CRL control K2 is broken off; Closed with opening control end CRLV often, make dividing potential drop insert the second filter resistance R1, finally from output 13 outputs from R3.At any time, as long as enable signal EN is a high level, it is closed to activate normally closed control end CRL, thereby output 13 can be monitored the information of voltage of sampling end 21 in real time.The circuit of present embodiment is simply effective, promptly accomplishes the automatic time delay switching controls through a counter and simple gate circuit, has stronger practicality.
The above; Be merely the utility model preferred embodiment; So can not limit the scope that the utility model is implemented according to this, the equivalence of promptly doing according to the utility model claim and description changes and modifies, and all should still belong in the scope that the utility model contains.

Claims (6)

1. burst mode laser optical power monitoring circuit, it is characterized in that: it comprises:
One real-time sampling module, have a sampling end, one control its sampling Enable Pin and export one of said sampling end voltage in real time and follow end; And
One off-line keeps module, has to be connected in a said input and a control end of following end; Said control end is communicated with said Enable Pin, and this off-line keeps module also to have the output of then exporting another predeterminated voltage when said Enable Pin is exported said sampled voltage when effective, Enable Pin is invalid surpasses a Preset Time.
2. according to the said a kind of burst mode laser optical power monitoring circuit of claim 1, it is characterized in that: said real-time sampling module comprises a sampling hold circuit one voltage follower circuit of cascade, and said sampling end is positioned at said sampling hold circuit; The said end of following is positioned at said voltage follower circuit.
3. according to the said a kind of burst mode laser optical power monitoring circuit of claim 2; It is characterized in that: said off-line keeps module to comprise a time-delay handover module, and this time-delay handover module comprises that said control end, a clock counting end, the said preset voltage of a control be communicated with said output often opens control end and control said following and hold a normally closed control end that is communicated with said output.
4. according to the said a kind of burst mode laser optical power monitoring circuit of claim 3; It is characterized in that: said time-delay handover module comprises: a NOR gate; Said enable signal and system's reset signal are connected in two inputs of this NOR gate, and this NOR gate output connects the said reset terminal of a counter; The clock end of said counter is as said counting end, and its output is as said normally closed control end, and said normally closed control end is output as the said control end of often opening through an inverter.
5. according to the said a kind of burst mode laser optical power monitoring circuit of claim 2, it is characterized in that: said sampling hold circuit comprises a sampling switch, one first filter resistance and one first filter capacitor; Said sampling end is connected with said first filter resistance through said sampling switch again; The said first filter resistance other end connects said first filter capacitor to ground, connects said voltage follower circuit simultaneously.
6. according to the said a kind of burst mode laser optical power monitoring circuit of claim 1, it is characterized in that: said off-line keeps module also to comprise one second filter resistance and one second filter capacitor; Said input connects said output through said second filter resistance; Said second filter capacitor connects said output and ground.
CN2011204863064U 2011-11-29 2011-11-29 Burst mode laser optical power monitoring circuit Expired - Fee Related CN202363732U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011204863064U CN202363732U (en) 2011-11-29 2011-11-29 Burst mode laser optical power monitoring circuit

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Application Number Priority Date Filing Date Title
CN2011204863064U CN202363732U (en) 2011-11-29 2011-11-29 Burst mode laser optical power monitoring circuit

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111896102A (en) * 2020-09-29 2020-11-06 北京瑞通科悦科技有限公司 Early warning circuit and method for pulse energy limitation of semiconductor laser

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111896102A (en) * 2020-09-29 2020-11-06 北京瑞通科悦科技有限公司 Early warning circuit and method for pulse energy limitation of semiconductor laser
CN111896102B (en) * 2020-09-29 2020-12-11 北京瑞通科悦科技有限公司 Early warning circuit and method for pulse energy limitation of semiconductor laser

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120801

Termination date: 20151129