CN202334572U

CN202334572U - High-speed isolator for controller area network (CAN) bus

Info

Publication number: CN202334572U
Application number: CN2011204421726U
Authority: CN
Inventors: 刘桂强; 黄友群; 陈苏
Original assignee: NANJING ZITAI XINGHE ELECTRONIC CO Ltd
Current assignee: NANJING ZITAI XINGHE ELECTRONIC CO Ltd
Priority date: 2011-11-10
Filing date: 2011-11-10
Publication date: 2012-07-11
Anticipated expiration: 2021-11-10

Abstract

The utility model discloses a high-speed isolator for a controller area network (CAN) bus. The high-speed isolator comprises a first CAN bus module (U1) and a second CAN bus module (U2), and is characterized in that a unidirectional isolation circuit (U7) is connected between the first CAN bus module (U1) and the second CAN bus module (U2) and mainly comprises two transistors (Q1 and Q2), two NOR gate series circuits (U3 and U4) and two photoelectric isolators (U6 and U5). Two independent 5V power supplies are used for supplying power; and electric signals on the CAN buses on the two sides are isolated by a high-speed photocoupler. Compared with the common CAN bus isolator, the high-speed isolator has the advantages of being simple in structure, small in quantity of used devices, high in data transmission speed, reliable and the like.

Description

CAN bus high-speed isolated device

Technical field

The utility model relates to a kind of data isolation technology, the data isolation technology on especially a kind of CAN bus, specifically a kind of CAN bus high-speed isolated device.

Background technology

The CAN bus has the traffic rate height, opening is good, reliability is high and low cost and other advantages, has obtained extensive use at industrial control field at present.But the Industry Control site environment is abominable, and electromagnetic interference is serious, does not interfere with each other in order to guarantee the equipment on the CAN bus; Do not influence the state of CAN bus; Guarantee the accuracy of transfer of data, all equipment that hang on the CAN bus must carry out electrical isolation, and the fault of arbitrary equipment can not influence the communication state of whole C AN bus on the bus like this; And know according to the applicant; The circuit of present employed CAN buses isolator is very complicated, and device is many, causes transmission speed and reliability to be difficult to guarantee.

Summary of the invention

The purpose of the utility model be to existing C AN bus isolation circuit exist complex structure; Device is many; The slow problem with poor reliability of speed, design a kind of simple in structure, use that device is few, data transmission bauds fast and reliably and utilize high speed photo coupling to make the CAN bus high-speed isolated device of isolating device.

The technical scheme of the utility model is:

A kind of CAN bus high-speed isolated device; It comprises a CAN bus module U1 and the 2nd CAN bus module U2; It is characterized in that being connected with unidirectional buffer circuit U7 between a described CAN bus module U1 and the 2nd CAN bus module U2; Described unidirectional buffer circuit U7 is mainly by two transistor Q1, Q2, two NOR gate sequential circuit U3, U4 and two photoisolator U6; U5 forms; The base stage of transistor Q1 links to each other with the TXD end of a CAN bus module U1, and the input of first NOR gate U3A among the emitter AND sequential circuit U3 of transistor Q1 links to each other, the input relatively exporting second NOR gate U3B among the termination NOR gate sequential circuit U3 of first NOR gate U3A; The RXD end of another input termination the one CAN bus module U1 of second NOR gate U3B; The input of the 3rd the NOR gate U3C that relatively exports termination NOR gate sequential circuit U3 of second NOR gate U3B, the input of relatively exporting termination photoisolator U6 of the 3rd NOR gate U3C, the TXD end of output termination the 2nd CAN bus module U2 of photoisolator U6; The base stage of transistor Q2 links to each other with the TXD end of the 2nd CAN bus module U2; The input of first NOR gate U4A among the emitter AND sequential circuit U4 of transistor Q2 links to each other; The input relatively exporting second NOR gate U4B among the termination NOR gate sequential circuit U4 of first NOR gate U4A; The RXD end of another input termination the 2nd CAN bus module U2 of second NOR gate U4B; The input of the 3rd the NOR gate U4C that relatively exports termination NOR gate sequential circuit U4 of second NOR gate U4B; The input of relatively exporting termination photoisolator U5 of the 3rd NOR gate U4C, the TXD end of output termination the one CAN bus module U1 of photoisolator U5.

At described transistor Q1, be serially connected with capacitor C 1, C2 between the collector and emitter of Q2 respectively.

The beneficial effect of the utility model:

The utility model adopts 2 tunnel independently 5V power supply power supplies, and with the electric signal isolation on the CAN bus of high speed photo coupling realization both sides.Compare with general CAN buses isolator, have simple in structure, use that device is few, data transmission bauds is fast and advantage such as reliable.

Description of drawings

Fig. 1 is the electric theory diagram of the utility model.

Fig. 2 is the electrical schematic diagram of the utility model.

Embodiment

Below in conjunction with accompanying drawing and embodiment the utility model is further described.

Shown in Fig. 1-2.

A kind of CAN bus high-speed isolated device; Adopt 2 tunnel independently 5V power supply power supplies; And with the electric signal isolation on the CAN bus of high speed photo coupling realization both sides; It mainly is made up of a CAN bus module U1, the 2nd CAN bus module U2 and unidirectional buffer circuit U7, and unidirectional buffer circuit U7 is connected between a described CAN bus module U1 and the 2nd CAN bus module U2, and is as shown in Figure 1.Described unidirectional buffer circuit U7 is mainly by two transistor Q1; Q2, two NOR gate sequential circuit U3; U4 and two photoisolator U6; U5 forms; The base stage of transistor Q1 as shown in Figure 2 links to each other with the TXD end of a CAN bus module U1, and the input of first NOR gate U3A among the emitter AND sequential circuit U3 of transistor Q1 links to each other, the input relatively exporting second NOR gate U3B among the termination NOR gate sequential circuit U3 of first NOR gate U3A; The RXD end of another input termination the one CAN bus module U1 of second NOR gate U3B; The input of the 3rd the NOR gate U3C that relatively exports termination NOR gate sequential circuit U3 of second NOR gate U3B, the input of relatively exporting termination photoisolator U6 of the 3rd NOR gate U3C, the TXD end of output termination the 2nd CAN bus module U2 of photoisolator U6; The base stage of transistor Q2 links to each other with the TXD end of the 2nd CAN bus module U2; The input of first NOR gate U4A among the emitter AND sequential circuit U4 of transistor Q2 links to each other; The input relatively exporting second NOR gate U4B among the termination NOR gate sequential circuit U4 of first NOR gate U4A; The RXD end of another input termination the 2nd CAN bus module U2 of second NOR gate U4B; The input of the 3rd the NOR gate U4C that relatively exports termination NOR gate sequential circuit U4 of second NOR gate U4B; The input of relatively exporting termination photoisolator U5 of the 3rd NOR gate U4C, the TXD end of output termination the one CAN bus module U1 of photoisolator U5.At described transistor Q1; Be serially connected with capacitor C 1, C2 between the collector and emitter of Q2 respectively; Capacitor C 1, C2 are used for of short duration time-delay when the TXD of U1, U2 end switches to high level by low level, guarantee to block RXD and bring out existing low level signal and can not return the TXD end of source end U1, U2 and make and interference signal occurs on the CAN bus.

The operation principle of the utility model is:

When the dominance position appears in the CAN of side bus, for example U1 side, the then RXD of this side bus module U1 (PCA82C250) end output low level; And the TXD of U1 end still keeps high level simultaneously; Make PNP triode Q1 end, the 1st NOR gate U3A (as not gate) input is a high level, and its output is low level; This low level is exported high level with the low level of the RXD end of U1 through the logical operation of the 2nd NOR gate U3B; Change low level into through the 3rd NOR gate U3C (as not gate) again, this low level signal is that U6 photoelectricity is isolated through optocoupler 6N137, at the VO of U6 end output low level signal; This signal is passed to the TXD end of opposite side CAN bus module U2 (PCA82C250), makes the CAN bus of U2 side produce the dominance position.Because at this moment the functional characteristic of CAN bus module U2 (PCA82C250) also can produce a low level at the RXD of U2 end.At this moment; The low level of the TXD end of U2 is changed to saturation condition with corresponding PNP triode Q2; Make its collector electrode get into low level state in the of short duration time-delay back of resistance-capacitance circuit, the NOR gate U4A that is attached thereto like this (as not gate) just exports high level, the NOR gate U4B after having blocked; Make that the level of finally holding at the VF-of another high speed photo coupling U5 (6N137) is a high level; The VO of U5 end output high level makes the TXD end of U1 keep high level state like this, can be to the CAN bus output dominance position that it connected.Resistance-capacitance circuit wherein is used for of short duration time-delay when the TXD of PCA82C250 end switches to high level by low level, guarantees to block RXD and brings out existing low level signal and can not make to the TXD end that returns source end PCA82C250 and interference signal occurs on the CAN bus.

The utility model does not relate to all identical with the prior art prior art that maybe can adopt of part to be realized.

Claims

1. CAN bus high-speed isolated device; It comprises a CAN bus module U1 and the 2nd CAN bus module U2; It is characterized in that being connected with unidirectional buffer circuit U7 between a described CAN bus module U1 and the 2nd CAN bus module U2; Described unidirectional buffer circuit U7 mainly is made up of the first transistor Q1, transistor seconds Q2, the 3rd NOR gate sequential circuit U3 and four nor gate sequential circuit U4, the 6th photoisolator U6 and the 5th photoisolator U5; The base stage of transistor Q1 links to each other with the TXD end of a CAN bus module U1; The input of first NOR gate U3A among the emitter of the first transistor Q1 and the 3rd NOR gate sequential circuit U3 links to each other; The input relatively exporting second NOR gate U3B among termination the 3rd NOR gate sequential circuit U3 of first NOR gate U3A; The RXD end of another input termination the one CAN bus module U1 of second NOR gate U3B; The input of the 3rd the NOR gate U3C that relatively exports termination the 3rd NOR gate sequential circuit U3 of second NOR gate U3B, the input of relatively exporting termination the 6th photoisolator U6 of the 3rd NOR gate U3C, the TXD end of output termination the 2nd CAN bus module U2 of the 6th photoisolator U6; The base stage of transistor seconds Q2 links to each other with the TXD end of the 2nd CAN bus module U2; The input of first NOR gate U4A among the emitter of transistor seconds Q2 and the four nor gate sequential circuit U4 links to each other; The input relatively exporting second NOR gate U4B among the termination four nor gate sequential circuit U4 of first NOR gate U4A; The RXD end of another input termination the 2nd CAN bus module U2 of second NOR gate U4B; The input of the 3rd the NOR gate U4C that relatively exports termination four nor gate sequential circuit U4 of second NOR gate U4B; The input of relatively exporting termination the 5th photoisolator U5 of the 3rd NOR gate U4C, the TXD end of output termination the one CAN bus module U1 of the 5th photoisolator U5.

2. CAN bus high-speed isolated device according to claim 1 is characterized in that between the collector and emitter of described the first transistor Q1 and transistor seconds Q2, being serially connected with respectively first capacitor C 1 and second capacitor C 2.