CN202331251U - Low-voltage-difference linear voltage-stabilizing circuit - Google Patents

Low-voltage-difference linear voltage-stabilizing circuit Download PDF

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CN202331251U
CN202331251U CN2011205009042U CN201120500904U CN202331251U CN 202331251 U CN202331251 U CN 202331251U CN 2011205009042 U CN2011205009042 U CN 2011205009042U CN 201120500904 U CN201120500904 U CN 201120500904U CN 202331251 U CN202331251 U CN 202331251U
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resistance
control module
operational amplifier
low
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范方平
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IPGoal Microelectronics Sichuan Co Ltd
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IPGoal Microelectronics Sichuan Co Ltd
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Abstract

The utility model provides a low-voltage-difference linear voltage-stabilizing circuit, which comprises a power end, an inner ring control module, an outer ring control module, a reference voltage end, a feedback module, an output end and a grounding end, wherein the inner ring control module and the feedback module form a high-bandwidth and low-gain quick path; the outer ring control module and the feedback module form a high-gain and low-bandwidth slow path; the outer ring control module comprises a first operational amplifier, a first field effect tube which is connected with the first operational amplifier, a capacitor which is connected with the first operational amplifier and the first field effect tube, and a first resistor which is connected with the first field effect tube; the inner ring control module comprises a second operational amplifier and a second field effect tube which is connected with the second operational amplifier; and the feedback module comprises a second resistor, a third resistor which is connected with the second resistor, and a fourth resistor which is connected with the third resistor. The low-voltage-difference linear voltage-stabilizing circuit is high in output accuracy and can realize quick response.

Description

Low-dropout linear voltage-regulating circuit
Technical field
The utility model relates to a kind of mu balanced circuit, refers to a kind of low-dropout linear voltage-regulating circuit that has high precision output and can realize responding fast especially.
Background technology
LDO (low dropout regulator) is a kind of low pressure difference linear voltage regulator, and it has low noise and is easy to advantages such as integrated, is widely used in the electronic system.
See also Fig. 1, Fig. 1 is the circuit structure of existing LDO, and wherein CMP is a single stage operational amplifier, and MP is a FET, and resistance R 11 constitutes feedback circuit with resistance R 22, and VREF ' is a reference voltage.Because whole loop will guarantee high-precision output valve; Must have high-gain, and high-gain and high bandwidth can't satisfy simultaneously usually, therefore the circuit structure of existing LDO often has the characteristics of low bandwidth; Promptly be difficult to realize response fast; Therefore when supply voltage VDD ' or load changed fast, output terminal VOUT ' will cause very big overshoot or descend, and need the long time just can return to normal output valve; This will reduce system performance greatly, even system is not worked.
Summary of the invention
In view of above content, be necessary to provide a kind of and have high precision output and can realize the low-dropout linear voltage-regulating circuit of response fast.
A kind of low-dropout linear voltage-regulating circuit; Said low-dropout linear voltage-regulating circuit comprise interior ring control module that a power end, links to each other with said power end, one with said power end and said in the reference voltage terminal that links to each other with said outer shroud control module of the outer shroud control module, that links to each other of ring control module, one with said in the feedback module that links to each other of ring control module and said outer shroud control module, one with the said interior earth terminal that output terminal and that control module and said feedback module link to each other links to each other with said feedback module that encircles; Ring control module and said feedback module form the fast path of a high bandwidth, low gain in said; Said outer shroud control module and said feedback module form the slow path of a high-gain, low bandwidth; Said outer shroud control module comprises first resistance that electric capacity and one that first FET, that one first operational amplifier, links to each other with said first operational amplifier links to each other with said first operational amplifier and said first FET links to each other with said first FET; The ring control module comprises second FET that one second operational amplifier and links to each other with said second operational amplifier in said, and said feedback module comprises the 4th resistance that the 3rd resistance and one that second resistance, one that links to each other with said second FET links to each other with said second resistance links to each other with said the 3rd resistance.
Preferably, an inverting input of said first operational amplifier links to each other with said reference voltage terminal, and a normal phase input end of said first operational amplifier links to each other with an end of an end of said the 3rd resistance and said the 4th resistance.
Preferably; One output terminal of said first operational amplifier links to each other with the grid of an end of said electric capacity and said first FET, and the drain electrode of said first FET links to each other with an end of said first resistance and an inverting input of said second operational amplifier.
Preferably, a normal phase input end of said second operational amplifier links to each other with the other end of an end of said second resistance and said the 3rd resistance, and an output terminal of said second operational amplifier links to each other with the grid of said second FET.
Preferably, the drain electrode of said second FET is connected said output terminal jointly with the other end of said second resistance.
Preferably, common said power end, the said earth terminal of the common connection of the other end of the other end of said first resistance and said the 4th resistance of connecting of the source class of the other end of said electric capacity, said first FET and the source class of said second FET.
Relative prior art; The utility model low-dropout linear voltage-regulating circuit guarantees the precision of output terminal output voltage through slow path; Realization has the low-dropout linear voltage-regulating circuit of high precision output; And make low-dropout linear voltage-regulating circuit to make rapid reaction to the quick variation of power end or load through fast path, rapidly the magnitude of voltage of output terminal output being adjusted to right value, thereby realize response fast.
Description of drawings
Fig. 1 is the circuit diagram of prior art mesolow difference linear voltage-stabilizing circuit.
Fig. 2 is the system architecture diagram of the utility model low-dropout linear voltage-regulating circuit preferred embodiments.
Fig. 3 is the circuit diagram of the utility model low-dropout linear voltage-regulating circuit preferred embodiments.
Embodiment
See also Fig. 2, the utility model low-dropout linear voltage-regulating circuit preferred embodiments comprise reference voltage terminal VREF that interior ring control module that a power end VDD, links to each other with this power end VDD, links to each other with this outer shroud control module with this power end VDD and ring control module links to each other in this outer shroud control module,, one with this in encircle feedback module that control module and this outer shroud control module link to each other, one with this in encircle the earth terminal GND that output terminal VOUT and that control module and this feedback module link to each other links to each other with this outer shroud control module and this feedback module.
Should interiorly encircle control module and the common fast path that forms a high bandwidth, low gain of this feedback module; Make this low-dropout linear voltage-regulating circuit to make rapid reaction to the quick variation of this power end VDD or load; Magnitude of voltage rapidly this output terminal VOUT is exported is adjusted to right value, thereby realizes response fast; The common slow path that forms a high-gain, low bandwidth of this outer shroud control module and this feedback module; Make that this low-dropout linear voltage-regulating circuit can be when this power end VDD or load change; This output terminal VOUT exports accurate magnitude of voltage, thereby realizes having the low-dropout linear voltage-regulating circuit of high precision output.
See also Fig. 3, Fig. 3 is the circuit diagram of the utility model low-dropout linear voltage-regulating circuit preferred embodiments.Wherein, this outer shroud control module comprises one first operational amplifier CMP1, one first FET MP1, a capacitor C 1 and one first resistance R 1; Should interior ring control module comprise one second operational amplifier CMP2 and one second FET MP2; This feedback module comprises one second resistance R 2, one the 3rd resistance R 3 and one the 4th resistance R 4.
The annexation of the utility model low-dropout linear voltage-regulating circuit preferred embodiments is following: the inverting input of this first operational amplifier CMP1 links to each other with this reference voltage terminal VREF; The normal phase input end of this first operational amplifier CMP1 links to each other with an end of an end of the 3rd resistance R 3 and the 4th resistance R 4, and the output terminal of this first operational amplifier CMP1 links to each other with the grid of an end of this capacitor C 1 and this first FET MP1.The drain electrode of this first FET MP1 links to each other with the inverting input of an end of this first resistance R 1 and this second operational amplifier CMP2; The normal phase input end of this second operational amplifier CMP2 links to each other with an end of this second resistance R 2 and the other end of the 3rd resistance R 3, and the output terminal of this second operational amplifier CMP2 links to each other with the grid of this second FET MP2.The drain electrode of this second FET MP2 is connected this output terminal VOUT jointly with the other end of this second resistance R 2.The source class of the source class of the other end of this capacitor C 1, this first FET MP1 and this second FET MP2 connects this power end VDD jointly, and the other end of the other end of this first resistance R 1 and the 4th resistance R 4 connects this earth terminal GND jointly.
The principle of work of the utility model low-dropout linear voltage-regulating circuit is following:
The loop gain of the fast path of at first supposing to be formed by ring control module and this feedback module in this is: H
Figure 2011205009042100002DEST_PATH_IMAGE002
(s)=A2/ ((s+w1) * (s+w2));
Wherein A2 is the low-frequency gain of fast path loop, and s is a frequency variable, and w1 is the inferior dominant pole of fast path loop, and w2 is the dominant pole of fast path loop, and w1>w2.
The loop gain of the slow path of supposing to be formed by this outer shroud control module and this feedback module is: H (s)=A1/ ((s+w3) * (s+w4));
Wherein A1 is the low-frequency gain of slow path loop, and w3 is the inferior dominant pole of slow path loop, and w4 is the dominant pole of slow path loop, and w3>w4.
Again because w2>> w4, the open-loop gain that therefore can obtain whole loop is: Ho (s)=((R2+R3+R4)/R4) * H
Figure 351203DEST_PATH_IMAGE004
(s) * H
Figure 49032DEST_PATH_IMAGE002
(s)/(1+H
Figure 253748DEST_PATH_IMAGE002
(s)) ((R2+R3+R4)/R4) * H
Figure 888867DEST_PATH_IMAGE004
(s) for ≈;
It is thus clear that the open-loop gain of whole loop is about the loop gain of slow path, because slow path has high-gain, low bandwidth, thereby can guarantee the precision of output terminal VOUT output voltage, realize having the low-dropout linear voltage-regulating circuit of high precision output.
When the output voltage of output terminal VOUT receives the influence of power end VDD or load and changes fast; Its variation meeting directly and fast feeds back on the voltage V1 and voltage V3 shown in Figure 3 through second resistance R 2, the 3rd resistance R 3 and the 4th resistance R 4 in the feedback module; Because the bandwidth of slow path is lower; Therefore voltage V2 can keep approximate constant; Again because the bandwidth of fast path is higher, so voltage V1 can be passed to the grid of the second FET MP2 fast through the second operational amplifier CMP2, responds the transient changing of output terminal VOUT through regulating the second FET MP2.Because the bandwidth of fast path is higher, thereby makes low-dropout linear voltage-regulating circuit to make rapid reaction to the quick variation of power end VDD or load, is adjusted to right value with the magnitude of voltage of rapidly output terminal VOUT being exported, thereby realizes response fast.
The utility model low-dropout linear voltage-regulating circuit guarantees the precision of output terminal VOUT output voltage through slow path; Realization has the low-dropout linear voltage-regulating circuit of high precision output; And make low-dropout linear voltage-regulating circuit to make rapid reaction to the quick variation of power end VDD or load through fast path; Magnitude of voltage rapidly output terminal VOUT is exported is adjusted to right value, thereby realizes response fast.

Claims (6)

1. low-dropout linear voltage-regulating circuit; It is characterized in that: said low-dropout linear voltage-regulating circuit comprise interior ring control module that a power end, links to each other with said power end, one with said power end and said in the reference voltage terminal that links to each other with said outer shroud control module of the outer shroud control module, that links to each other of ring control module, one with said in the feedback module that links to each other of ring control module and said outer shroud control module, one with the said interior earth terminal that output terminal and that control module and said feedback module link to each other links to each other with said feedback module that encircles; Ring control module and said feedback module form the fast path of a high bandwidth, low gain in said; Said outer shroud control module and said feedback module form the slow path of a high-gain, low bandwidth; Said outer shroud control module comprises first resistance that electric capacity and one that first FET, that one first operational amplifier, links to each other with said first operational amplifier links to each other with said first operational amplifier and said first FET links to each other with said first FET; The ring control module comprises second FET that one second operational amplifier and links to each other with said second operational amplifier in said, and said feedback module comprises the 4th resistance that the 3rd resistance and one that second resistance, one that links to each other with said second FET links to each other with said second resistance links to each other with said the 3rd resistance.
2. low-dropout linear voltage-regulating circuit as claimed in claim 1; It is characterized in that: an inverting input of said first operational amplifier links to each other with said reference voltage terminal, and a normal phase input end of said first operational amplifier links to each other with an end of an end of said the 3rd resistance and said the 4th resistance.
3. low-dropout linear voltage-regulating circuit as claimed in claim 2; It is characterized in that: an output terminal of said first operational amplifier links to each other with the grid of an end of said electric capacity and said first FET, and the drain electrode of said first FET links to each other with an end of said first resistance and an inverting input of said second operational amplifier.
4. low-dropout linear voltage-regulating circuit as claimed in claim 3; It is characterized in that: a normal phase input end of said second operational amplifier links to each other with the other end of an end of said second resistance and said the 3rd resistance, and an output terminal of said second operational amplifier links to each other with the grid of said second FET.
5. low-dropout linear voltage-regulating circuit as claimed in claim 4 is characterized in that: the drain electrode of said second FET is connected said output terminal jointly with the other end of said second resistance.
6. low-dropout linear voltage-regulating circuit as claimed in claim 5; It is characterized in that: common said power end, the said earth terminal of the common connection of the other end of the other end of said first resistance and said the 4th resistance of connecting of the source class of the other end of said electric capacity, said first FET and the source class of said second FET.
CN2011205009042U 2011-12-06 2011-12-06 Low-voltage-difference linear voltage-stabilizing circuit Expired - Fee Related CN202331251U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102393781A (en) * 2011-12-06 2012-03-28 四川和芯微电子股份有限公司 Low-dropout linear voltage regulator circuit and system
CN107370461A (en) * 2017-07-17 2017-11-21 电子科技大学 A kind of collocation structure applied to trans-impedance amplifier
CN110320950A (en) * 2019-08-12 2019-10-11 中国兵器工业集团第二一四研究所苏州研发中心 Without capacitive LDO in a kind of high-precision fast transient response full sheet

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102393781A (en) * 2011-12-06 2012-03-28 四川和芯微电子股份有限公司 Low-dropout linear voltage regulator circuit and system
CN107370461A (en) * 2017-07-17 2017-11-21 电子科技大学 A kind of collocation structure applied to trans-impedance amplifier
CN107370461B (en) * 2017-07-17 2020-07-10 电子科技大学 Compensation structure applied to transimpedance amplifier
CN110320950A (en) * 2019-08-12 2019-10-11 中国兵器工业集团第二一四研究所苏州研发中心 Without capacitive LDO in a kind of high-precision fast transient response full sheet

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Address after: 610041 Sichuan city of Chengdu province high tech Zone Kyrgyzstan Road 33 block A No. 9

Patentee after: IPGoal Microelectronics (Sichuan) Co., Ltd.

Address before: 402 room 7, building 610041, incubator Park, hi tech Zone, Sichuan, Chengdu

Patentee before: IPGoal Microelectronics (Sichuan) Co., Ltd.

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120711

Termination date: 20141206

EXPY Termination of patent right or utility model