CN202304642U - Ignition circuit with interlocking input and output - Google Patents

Ignition circuit with interlocking input and output Download PDF

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Publication number
CN202304642U
CN202304642U CN2011204060200U CN201120406020U CN202304642U CN 202304642 U CN202304642 U CN 202304642U CN 2011204060200 U CN2011204060200 U CN 2011204060200U CN 201120406020 U CN201120406020 U CN 201120406020U CN 202304642 U CN202304642 U CN 202304642U
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China
Prior art keywords
output
ignition
input
cpu
circuit
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Expired - Fee Related
Application number
CN2011204060200U
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Chinese (zh)
Inventor
宋蔚阳
方岳
吴学森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China Academy of Launch Vehicle Technology CALT
Beijing Aerospace Changzheng Aircraft Institute
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China Academy of Launch Vehicle Technology CALT
Beijing Aerospace Changzheng Aircraft Institute
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Priority to CN2011204060200U priority Critical patent/CN202304642U/en
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Publication of CN202304642U publication Critical patent/CN202304642U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model belongs to a control circuit, and particularly relates to an ignition circuit with interlocking input and output. The ignition circuit comprises solid-state relays N1, N2, N3, N4, N5 and N6. The ignition circuit has the advantages that the ignition of an explosive device means that an output-end ignition bus is connected with an ignition output end through logic control, and then the explosive device can be ignited through voltage of the ignition bus. The output-end ignition bus is introduced into an input control end so as to realize interlocking of input and output; a loop of the input end is disconnected when the ignition bus has voltage so that the explosive device can not be ignited; and the explosive device can not be ignited by mistake even though any disturbing mode exists at the input end when the output-end ignition bus has no voltage.

Description

A kind of firing circuit of input and output interlocking
Technical field
The utility model belongs to a kind of control circuit, is specifically related to a kind of firing circuit of input and output interlocking.
Background technology
Firing circuit generally is applied to the ignition of priming system, needs very high security.Firing circuit is commonly relay contact multilevel redundancy connection in series-parallel control at present, and the input control end of this type of circuit may cause the priming system mistake quick-fried under certain jamming pattern before the emission.
To this problem, the security that the control system requirements improves the priming system firing circuit, guaranteeing input, in office what connection disturbs under the pattern, can not cause the mistake of priming system quick-fried before the emission, and emission back priming system is reliably ignited under normal logic.
Summary of the invention
The purpose of the utility model provides a kind of firing circuit of input and output interlocking, and it is can guarantee point ignition circuit input in office, and what connection disturbs under the pattern, can not cause the mistake of priming system quick-fried before the emission, and emission back priming system is reliably ignited under normal logic.
The utility model is achieved in that a kind of firing circuit of input and output interlocking, and it comprises solid-state relay N1, N2, N3, N4, N5 and N6; It is characterized in that: the IN+ of described N1 and N2 is connected with a 3.3k Ω resistance respectively, and each 3.3k Ω resistance all is connected with the OUT+ of N3 and N5, and the IN-of N1 and N2 is connected with QF; The OUT+ of N1 and N2 is connected with the 5v power supply, and the OUT-of N1 and N2 is connected respectively with the IN+ of N3, N4, N5 and N6, and the IN-of N3 is connected with DH1_CPU; The OUT-of N3 is connected with the OUT+ of N4, and the IN-of N4 is connected with DH2_CPU, and the OUT-of N4 is connected with DH1+; The IN-of N5 is connected with DH1_CPU, and the OUT-of N5 is connected with the OUT+ of N6, and the OUT-of N5 is connected with the OUT+ of N6; The OUT-of N6 is connected with DH2+, and DH1+ is connected with DH2+.
Wherein, N1, N2 are the solid-state relay JGW3023B of long closed contact output; N3~N6 is the solid-state relay JGX36M of normally opened contact output.
The utility model has the advantages that priming system is ignited and to be meant through logic control the output bus of lighting a fire is connected with the igniting output, ignites priming system through the voltage of igniting bus.To export the igniting bus and be incorporated into the input control end, and realize interlocking between the input and output: when promptly guaranteeing on the igniting bus voltage to be arranged, the input loop is broken off, and can not ignite priming system; During output igniting bus no-voltage,, can not cause the priming system mistake quick-fried even there is any jamming pattern in input yet.
Description of drawings
Fig. 1 is the firing circuit sketch map of a kind of input and output interlocking that the utility model provided.
The specific embodiment
Below in conjunction with accompanying drawing and embodiment the utility model is described in detail:
As shown in Figure 1, a kind of firing circuit of input and output interlocking comprises solid-state relay N1, N2, N3, N4, N5 and N6, wherein, and the solid-state relay JGW3023B that N1, N2 export for long closed contact; N3~N6 is the solid-state relay JGX36M of normally opened contact output; The IN+ of N1 and N2 is connected with a 3.3k Ω resistance respectively, and each 3.3k Ω resistance all is connected with the OUT+ of N3 and N5, and the IN-of N1 and N2 is connected with QF; The OUT+ of N1 and N2 is connected with the 5v power supply, and the OUT-of N1 and N2 is connected respectively with the IN+ of N3, N4, N5 and N6, and the IN-of N3 is connected with DH1_CPU; The OUT-of N3 is connected with the OUT+ of N4, and the IN-of N4 is connected with DH2_CPU, and the OUT-of N4 is connected with DH1+; The IN-of N5 is connected with DH1_CPU, and the OUT-of N5 is connected with the OUT+ of N6, and the OUT-of N5 is connected with the OUT+ of N6; The OUT-of N6 is connected with DH2+, and DH1+ is connected with DH2+.
QF takes off to plug with-B in separation and is connected, with bullet emission automatic disconnection; DH1_CPU and DH2_CPU be by 2803 control the GND_CPU signal, with 5V_CPU altogether; DH1, DH2 are the ignition signal of parallel connection; + B and 5V_CPU are independently.
The purpose of this circuit be take off touch QF and unplug before (i.e. bullet emission before), guarantee DH1, the output of DH2 no-voltage; After lift-off contact (QF) unplugs, connect GND_CPU successively, make+B connects with DH1, DH2, the realization purpose of lighting a fire through CPU control DH1CPU and DH2_CPU.
This circuit is a power amplification circuit, and with 5V input control+B output, the function and the characteristics of this circuit are following:
Can know by Fig. 1, realize that igniting needs two conditions: 1.+B is charged; 2. N3 and N5 have at least a relay closes and N4 and N6 to have a relay closes at least.This circuit makes this two condition interlockings through N1 and N2 relay, and whenever promptly do not meet accident the igniting situation:
Before taking off:
When+when B was charged, N1 and the work of N2 relay were broken off the input anode of N3~N6, even there are interfering signal in DH1_CPU or DH2_CPU, N3~N6 also can't be closed, and assurance+B and DH1, DH2 can't connect, and can't light a fire.When+when B is not charged, even there are interfering signal in DH1_CPU or DH2_CPU, the input conducting of N3~N6, DH1, DH2 and+B connects, but this moment+B is not charged, can't light a fire yet; In any case promptly, can not realize ignition function before taking off.
After taking off:
This circuit guarantees that the whichever relay output end with the short circuit or the mode failures even that opens circuit, relies on other relay work all can normally realize ignition function.

Claims (2)

1. the firing circuit of an input and output interlocking, it comprises solid-state relay N1, N2, N3, N4, N5 and N6, it is characterized in that: the IN+ of described N1 and N2 is connected with a 3.3k Ω resistance respectively; Each 3.3k Ω resistance all is connected with the OUT+ of N3 and N5, and the IN-of N1 and N2 is connected with QF, and the OUT+ of N1 and N2 is connected with the 5v power supply; The OUT-of N1 and N2 is connected respectively with the IN+ of N3, N4, N5 and N6, and the IN-of N3 is connected with DH1_CPU, and the OUT-of N3 is connected with the OUT+ of N4; The IN-of N4 is connected with DH2_CPU, and the OUT-of N4 is connected with DH1+, and the IN-of N5 is connected with DH1_CPU; The OUT-of N5 is connected with the OUT+ of N6; The OUT-of N5 is connected with the OUT+ of N6, and the OUT-of N6 is connected with DH2+, and DH1+ is connected with DH2+.
2. the firing circuit of a kind of input and output interlocking as claimed in claim 1 is characterized in that: wherein, and the solid-state relay JGW3023B that N1, N2 export for long closed contact; N3~N6 is the solid-state relay JGX36M of normally opened contact output.
CN2011204060200U 2011-10-24 2011-10-24 Ignition circuit with interlocking input and output Expired - Fee Related CN202304642U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011204060200U CN202304642U (en) 2011-10-24 2011-10-24 Ignition circuit with interlocking input and output

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011204060200U CN202304642U (en) 2011-10-24 2011-10-24 Ignition circuit with interlocking input and output

Publications (1)

Publication Number Publication Date
CN202304642U true CN202304642U (en) 2012-07-04

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011204060200U Expired - Fee Related CN202304642U (en) 2011-10-24 2011-10-24 Ignition circuit with interlocking input and output

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CN (1) CN202304642U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104022766A (en) * 2014-05-28 2014-09-03 桂林航天电子有限公司 Solid ignition module with input control anti-interference design and operation method
CN110160414A (en) * 2018-08-20 2019-08-23 北京机电工程研究所 A kind of igniting bussed supply control circuit
CN110285726A (en) * 2019-06-12 2019-09-27 北京机电工程研究所 A kind of firing circuit used suitable for Ignition chip/solid-state relay

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104022766A (en) * 2014-05-28 2014-09-03 桂林航天电子有限公司 Solid ignition module with input control anti-interference design and operation method
CN104022766B (en) * 2014-05-28 2016-09-14 桂林航天电子有限公司 There is input and control solid ignition module and the operation method of Anti-interference Design
CN110160414A (en) * 2018-08-20 2019-08-23 北京机电工程研究所 A kind of igniting bussed supply control circuit
CN110285726A (en) * 2019-06-12 2019-09-27 北京机电工程研究所 A kind of firing circuit used suitable for Ignition chip/solid-state relay

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120704

Termination date: 20171024

CF01 Termination of patent right due to non-payment of annual fee