CN202276321U - Power amplifier circuit of learning machine - Google Patents

Power amplifier circuit of learning machine Download PDF

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Publication number
CN202276321U
CN202276321U CN2011203092492U CN201120309249U CN202276321U CN 202276321 U CN202276321 U CN 202276321U CN 2011203092492 U CN2011203092492 U CN 2011203092492U CN 201120309249 U CN201120309249 U CN 201120309249U CN 202276321 U CN202276321 U CN 202276321U
Authority
CN
China
Prior art keywords
pin
power amplifier
learning machine
amplifier chip
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2011203092492U
Other languages
Chinese (zh)
Inventor
蒋智谋
胡宝华
宁争荣
周建华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Anhui Zhuangyuanlang Electronic Technology Co Ltd
Original Assignee
Anhui Zhuangyuanlang Electronic Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anhui Zhuangyuanlang Electronic Technology Co Ltd filed Critical Anhui Zhuangyuanlang Electronic Technology Co Ltd
Priority to CN2011203092492U priority Critical patent/CN202276321U/en
Application granted granted Critical
Publication of CN202276321U publication Critical patent/CN202276321U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model discloses a power amplifier circuit of a learning machine, including a power amplifier chip, a loudspeaker. The loudspeaker is connected with the power amplifier chip, the play volume of the loudspeaker can be effectively raised, and the power amplifier chip is matched with the master control chip of the learning machine to realize volume multistage adjustment of the loudspeaker. According to the utility model, the structure is simple and easy to realize, the sound play quality of the learning machine is raised, and the integral performance of the learning machine is improved.

Description

A kind of power amplifier of learning machine
Technical field
The utility model relates to the learning machine circuit field, is specially a kind of power amplifier of learning machine.
Background technology
Learning machine is a kind of electronic instruction series products, is widely used in the student group at home.Learning machine is generally by governor circuit and other peripheral circuit, like formations such as central control circuit, audio-amplifying circuits.The learning machine power amplifier volume of prior art is limited, and it is relatively poor to play tonequality, has reduced the overall performance of learning machine.
The utility model content
The utility model purpose provides a kind of power amplifier of learning machine, to solve the limited problem of prior art learning machine power amplifier volume.
In order to achieve the above object, the technical scheme that the utility model adopted is:
A kind of power amplifier of learning machine; Comprise that model is the power amplifier chip U6 of AUD4990MS08; And loud speaker LS1 with two terminals; It is characterized in that: on the #SD pin of said power amplifier chip U6 two line conductors are arranged, a line conductor inserts the learning machine main control chip on the #SD pin, and another line conductor is divided into two line conductors after being connected to resistance R 47 again on the #SD pin; The line conductor that resistance R 47 connects inserts the main control chip of learning machine; Another line conductor that resistance R 47 connects is through resistance R 48 ground connection, and the BP pin of power amplifier chip U6, IN+ pin connect the back altogether through capacitor C 57 ground connection, and the IN-pin of power amplifier chip U6 is through the resistance R 50 of series connection each other, the main control chip that capacitor C 60 inserts learning machine; The VO1 pin of power amplifier chip U6 is connected with the IN-pin of power amplifier chip U6 through capacitor C 61; The VO1 pin of power amplifier chip U6 also inserts the main control chip of learning machine through resistance R 51, resistance R 49, the capacitor C 59 of series connection each other, have three pass to go out lead on the VDD pin of power amplifier chip U6, and a pass goes out lead through capacitor C 58 ground connection on the VDD pin; Another pass goes out lead through capacitor C 56 ground connection on the VDD pin; Third Road is drawn lead and is introduced external power source through inductance FB4 on the VDD pin, the GND pin ground connection of power amplifier chip U6, and the VO2 pin is connected with first terminals of loud speaker LS1; First terminals of loud speaker LS1 also pass through static impedance device ESD5 ground connection respectively through static impedance device ESD4, second terminals of loud speaker LS1, and second terminals of loud speaker LS1 also are connected with the VO1 pin of power amplifier chip U6.
The utility model is simple in structure, is easy to realize, can improve the output volume of loud speaker through the power amplifier chip, and cooperates with the power amplifier chip through the learning machine main control chip, and the multistage adjusting of realization speaker volume has improved the learning machine loud speaker and exported tonequality.The utility model has improved learning machine sound playing quality, has also improved the overall performance of learning machine.
Description of drawings
Fig. 1 is the utility model circuit theory diagrams.
Embodiment
As shown in Figure 1.A kind of power amplifier of learning machine; Comprise that model is the power amplifier chip U6 of AUD4990MS08, and the loud speaker LS1 with two terminals, on the #SD pin of power amplifier chip U6 two line conductors are arranged; A line conductor inserts the learning machine main control chip on the #SD pin; Another line conductor is divided into two line conductors after being connected to resistance R 47 again on the #SD pin, and the line conductor that resistance R 47 connects inserts the main control chip of learning machine, and another line conductor that resistance R 47 connects is through resistance R 48 ground connection; The BP pin of power amplifier chip U6, IN+ pin connect the back altogether through capacitor C 57 ground connection; The IN-pin of power amplifier chip U6 is through the resistance R 50 of series connection each other, the main control chip that capacitor C 60 inserts learning machine, and the VO1 pin of power amplifier chip U6 is connected with the IN-pin of power amplifier chip U6 through capacitor C 61, and the VO1 pin of power amplifier chip U6 also inserts the main control chip of learning machine through resistance R 51, resistance R 49, the capacitor C 59 of series connection each other; There are three pass to go out lead on the VDD pin of power amplifier chip U6; A pass goes out lead through capacitor C 58 ground connection on the VDD pin, and another pass goes out lead through capacitor C 56 ground connection on the VDD pin, and Third Road is drawn lead and introduced external power source through inductance FB4 on the VDD pin; The GND pin ground connection of power amplifier chip U6; The VO2 pin is connected with first terminals of loud speaker LS1, and first terminals of loud speaker LS1 also pass through static impedance device ESD5 ground connection respectively through static impedance device ESD4, second terminals of loud speaker LS1, and second terminals of loud speaker LS1 also are connected with the VO1 pin of power amplifier chip U6.

Claims (1)

1. the power amplifier of a learning machine; Comprise that model is the power amplifier chip U6 of AUD4990MS08; And loud speaker LS1 with two terminals; It is characterized in that: on the #SD pin of said power amplifier chip U6 two line conductors are arranged, a line conductor inserts the learning machine main control chip on the #SD pin, and another line conductor is divided into two line conductors after being connected to resistance R 47 again on the #SD pin; The line conductor that resistance R 47 connects inserts the main control chip of learning machine; Another line conductor that resistance R 47 connects is through resistance R 48 ground connection, and the BP pin of power amplifier chip U6, IN+ pin connect the back altogether through capacitor C 57 ground connection, and the IN-pin of power amplifier chip U6 is through the resistance R 50 of series connection each other, the main control chip that capacitor C 60 inserts learning machine; The VO1 pin of power amplifier chip U6 is connected with the IN-pin of power amplifier chip U6 through capacitor C 61; The VO1 pin of power amplifier chip U6 also inserts the main control chip of learning machine through resistance R 51, resistance R 49, the capacitor C 59 of series connection each other, have three pass to go out lead on the VDD pin of power amplifier chip U6, and a pass goes out lead through capacitor C 58 ground connection on the VDD pin; Another pass goes out lead through capacitor C 56 ground connection on the VDD pin; Third Road is drawn lead and is introduced external power source through inductance FB4 on the VDD pin, the GND pin ground connection of power amplifier chip U6, and the VO2 pin is connected with first terminals of loud speaker LS1; First terminals of loud speaker LS1 also pass through static impedance device ESD5 ground connection respectively through static impedance device ESD4, second terminals of loud speaker LS1, and second terminals of loud speaker LS1 also are connected with the VO1 pin of power amplifier chip U6.
CN2011203092492U 2011-08-24 2011-08-24 Power amplifier circuit of learning machine Expired - Fee Related CN202276321U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011203092492U CN202276321U (en) 2011-08-24 2011-08-24 Power amplifier circuit of learning machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011203092492U CN202276321U (en) 2011-08-24 2011-08-24 Power amplifier circuit of learning machine

Publications (1)

Publication Number Publication Date
CN202276321U true CN202276321U (en) 2012-06-13

Family

ID=46196657

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011203092492U Expired - Fee Related CN202276321U (en) 2011-08-24 2011-08-24 Power amplifier circuit of learning machine

Country Status (1)

Country Link
CN (1) CN202276321U (en)

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Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120613

Termination date: 20120824