CN202258260U - Light-emitting diode (LED) dimming driving device and liquid crystal display - Google Patents
Light-emitting diode (LED) dimming driving device and liquid crystal display Download PDFInfo
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- CN202258260U CN202258260U CN2011203533993U CN201120353399U CN202258260U CN 202258260 U CN202258260 U CN 202258260U CN 2011203533993 U CN2011203533993 U CN 2011203533993U CN 201120353399 U CN201120353399 U CN 201120353399U CN 202258260 U CN202258260 U CN 202258260U
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- dimmer switch
- led
- circuit
- pwm signal
- drive device
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Abstract
The utility model provides a light-emitting diode (LED) dimming driving device and a liquid crystal display. The LED dimming driving device comprises a plurality of dimming control circuits. Each dimming control circuit concretely comprises a dimming switch. The LED dimming driving device is characterized by also comprising a delay setting circuit used for setting different delay time for each dimming control circuit. Each dimming control circuit also specifically comprises a clock delay circuit used for receiving pulse-width modulation (PWM) signals and performing timing according to the delay time; when the delay time timing is finished, the PWM signals are output to the dimming switch. According to the LED dimming driving device and the liquid crystal display, provided by the utility model, the output of the PWM signals is controlled by utilizing different delay time so as to control the dimming switch to be switched on or switched off, thereby, the phenomenon that the dimming switch is simultaneously conducted by the PWM signals so that a large amount of energy is sent into an LED access to generate noise or electromagnetic interference is effectively avoided.
Description
Technical field
The utility model relates to the LED technical field, specially refers to LED dimming drive device and LCD.
Background technology
Along with the continuous development of LCD (Liquid Crystal Display, LCD) technology, increasing production firm has focused on LED (Light Emitting Diode with sight when selecting backlight; Light emitting diode) on; LED is highlighted as the advantage that backlight is applied in the LCD liquid crystal panel day by day, and it makes LCD liquid crystal panel size smaller and more exquisite, longer service life; Response time is shorter; It is lower to consume energy, and color representation power outclass traditional CCFL (Cold Cathode Fluorescent Lamp, cold-cathode fluorescence lamp).
Along with the LED technical development, people have more and more stricter requirement for its dimming behavior.In traditional LED dimming drive device, usually PWM (Pulse Width Modulation, pulse-length modulation) signal is outputed on each road adjusting control circuit simultaneously, control the LED multi-path path simultaneously.When concrete the realization, pwm signal is controlled the conducting of dimmer switch in the adjusting control circuit of every road or is ended the opening and closing that realize LED, and wherein dimmer switch specifically can be metal-oxide-semiconductor.
Be that example is explained light modulation process of the prior art with one road adjusting control circuit below.When the pwm signal on a certain road of input is high level, the dimmer switch conducting on this adjusting control circuit of high level signal control, thus open the LED that this adjusting control circuit connects; Otherwise when pwm signal was low level, the dimmer switch on this adjusting control circuit of low level signal control ended, thereby closes the LED that this adjusting control circuit connects.
But, when the LED in the prior art on all LED paths opens simultaneously, at short notice need be for the whole LED luminescent system provide very big energy, this will produce bigger noise and electromagnetic interference (EMI), also can cause PWM power-supply system job insecurity.
The utility model content
The fundamental purpose of the utility model is that a kind of LED dimming drive device and the LCD that can effectively avoid noise, reduce electromagnetic interference (EMI) is provided.
The utility model proposes a kind of LED dimming drive device, comprises the multichannel adjusting control circuit, and every road adjusting control circuit specifically comprises a dimmer switch, and this dimmer switch is controlled paths of LEDs path connection or blocking-up, and said LED dimming drive device also comprises:
Postpone circuit is set, be used for every road adjusting control circuit is provided with different delay time;
Said every road adjusting control circuit also specifically comprises:
Clock delay circuit is used to receive pwm signal, and according to carrying out timing time delay, when said timing time delay is accomplished, output pwm signal to said dimmer switch.
Preferably, said every road adjusting control circuit also specifically comprises:
First discharge that is connected with said dimmer switch suppresses circuit, is used for when said LED path is blocked, cutting off the discharge loop of the stray capacitance of said dimmer switch to said clock delay circuit.
Preferably, said dimmer switch is a high-voltage MOS pipe;
Said first discharge suppresses circuit and comprises follower; The in-phase input end of said follower and power end receive the pwm signal of said clock delay circuit output; Control said follower conducting or end; The inverting input of said follower is connected with output terminal, and the output terminal of said follower connects the grid of said high-voltage MOS pipe, controls said high-voltage MOS pipe conducting or ends; When said follower ends, cut off the discharge loop of the stray capacitance of said high-voltage MOS pipe to said clock delay circuit.
Preferably, said every road adjusting control circuit also specifically comprises:
Second discharge that is connected with said dimmer switch suppresses circuit, is used for when said LED path is blocked, cutting off the discharge loop of the stray capacitance of said dimmer switch to this dimmer switch.
Preferably; Said second discharge suppresses circuit and comprises the low pressure metal-oxide-semiconductor, and the grid of this low pressure metal-oxide-semiconductor receives said pwm signal, controls the conducting of said low pressure metal-oxide-semiconductor or ends; The drain electrode of this low pressure metal-oxide-semiconductor connects said high-voltage MOS pipe source electrode, the source ground of this low pressure metal-oxide-semiconductor; When said low pressure metal-oxide-semiconductor ends, cut off the discharge loop of the stray capacitance of said high-voltage MOS pipe to this high-voltage MOS pipe.
Preferably, said clock delay circuit comprises:
Counter is used for when pwm signal arrives said clock delay circuit, according to carrying out timing time delay;
The pwm signal Postponement module is used to receive pwm signal, and when the timing time delay of said counter is accomplished, output pwm signal to said dimmer switch.
The utility model also proposes a kind of LCD, comprises above-mentioned LED dimming drive device.
The utility model utilizes the output of different delay time control pwm signal; To realize to the regulation and control constantly of dimmer switch break-make; Effectively avoided guaranteeing that because of pwm signal conducting simultaneously dimmer switch causes significant amount of energy to send into noise or electromagnetic interference (EMI) that the LED path is produced the PWM power-supply system is more stable.
In addition, the utility model embodiment also utilizes discharge to suppress the parasitic capacitance discharge that circuit suppresses dimmer switch, has avoided the energy loss and the noise that cause because of parasitic capacitance discharge.
Description of drawings
The structural representation of the LED dimming drive device that Fig. 1 provides for the utility model embodiment one;
Fig. 2 is the structural representation of clock delay circuit in the LED dimming drive device that provides of the utility model embodiment one;
The structural representation of the LED dimming drive device that Fig. 3 provides for the utility model embodiment two;
The circuit diagram of the LED dimming drive device that Fig. 4 provides for the utility model embodiment two;
The process flow diagram of the LED light modulation driving method that Fig. 5 provides for the utility model embodiment three.
The realization of the utility model purpose, functional characteristics and advantage will combine embodiment, further specify with reference to accompanying drawing.
Embodiment
Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
As shown in Figure 1, the structural representation of the LED dimming drive device that Fig. 1 provides for the utility model embodiment one.
The LED dimming drive device that the utility model embodiment provides comprises that delay is provided with circuit 10 and multichannel adjusting control circuit 20, wherein, postpones circuit 10 is set, and is used for every road adjusting control circuit 20 is provided with different delay time.Every road adjusting control circuit 20 specifically comprises:
Clock delay circuit 22 is used to receive pwm signal, and according to carrying out timing time delay, when said timing time delay is accomplished, output pwm signal to said dimmer switch 21.
Present embodiment is through being provided with different delay time to every road adjusting control circuit 20; Make every road clock delay circuit 22 corresponding to different delay time separately; Through after timing time delay; Clock delay circuit 22 is respectively at the different time output pwm signal, and promptly pwm signal does not arrive dimmer switch 21 control ends simultaneously, and dimmer switch 21 can be not closed simultaneously.With respect to prior art, the utility model embodiment has effectively avoided guaranteeing the stable operation of PWM power-supply system because of pwm signal conducting simultaneously dimmer switch 21 causes significant amount of energy to send into noise or electromagnetic interference (EMI) that the LED path is produced.
As shown in Figure 2, Fig. 2 is the structural representation of clock delay circuit in the LED dimming drive device that provides of the utility model embodiment one.In the present embodiment, clock delay circuit 22 specifically comprises:
Counter 221 is used for when pwm signal arrives said clock delay circuit 22, according to carrying out timing time delay;
Pwm signal Postponement module 222 is used to receive pwm signal, and when the timing time delay of said counter 221 is accomplished, output pwm signal to said dimmer switch 21.
In the present embodiment; Each clock delay circuit 22 corresponding counter 221 different delay time through postponing that 10 pairs of each counters 221 of circuit are set, when pwm signal arrives clock delay circuit 22; Counter 221 picks up counting; When counter 221 timing on a certain clock delay circuit 22 arrived preset delay time, the pwm signal of pwm signal Postponement module 222 output high level was controlled this dimmer switch 21 conductings to the dimmer switch 21 of corresponding path.
Present embodiment utilizes each pwm signal Postponement module 222 output pwm signal of different delay time control; And then the control pwm signal arrives the control end of dimmer switch 21 at different time; Effectively avoided guaranteeing the stable operation of PWM power-supply system because of pwm signal conducting simultaneously dimmer switch 21 causes significant amount of energy to send into noise or electromagnetic interference (EMI) that the LED path is produced.
As shown in Figure 3, the structural representation of the LED dimming drive device that Fig. 3 provides for the utility model embodiment two.
In the present embodiment, the LED dimming drive device comprises that delay is provided with circuit 110 and multichannel adjusting control circuit 120.Every road adjusting control circuit 120 specifically comprises: dimmer switch 121 and clock delay circuit 122.Wherein, identical among the function of dimmer switch 121 and clock delay circuit 122 and structure and above-mentioned first embodiment, no longer be repeated in this description at this.
Adjusting control circuit 120 in the LED dimming drive device that the utility model embodiment provides comprises that also first discharge that is connected with said dimmer switch 121 suppresses circuit 123.
Wherein, first discharge suppresses circuit 123, is used for when said LED path is blocked, cutting off the discharge loop of the stray capacitance of said dimmer switch 121 to said clock delay circuit 122.
In the present embodiment, dimmer switch 121 can be high-voltage MOS pipe, and the withstand voltage of high-voltage MOS pipe can be 60-500V or higher.The first discharge inhibition circuit 123 can suppress the stray capacitance of high-voltage MOS pipe to clock delay circuit 122 discharges.Above-mentioned first discharge suppresses circuit 123 and comprises follower, the pwm signal behind the power end receive delay of follower, and the control follower is communicated with or blocking-up; Pwm signal after the delay also is input to the in-phase input end of follower, and the output terminal of follower connects the grid of high-voltage MOS pipe, the control signal of output and pwm signal homophase, control high-voltage MOS pipe conducting or end.
In the present embodiment, when pwm signal was low level, follower ended, and the stray capacitance of high-voltage MOS pipe can not be discharged through the clock delay circuit 122 at follower place, has avoided the energy loss and the noise that cause because of parasitic capacitance discharge.
Further; Adjusting control circuit 120 in the LED dimming drive device that the utility model embodiment provides can also comprise: second discharge that is connected with said dimmer switch 121 suppresses circuit 124; Second discharge suppresses circuit 124 and is used for when said LED path is blocked, cutting off the discharge loop of the stray capacitance of said dimmer switch 121 to this dimmer switch 121.
In the present embodiment; Dimmer switch 121 is a high-voltage MOS pipe; Second discharge suppresses circuit and comprises low pressure metal-oxide-semiconductor (withstand voltage is less than 60V), the pwm signal behind the grid receive delay of low pressure metal-oxide-semiconductor, control low pressure metal-oxide-semiconductor conducting or end; The drain electrode of low pressure metal-oxide-semiconductor connects high-voltage MOS pipe source electrode, the source ground of low pressure metal-oxide-semiconductor.When pwm signal is low level; The low pressure metal-oxide-semiconductor ends; The source electrode of high-voltage MOS pipe is vacant, and stray capacitance can not guarantee effectively ending of high-voltage MOS pipe through the grid discharge of ground loop to high-voltage MOS pipe; Guarantee the blocking-up fully of LED path, further avoided the energy loss and the noise that cause because of parasitic capacitance discharge.
As shown in Figure 4, the circuit diagram of the LED dimming drive device that Fig. 4 provides for the utility model embodiment two.
The utility model embodiment is an example with three paths of LEDs light modulation paths; Wherein postponing to be provided with circuit 110 is specially in the present embodiment and postpones to be provided with circuit DSC; Counter in the clock delay circuit specifically comprises Counter10, Counter20 and Counter30; Pwm signal Postponement module in the clock delay circuit specifically comprises time switch SW10, SW20, SW30, and dimmer switch 120 specifically comprises high-voltage MOS pipe Q11, Q21 and Q31.
In the present embodiment, LED dimming drive device each clock delay circuit respectively is provided with time switch SW10, SW20, SW30, respectively corresponding counter Counter10, Counter20, Counter30.Postpone to be provided with circuit DSC and respectively counter Counter10, Counter20, Counter30 are provided with different time delays; When pwm signal arrives counter Counter10, Counter20, Counter30; Each clock timer basis preset delay time separately picks up counting; When a certain clock timer counting finished, the time switch that this clock timer is corresponding was closed, and pwm signal is outputed to follow-up path.For example, counter Counter10 preset delay time is 16ms, and counter Counter20 preset delay time is 32ms; Be 48ms the time delay of counter Counter30, and when reaching 16ms, counter Counter10 counting finishes; Time switch SW10 is closed, and pwm signal is outputed on the path of high-voltage MOS pipe Q11 place, and this moment; Counter Counter20, Counter30 are also continuing timing, till arriving the respective delay time.
Present embodiment has guaranteed that pwm signal does not get into the PWM clock delay circuit simultaneously; Effectively avoided guaranteeing the stable operation of PWM power-supply system because of pwm signal conducting simultaneously high-voltage MOS pipe Q11, Q21, Q31 cause significant amount of energy to send into noise or electromagnetic interference (EMI) that the LED path is produced.
Present embodiment can also suppress the electric discharge phenomena of the stray capacitance C10 of high-voltage MOS pipe Q11, Q21, Q31, C20, C30; Above-mentioned first discharge suppresses circuit and comprises follower U10, U20 and U30, and second discharge suppresses circuit and comprises low pressure metal-oxide-semiconductor Q12, Q22 and Q32.Present embodiment is an example with first via PWM clock delay circuit and LED path; Pwm signal after the in-phase input end reception of follower U10 is delayed; The inverting input of this follower U10 is connected with output terminal; The output terminal of this follower U10 connects the grid of high-voltage MOS pipe Q11, the pulse control signal of output and pwm signal homophase, control high-voltage MOS pipe Q11 conducting or end; Pwm signal also outputs to the power end of follower U10, control follower U10 conducting or end.When pwm signal is high level, follower U10 conducting, output high level pulse control signal, control high-voltage MOS pipe Q11 conducting; When pwm signal was low level, follower U10 ended, and follower U10 place path breaks off, and the stray capacitance C10 of high-voltage MOS pipe Q11 can not avoid the energy loss and the noise that cause because of stray capacitance C10 discharge through the loop discharge of follower U10 place.
In addition, the grid of low pressure metal-oxide-semiconductor Q12 is the pwm signal behind the receive delay also, control low pressure metal-oxide-semiconductor Q12 conducting or end, and the drain electrode of this low pressure metal-oxide-semiconductor Q12 connects high-voltage MOS pipe Q11 source electrode, the source ground of this low pressure metal-oxide-semiconductor Q12.When pwm signal is high level, low pressure metal-oxide-semiconductor Q12 conducting, the source ground of high-voltage MOS pipe Q11, but operate as normal; When pwm signal is low level; Low pressure metal-oxide-semiconductor Q12 ends; The source electrode of high-voltage MOS pipe Q11 is vacant, and stray capacitance C10 can not guarantee effectively ending of high-voltage MOS pipe Q11 through the grid discharge of ground loop to high-voltage MOS pipe Q11; Guarantee the blocking-up fully of LED path, further avoided the energy loss and the noise that cause because of stray capacitance C10 discharge.
As shown in Figure 5, the process flow diagram of the LED light modulation driving method that Fig. 5 provides for the utility model embodiment three, the LED driving method that the utility model embodiment provides comprises:
Step S10 is provided with different delay time and picks up counting each road adjusting control circuit, simultaneously pwm signal is inserted said each road adjusting control circuit;
In the present embodiment, specifically be that the counter in each road adjusting control circuit is provided with different delay time, when pwm signal arrived counter, counter was according to carrying out timing time delay.
Step S20 when timing time delay on each road adjusting control circuit is accomplished, exports the dimmer switch of said pwm signal to said adjusting control circuit.
The pwm signal of present embodiment is a dim signal, is used to drive the dimmer switch on each adjusting control circuit, is communicated with or blocking-up to control the corresponding LED path of this dimmer switch.When the time delay timing on the counter was accomplished, adjusting control circuit was communicated with, and pwm signal will arrive the dimmer switch control end respectively, control dimmer switch conducting or end.When pwm signal is high level, the dimmer switch conducting, the LED path is communicated with; When pwm signal was low level, dimmer switch ended, the blocking-up of LED path.Present embodiment has effectively been avoided guaranteeing the stable operation of PWM power-supply system because of pwm signal conducting simultaneously dimmer switch causes significant amount of energy to send into noise or electromagnetic interference (EMI) that the LED path is produced.
The utility model embodiment also mentions a kind of LCD, and this LCD comprises above-mentioned LED dimming drive device, and this LED dimming drive device can comprise:
The multichannel adjusting control circuit, every road adjusting control circuit specifically comprises a dimmer switch, this dimmer switch is controlled paths of LEDs path connection or blocking-up;
Postpone circuit is set, be used for every road adjusting control circuit is provided with different delay time;
Said every road adjusting control circuit also specifically comprises:
Clock delay circuit is used to receive pwm signal, and according to carrying out timing time delay, when said timing time delay is accomplished, output pwm signal to said dimmer switch.
In addition, the LED dimming drive device in the above-mentioned LCD also can comprise:
First discharge that is connected with dimmer switch suppresses circuit, is used for when said LED path is blocked, cutting off the discharge loop of the stray capacitance of said dimmer switch to said clock delay circuit;
Second discharge that is connected with dimmer switch suppresses circuit, is used for when said LED path is blocked, cutting off the discharge loop of the stray capacitance of said dimmer switch to this dimmer switch.
LED dimming drive device in the utility model LCD can comprise earlier figures 1 all technical schemes in embodiment illustrated in fig. 4, and its detailed structure, circuit and principle of work all can not given unnecessary details at this with reference to previous embodiment.Owing to adopt the scheme of aforementioned LED dimming drive device; The existing relatively LCD of the utility model LCD; Effectively reduced the interference of generating noise or electromagnetism, also reduced simultaneously, made power-supply system stable operation because of parasitic capacitance discharge causes energy loss and noise.
The above is merely the preferred embodiment of the utility model; Be not thus the restriction the utility model claim; Every equivalent structure or equivalent flow process conversion that utilizes the utility model instructions and accompanying drawing content to be done; Or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the utility model.
Claims (7)
1. a LED dimming drive device comprises the multichannel adjusting control circuit, and every road adjusting control circuit specifically comprises a dimmer switch, and this dimmer switch is controlled paths of LEDs path connection or blocking-up, it is characterized in that said LED dimming drive device also comprises:
Postpone circuit is set, be used for every road adjusting control circuit is provided with different delay time;
Said every road adjusting control circuit also specifically comprises:
Clock delay circuit is used to receive pwm signal, and according to carrying out timing time delay, when said timing time delay is accomplished, output pwm signal to said dimmer switch.
2. LED dimming drive device according to claim 1 is characterized in that, said every road adjusting control circuit also specifically comprises:
First discharge that is connected with said dimmer switch suppresses circuit, is used for when said LED path is blocked, cutting off the discharge loop of the stray capacitance of said dimmer switch to said clock delay circuit.
3. LED dimming drive device according to claim 2 is characterized in that,
Said dimmer switch is a high-voltage MOS pipe;
Said first discharge suppresses circuit and comprises follower; The in-phase input end of said follower and power end receive the pwm signal of said clock delay circuit output; Control said follower conducting or end; The inverting input of said follower is connected with output terminal, and the output terminal of said follower connects the grid of said high-voltage MOS pipe, controls said high-voltage MOS pipe conducting or ends.
4. LED dimming drive device according to claim 1 and 2 is characterized in that, said every road adjusting control circuit also specifically comprises:
Second discharge that is connected with said dimmer switch suppresses circuit, is used for when said LED path is blocked, cutting off the discharge loop of the stray capacitance of said dimmer switch to this dimmer switch.
5. LED dimming drive device according to claim 4 is characterized in that,
Said dimmer switch is a high-voltage MOS pipe;
Said second discharge suppresses circuit and comprises the low pressure metal-oxide-semiconductor, and the grid of this low pressure metal-oxide-semiconductor receives said pwm signal, controls the conducting of said low pressure metal-oxide-semiconductor or ends, and the drain electrode of this low pressure metal-oxide-semiconductor connects said high-voltage MOS pipe source electrode, the source ground of this low pressure metal-oxide-semiconductor.
6. LED dimming drive device according to claim 1 is characterized in that, said clock delay circuit comprises:
Counter is used for when pwm signal arrives said clock delay circuit, according to carrying out timing time delay;
The pwm signal Postponement module is used to receive pwm signal, and when the timing time delay of said counter is accomplished, output pwm signal to said dimmer switch.
7. a LCD is characterized in that, comprises like each described LED dimming drive device in the claim 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203533993U CN202258260U (en) | 2011-09-20 | 2011-09-20 | Light-emitting diode (LED) dimming driving device and liquid crystal display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203533993U CN202258260U (en) | 2011-09-20 | 2011-09-20 | Light-emitting diode (LED) dimming driving device and liquid crystal display |
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| Publication Number | Publication Date |
|---|---|
| CN202258260U true CN202258260U (en) | 2012-05-30 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2011203533993U Expired - Lifetime CN202258260U (en) | 2011-09-20 | 2011-09-20 | Light-emitting diode (LED) dimming driving device and liquid crystal display |
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| CN (1) | CN202258260U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102354484A (en) * | 2011-09-20 | 2012-02-15 | 深圳市华星光电技术有限公司 | Light emitting diode (LED) dimming driving device, method and liquid crystal display |
| US10361537B2 (en) | 2017-10-23 | 2019-07-23 | Microsoft Technology Licensing, Llc | Dynamic supply voltage control circuit for laser diode |
| US10658814B2 (en) | 2017-10-23 | 2020-05-19 | Microsoft Technology Licensing, Llc | Laser diode priming to reduce latency |
-
2011
- 2011-09-20 CN CN2011203533993U patent/CN202258260U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102354484A (en) * | 2011-09-20 | 2012-02-15 | 深圳市华星光电技术有限公司 | Light emitting diode (LED) dimming driving device, method and liquid crystal display |
| US10361537B2 (en) | 2017-10-23 | 2019-07-23 | Microsoft Technology Licensing, Llc | Dynamic supply voltage control circuit for laser diode |
| US10658814B2 (en) | 2017-10-23 | 2020-05-19 | Microsoft Technology Licensing, Llc | Laser diode priming to reduce latency |
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Granted publication date: 20120530 |
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| CX01 | Expiry of patent term |