CN202256418U

CN202256418U - Analog front-end circuit of redundant sampling system

Info

Publication number: CN202256418U
Application number: CN201120356862XU
Authority: CN
Inventors: 夏雨; 邹志杨; 姜雷; 邓庆; 马玉龙; 甘云华
Original assignee: Nari Technology Co Ltd
Current assignee: Nanjing NARI Group Corp
Priority date: 2011-09-22
Filing date: 2011-09-22
Publication date: 2012-05-30
Anticipated expiration: 2021-09-22

Abstract

The utility model discloses an analog front-end circuit of a redundant sampling system, which is applicable to a high-voltage relay protection device. The circuit consists of resistors and capacitive elements and is provided with two independent test signal input interfaces. Compared with the classic circuit, the analog front-end circuit has fewer elements and devices, the cost is lowered, an operational amplifier which has the highest failure rate in the circuit of the prior art is removed; therefore, the reliability of the circuit is improved; by adopting the manner that independent test signals are connected into the redundant sampling system, the degree of coupling between two loops is lowered, the test for the abnormality of a single loop of the redundant system is achieved, the judgment for hardware failure is facilitated, and the reliability of the whole system is improved.

Description

The analog front circuit of a kind of redundancy sampling system

Technical field

The utility model relates to the analog front circuit of the redundancy sampling system of relay protection of power system equipment, belongs to the industrial control technology field.

Background technology

Relay protection of power system equipment is to break down or during irregular operating when the electrical equipment in the electric system, makes circuit breaker trip quickly and accurately or sends the aut.eq. of signal.Be to improve the reliability of relay protection system, the protection equipment that is applied in the relay protection system of voltage levels electrical network all adopts redundant configuration, and the sampling system of device hardware adopts redundancy structure; Target is that equipment can promptly and accurately be judged hardware fault, avoids sending wrong isolating switch action command when single element fault took place in sampling system.

The analog front circuit of sampling system adopts the redundancy structure design equally.Except the function that realizes input signal conditioning, for making things convenient for batch testing, the analog front circuit of sampling system also need insert the external testing signal corresponding with input signal.As shown in Figure 1, operational amplifier design totalizer and low-pass filter are adopted in typical front-end circuit design, realize the function that input signal conditioning and external testing signal insert.This analog front circuit; When practical application; Occurred causing redundant each other two-way sampling channel output valve to occur disturbance simultaneously because a certain operational amplifier loses efficacy, equipment fails correctly to judge hardware fault, thereby causes sending the accident of misoperation order.

The utility model content

The purpose of the utility model is through adopting passive device to constitute analog front circuit, reducing sampling system hardware fault probability; The redundancy sampling system is inserted independently external testing amount respectively; Reduce the inner couplings degree of redundancy structure; When guaranteeing in the sampling system front-end circuit to take place single element fault; Equipment can accurately be judged hardware fault, reaches the purpose that improves relay protection device analog sampling loop reliability generally.

In order to realize the purpose of the utility model, the utility model provides following technical scheme:

The analog front circuit of a kind of redundancy sampling system is characterized in that circuit is made up of resistance and capacity cell, has two independently test signal input interfaces.

Comprise two series circuits that are unified into by two resistance string in the circuit; One end of said two series circuits links together and constitutes an input end; The other end of said two series circuits is respectively two output terminals, and input signal is imported through said input end, exports said two output terminals respectively to.

Said output terminal is simultaneously through capacity earth.

Said input signal is simultaneously through a resistance eutral grounding.

Said test signal input interface is connected to respectively between said two resistance of the series connection in each said series circuit.

The demand setting of input circuit impedance synthesis low-pass cut-off frequencies and input signal transient peak current limliting.

The present technique scheme is based on Resistor-Capacitor Unit design simulation front-end circuit; Through redundant circuit being inserted the topological structure of test volume respectively; Improve the decoupling zero degree between redundancy section, avoid causing the whole output abnormality of redundant system owing to the fault of single element in the redundant circuit.

The beneficial effect that the utility model reached:

The analog front circuit of the utility model lacks than classical circuit elements number of devices, has reduced cost, and has removed in the prior art the highest operational amplifier of crash rate in the circuit, has improved circuit reliability; Because the external testing signal is introduced redundant circuit respectively, than circuit of the prior art, has strengthened the impedance between two loops; Reduced the degree of coupling between two loops; Realization helps the determination hardware fault to the single loop abnormality test of redundant system, has improved the reliability of entire system.

Description of drawings

Fig. 1 is the analog front circuit figure of sampling system in the prior art;

Fig. 2 is the analog front circuit figure of the redundancy sampling system of the utility model.

Embodiment

Below in conjunction with accompanying drawing the utility model is further described.Following examples only are used for more clearly explaining the technical scheme of the utility model, and can not limit the protection domain of the utility model with this.

As shown in Figure 2, the utility model constitutes based on passive device, has two independently test signal input interfaces, and normal operating conditions realizes dualization sampling, can test respectively the subsystem in the redundant system under the test mode.

Circuit is made up of resistance and capacity cell; Comprise two series circuits that are in series by resistance in the circuit; First series circuit is in series by resistance R 2 and resistance R 3, and second series circuit is in series by resistance R 4 and resistance R 5, and an end of two series circuits links together and constitutes an input end IN; The other end of two series circuits is respectively two output terminal OUTA, OUTB; Input signal inputs to respectively in two series circuits through input end IN input, exports two output terminal OUTA, OUTB more respectively to.

Input signal passes through resistance R 1 ground connection simultaneously through input end IN.

Output terminal OUTA is simultaneously through capacitor C 1 ground connection.

Output terminal OUTB is simultaneously through capacitor C 2 ground connection.

Have two independently external testing signal input interface TinA, TinB in the circuit, one of them test signal input interface TinA is connected between the resistance R 2 and resistance R 3 in first series circuit; Another test signal input interface TinB is connected between second resistance R 4 and resistance R 5 in the series circuit.

The input circuit impedance is that comprehensive low-pass cut-off frequencies and input signal transient peak current limliting demand (ADC input port overvoltage restriction electric current) are confirmed.

The test loop impedance also need combine the driving force of test source to confirm.

The low-pass cut-off frequencies of input signal is confirmed by resistance R 2+ resistance R 3 and capacitor C 1, resistance R 4+ resistance R 5 and capacitor C 2.

The low-pass cut-off frequencies of test volume is confirmed by resistance R 3 and capacitor C 1, resistance R 5 and capacitor C 2.

The above only is the preferred implementation of the utility model; Should be understood that; For those skilled in the art; Under the prerequisite that does not break away from the utility model know-why, can also make some improvement and distortion, these improvement and distortion also should be regarded as the protection domain of the utility model.

Claims

1. the analog front circuit of a redundancy sampling system is characterized in that, circuit is made up of resistance and capacity cell, has two independently test signal input interfaces.

2. the analog front circuit of a kind of redundancy sampling according to claim 1 system is characterized in that,

3. the analog front circuit of a kind of redundancy sampling according to claim 2 system is characterized in that said output terminal is simultaneously through capacity earth.

4. the analog front circuit of a kind of redundancy sampling according to claim 2 system is characterized in that said input signal is simultaneously through a resistance eutral grounding.

5. the analog front circuit of a kind of redundancy sampling according to claim 2 system is characterized in that said test signal input interface is connected to respectively between said two resistance of the series connection in each said series circuit.