CN202160099U - Power module and power supply system - Google Patents
Power module and power supply system Download PDFInfo
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- CN202160099U CN202160099U CN2011202597767U CN201120259776U CN202160099U CN 202160099 U CN202160099 U CN 202160099U CN 2011202597767 U CN2011202597767 U CN 2011202597767U CN 201120259776 U CN201120259776 U CN 201120259776U CN 202160099 U CN202160099 U CN 202160099U
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Abstract
The utility model discloses a power module and power supply system. The power module comprises a Hall device, a first comparator, a second comparator and a comparator output control component, wherein the positive input ends of the first comparator and the second comparator are respectively connected with the positive output voltage end of the Hall device; the negative input ends of the first comparator and the second comparator are respectively connected with the negative output voltage end of the Hall device; moreover, the negative input end of the first comparator is inserted into a first voltage reference; the negative input end of the second comparator is inserted into a second voltage reference; the output ends of the first comparator and the second comparator are respectively connected with the input end of the comparator output control component. Requirements of a large integrated circuit (IC) on the output current (or power) of the power module can be effectively reduced through the power module, so that the cost and the space occupied by the power module in an electronic system can be reduced.
Description
Technical field
The utility model relates to integrated circuit (IC, Integrated Circuit) technical field, relates in particular to a kind of dual power module and electric power system of crossing flow point that have.
Background technology
Because the large-scale IC that communication at present is special-purpose; Like central processing unit (CPU; Central Processing Unit), Digital Signal Processing (DSP; Digital Signal Processor) etc. the number of transistors of device is more and more, by the chip power supply voltage (VCC) of number of transistors decision with the equiva lent impedance between (GND) also more and more littler, segment chip even can reach about 1 ohm (Ω); Parasitic capacitance between device power source and the ground is also increasing.
In addition; Increase along with the device running frequency; Quiescent current that these devices consumed and dynamic current also are rapidly the trend that rises, and it is more common that the target impedance of jumbo chip core (Core) power supply reaches the situation of 10 milliohms (m Ω), in order to satisfy so low target impedance; The decoupling capacitor quantity of chip has also reached new peak, such as: certain dsp chip commonly used requires chip side and mains side will reach the capacitance of 3000 microfarads (μ F) altogether.
More than these two factors caused at device and powered in a flash, produce having very big surge current.And after the device power up finished, the needed electric current of device but can remain on a lower level.As shown in Figure 1, Fig. 1 is the current curve sketch map of large-scale IC chip power and operate as normal, begins to climb at the voltage of T0 time chip, has produced the peak I 1 of surge current in the T1 time; Begin to load the configurator of IC chip in the T2 time, required electric current increases to some extent; Load completion at T3 time configurator, chip begins normal operation, and this moment, the electric current demand was I2.According to engineering experience, I1 generally can be more than the twice of I2.
In order to guarantee that the requirement that its device handbook (Datasheet) generally can be guarded is chosen power module according to bigger surge current value I1 with normally the powering on and working of electrical chip, and the electric current I 2 of device operate as normal is often below surge current I1 half the.Because the volume of power supply and cost and output current (power) are directly proportional, and have so just caused the space and the cost waste of whole system.
Present power module is crossed flow point and is had only a fixing value; And can not do configuration more flexibly; In application process, just have very big restriction like this, can only choose power module according to the surge current value I1 with electrical chip, this can cause space and cost waste.Such as: certain power module, its maximum output current are 30A, cross flow point and are set to 55A, if the surge current with electrical chip has reached 60A in the process of using this power module, so just have only the power module of the more high-power and volume of selection.
The utility model content
In view of this, the main purpose of the utility model is to provide a kind of power module and electric power system, and is high with the supply module cost that solves high density IC chip, big problem takes up room.
For achieving the above object, the technical scheme of the utility model is achieved in that
The utility model provides a kind of power module, comprising: hall device, first comparator, second comparator and comparator output control assembly, wherein,
The positive input terminal of said first comparator and second comparator is connected the output voltage anode of said hall device respectively; The negative input end of said first comparator and second comparator is connected the output voltage negative terminal of said hall device respectively; And the negative input end of said first comparator inserts first voltage reference, and the negative input end of second comparator inserts second voltage reference;
The output of said first comparator and second comparator is connected the input of said comparator output control assembly respectively.
Said comparator output control assembly comprises: delay circuit, tristate buffer and reverse tristate buffer, wherein,
Said delay circuit connects the control end of said tristate buffer and reverse tristate buffer respectively; The input of said reverse tristate buffer connects the output of said first comparator, and the input of said tristate buffer connects the output of said second comparator.
The output of said tristate buffer and reverse tristate buffer is connected the electrical chip of using of said power module power supply respectively.
Said delay circuit comprises interconnective timing bench and output signal controlling assembly, and the output of said output signal controlling assembly connects the control end of said tristate buffer and reverse tristate buffer.
The utility model also provides a kind of electric power system, and this system comprises interconnective power module and use electrical chip, wherein,
Said power module comprises: hall device, first comparator, second comparator and comparator output control assembly; The positive input terminal of said first comparator and second comparator is connected the output voltage anode of said hall device respectively; The negative input end of said first comparator and second comparator is connected the output voltage negative terminal of said hall device respectively; And the negative input end of said first comparator inserts first voltage reference, and the negative input end of second comparator inserts second voltage reference; The output of said first comparator and second comparator is connected the input of said comparator output control assembly respectively; The output of said comparator output control assembly connects the said electrical chip of using.
Said comparator output control assembly comprises: delay circuit, tristate buffer and reverse tristate buffer, wherein,
Said delay circuit connects the control end of said tristate buffer and reverse tristate buffer respectively; The input of said reverse tristate buffer connects the output of said first comparator, and the input of said tristate buffer connects the output of said second comparator;
Said tristate buffer is connected the said electrical chip of using respectively with the output of reverse tristate buffer.
Said delay circuit comprises interconnective timing bench and output signal controlling assembly, and the output of said output signal controlling assembly connects the control end of said tristate buffer and reverse tristate buffer.
A kind of power module and electric power system that the utility model provided; Its power module has two flow points of crossing; After power module powers on, at first adopt higher mistake flow point to carry out overcurrent protection,, adopt lower mistake flow point to carry out overcurrent protection through after certain retention time; This can effectively reduce the requirement of large-scale IC chip for power module output current (or power), thereby reduces shared cost and the space of power module in the electronic system.
Description of drawings
Fig. 1 is the current curve sketch map of medium-and-large-sized IC chip power of prior art and operate as normal;
Fig. 2 is the structural representation of electric power system among the utility model embodiment;
Fig. 3 is the overcurrent protection sketch map among the utility model embodiment;
Fig. 4 is the structural representation of power module among the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment the technical scheme of the utility model is further set forth in detail.
High for the supply module cost that solves prior art middle-high density IC chip, big problem takes up room; The utility model is intended to use the power modules with two flow points excessively for supplying power with electrical chip; As shown in Figure 2, the electric power system of the utility model comprises interconnective power module 10 and with electrical chip 20, wherein; VCC representes power output end, and GND representes the return flow path of power supply output.Wherein, power module 10 has two flow points of crossing, and representes these two different mistake flow points respectively with OC1 and OC2 among the embodiment of the utility model, and the internal structure of power module 10 will be elaborated follow-up.
After power module 10 powers on, at first adopt higher mistake flow point OC1 to carry out overcurrent protection, through behind certain retention time T, then switch to lower mistake flow point OC2 and carry out overcurrent protection, based on this, the course of work that power module 10 is realized is specially:
After the input of power module 10 powered on, at first acting over-current protection point was OC1, and it is higher than the protection point of OC2 that this crosses flow point, and OC1 can be set to the twice at least of OC2, perhaps is provided with according to actual needs; It is in order to tolerate the surge current with electrical chip, to make power module 10 be unlikely to get into the overcurrent protection state that this purpose of crossing flow point is set;
After having passed through certain retention time T, the point of crossing of power module 10 switches to OC2 by OC1, and OC2, OC2 play the effect of in power module 10 courses of work, carrying out short-circuit protection as the mistake flow point of the power module on the ordinary meaning 10.
As shown in Figure 3; Fig. 3 is the overcurrent protection sketch map among the utility model embodiment; Can find out, in the beginning a period of time after power module 10 powers on, cross flow point and be set to OC1; Can tolerate surge current I1, make power module 10 be unlikely to get into the overcurrent protection state in the period at this section with electrical chip; After having passed through certain retention time T, cross flow point and be set to OC2, be used for carrying out short-circuit protection in power module 10 courses of work.
Illustrate as follows: certain power module of the prior art, its maximum output current are 30A, cross flow point and are set to 55A (promptly have only and cross flow point); Adopt the power module of the utility model, it has two flow points of crossing, and wherein OC1 is set to 90A, and OC2 is set to 55A; If then the surge current with electrical chip has reached 60A; Can only select the power module (promptly crossing the power module that flow point is set to 55A no longer meets the demands) of bigger output current (or power) so in the prior art; And the above-mentioned power module of the utility model then still meets the demands, and need not to choose the power module of bigger output current (or power); So just effectively reduce power module shared cost and space in system, satisfied simultaneously with the demand of electrical chip for electric current.
The power module of the utility model, its internal structure is as shown in Figure 4, mainly comprises: hall device 101, first comparator 102, second comparator 103 and comparator output control assembly.Wherein, The electric current that hall device 101 will flow through self is converted into corresponding voltage value; The positive input terminal of first comparator 102 and second comparator 103 is connected the output voltage anode of hall device 101 respectively; The negative input end of first comparator 102 and second comparator 103 is connected the output voltage negative terminal of hall device 101 respectively, and the negative input end of first comparator 102 inserts first voltage reference (V1), and the negative input end of second comparator 103 inserts second voltage reference (V2); The output of first comparator 102 and second comparator 103 is connected the input of comparator output control assembly respectively.When the electric current that flows through hall device 101 increases gradually, to such an extent as to the magnitude of voltage of hall device 101 outputs during greater than the voltage stabilizing value of voltage reference, comparator can be exported high level, and indication has overcurrent to take place.
Need to prove that voltage reference can adopt common reference data, also can use the high accuracy band-gap reference, the concrete mode of inserting voltage reference is: the negative input end of reference voltage being introduced comparator gets final product.
As shown in Figure 4, V1 and V2 are inserted into the negative input end of first comparator 102 and second comparator 103 respectively, through adjusting the magnitude of voltage of V1 and V2, cooperate with the conversion coefficient α of hall device 101 two flow point OC1 and OC2 excessively can be set, that is:
OC1＝V1/α，OC2＝V2/α
Further; Comparator output control assembly comprises: delay circuit 104, tristate buffer (BUFFER) 105 and reverse tristate buffer 106; Wherein, Delay circuit 104 connects the control end of tristate buffer 105 and reverse tristate buffer 106 respectively, and the input of reverse tristate buffer 106 connects the output of first comparator 102, and the input of tristate buffer 105 connects the output of second comparator 103; The output of tristate buffer 105 and reverse tristate buffer 106 is connected the electrical chip of using of power module power supply respectively.
Preferable, delay circuit can further comprise interconnective timing bench and output signal controlling assembly (not shown), the output of said output signal controlling assembly connects the control end of tristate buffer 105 and reverse tristate buffer 106.
When the input voltage of power module reaches under-voltage protection (UVLO) point; Delay circuit 104 picks up counting; And this moment, delay circuit 104 was output as low level, enabled to be high level through reverse tristate buffer 106 like this, and enabled to be low level through tristate buffer 105; At this moment, the output signal of first comparator 102 can effectively output to the Enable Pin with electrical chip, and the output signal of second comparator 103 can't effectively output to the Enable Pin with electrical chip, and the mistake flow point of power module is OC1;
When the timing time of delay circuit 104 reached, it was output as high level, enabled to be low level through reverse tristate buffer 106 like this, and enabled to be high level through tristate buffer 105; At this moment, the output signal of second comparator 103 can effectively output to the Enable Pin with electrical chip, and the output signal of first comparator 102 can't effectively output to the Enable Pin with electrical chip, and the mistake flow point of power module is OC2.
Need to prove that it is a value that the retention time T among the utility model embodiment can fixedly install, and can certainly carry out outer setting through RC delay circuit or other devices.
In addition; Also there is a kind of replacement scheme in the embodiment of the utility model; That is: power on this time period of T from power module; Just script is not provided with overcurrent protection by the time period that OC1 plays overcurrent protection, and at T flow point being set after the time period is OC2, and this also can reach effect same as the previously described embodiments.Overcurrent protection is not set also to be appreciated that to OC1 and to be set to infinity or enough big (the surge current needs that satisfy in the practical application get final product); On concrete the realization; Value that can be through adjustment V1, or the output voltage negative terminal of the negative input end that directly breaks off first comparator 102 and hall device 101 between be connected, or the output voltage anode of the positive input terminal of direct disconnection first comparator 102 and hall device 101 between be connected, realize.
In sum, the utility model can effectively reduce the requirement of large-scale IC chip for power module output current (or power), thereby reduces shared cost and the space of power module in the electronic system.
The above is merely the preferred embodiment of the utility model, is not the protection range that is used to limit the utility model.
Claims (7)
1. a power module is characterized in that, comprising: hall device, first comparator, second comparator and comparator output control assembly, wherein,
The positive input terminal of said first comparator and second comparator is connected the output voltage anode of said hall device respectively; The negative input end of said first comparator and second comparator is connected the output voltage negative terminal of said hall device respectively; And the negative input end of said first comparator inserts first voltage reference, and the negative input end of second comparator inserts second voltage reference;
The output of said first comparator and second comparator is connected the input of said comparator output control assembly respectively.
2. according to the said power module of claim 1, it is characterized in that said comparator output control assembly comprises: delay circuit, tristate buffer and reverse tristate buffer, wherein,
Said delay circuit connects the control end of said tristate buffer and reverse tristate buffer respectively; The input of said reverse tristate buffer connects the output of said first comparator, and the input of said tristate buffer connects the output of said second comparator.
3. according to the said power module of claim 2, it is characterized in that the output of said tristate buffer and reverse tristate buffer is connected the electrical chip of using of said power module power supply respectively.
4. according to claim 2 or 3 said power modules; It is characterized in that; Said delay circuit comprises interconnective timing bench and output signal controlling assembly, and the output of said output signal controlling assembly connects the control end of said tristate buffer and reverse tristate buffer.
5. an electric power system is characterized in that, this system comprises interconnective power module and use electrical chip, wherein,
Said power module comprises: hall device, first comparator, second comparator and comparator output control assembly; The positive input terminal of said first comparator and second comparator is connected the output voltage anode of said hall device respectively; The negative input end of said first comparator and second comparator is connected the output voltage negative terminal of said hall device respectively; And the negative input end of said first comparator inserts first voltage reference, and the negative input end of second comparator inserts second voltage reference; The output of said first comparator and second comparator is connected the input of said comparator output control assembly respectively; The output of said comparator output control assembly connects the said electrical chip of using.
6. according to the said electric power system of claim 5, it is characterized in that said comparator output control assembly comprises: delay circuit, tristate buffer and reverse tristate buffer, wherein,
Said delay circuit connects the control end of said tristate buffer and reverse tristate buffer respectively; The input of said reverse tristate buffer connects the output of said first comparator, and the input of said tristate buffer connects the output of said second comparator;
Said tristate buffer is connected the said electrical chip of using respectively with the output of reverse tristate buffer.
7. according to the said electric power system of claim 6; It is characterized in that; Said delay circuit comprises interconnective timing bench and output signal controlling assembly, and the output of said output signal controlling assembly connects the control end of said tristate buffer and reverse tristate buffer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011202597767U CN202160099U (en) | 2011-07-21 | 2011-07-21 | Power module and power supply system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011202597767U CN202160099U (en) | 2011-07-21 | 2011-07-21 | Power module and power supply system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202160099U true CN202160099U (en) | 2012-03-07 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011202597767U Expired - Fee Related CN202160099U (en) | 2011-07-21 | 2011-07-21 | Power module and power supply system |
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|---|---|
| CN (1) | CN202160099U (en) |
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2011
- 2011-07-21 CN CN2011202597767U patent/CN202160099U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120307 Termination date: 20190721 |
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| CF01 | Termination of patent right due to non-payment of annual fee |