CN202126685U - Communication interface circuit for two-bus - Google Patents
Communication interface circuit for two-bus Download PDFInfo
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- CN202126685U CN202126685U CN2011201589369U CN201120158936U CN202126685U CN 202126685 U CN202126685 U CN 202126685U CN 2011201589369 U CN2011201589369 U CN 2011201589369U CN 201120158936 U CN201120158936 U CN 201120158936U CN 202126685 U CN202126685 U CN 202126685U
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Abstract
The utility model relates to the technical field of two-bus communication. The communication interface circuit for two-bus comprises a master machine unit and a plurality of slave machine units. The master machine unit is connected with the slave machine units through two core lines. The master machine unit comprises a micro-controller processing circuit, a communication signal sending circuit, a communication signal receiving circuit, a communication line protecting circuit and a communication line power supply. The slave machine unit comprises a polarity inversion circuit, a voltage-stabilized source, a communication signal receiving circuit, a communication signal sending circuit, a micro-controller processing unit and a sensing signal collecting circuit. By arranging common mode, differential mode and over-current protecting circuit through the two core line of the master machine unit, for lightning stroke or other power lines entering, the utility model is able to guarantee that the communication node devices are safe. The transmission quality of the communication signal is improved by improving the detail of the communication signal receiving circuit and the communication signal sending circuit of the master and slave machine units.
Description
Technical field
The utility model relates to the two line communication technical field, relates in particular to a kind of two line communication interface circuit.
Background technology
In the field that need implement data acquisition and monitoring to dispersed and distributed in the various environmental variances of diverse location; The normal transmission of adopting the two line communication technology to communicate data; Because of the distance between each position of the site environment of needs collection and monitoring when distant, the communication mode of two buses can greatly practice thrift communication wiring this.In addition, for practicing thrift the communication wires cost, the power supply that dispersion is arranged at each data acquisition unit of the on-the-spot diverse location of data acquisition also is to be concentrated by data collection host through the cable of two buses to provide.
And existing two line communication scheme still has following weak point: 1, and normally outside run and wiring distance are far away for two heart yearns of communication wire rod, to sealing in of thunderbolt or other power circuit, can not guarantee the safety of each communication node equipment; 2; The signal of communication of existing data acquisition unit and data collection host sends and to accept Design of Interface Circuit comparatively simple and crude; Make that its communication signal transmission is of low quality, its channel capacity is difficult to realize the signal transmission about 2000 meters and support the number of data acquisition unit also to be difficult to reach 200.3, each data acquisition unit power supply is by externally fed, and its material and cost of labor are high, especially in the difficult place of power supply.
Summary of the invention
To the deficiency of prior art scheme, the utility model proposes a kind of two line communication interface circuit that has improved channel capacity and device security.
The technical scheme that the utility model adopts is following:
A kind of two line communication interface circuit comprises: a main computer unit and a plurality of appendent computer system, and described main computer unit connects each appendent computer system through two heart yearns, wherein:
Described main computer unit comprises: microcontroller treatment circuit, signal of communication transtation mission circuit, signal of communication receiving circuit, communication line holding circuit and communication line power supply source; Wherein, The sign indicating number level output end mouth of the said microcontroller treatment circuit of input termination of described signal of communication transtation mission circuit; The described communication line power supply source of its output terminal one termination; The other end is connected to first of said two heart yearns; Second of said two heart yearns of input termination of described signal of communication receiving circuit, the sign indicating number level input end of the said microcontroller treatment circuit of its output termination, described communication line holding circuit is common mode, differential mode holding circuit and the current foldback circuit that is connected on said two heart yearns;
Described appendent computer system comprises: polarity transformation circuits, stabilized voltage supply, signal of communication receiving circuit, signal of communication transtation mission circuit, microcontroller treatment circuit and transducing signal Acquisition Circuit; Wherein, Two of said two heart yearns of input termination of described polarity transformation circuits; The negativing ending grounding of its output; The anode of its output is connected in parallel with the input end of said mu balanced circuit, the output terminal of signal of communication transtation mission circuit and the input end of signal of communication receiving circuit respectively; The coded signal output terminal of the said microcontroller treatment circuit of input termination of said signal of communication transtation mission circuit, the coded signal input end of the said microcontroller treatment circuit of output termination of said signal of communication receiving circuit, described transducing signal Acquisition Circuit output terminal is connected to the data acquisition port of said microcontroller treatment circuit.
Further; The signal of communication transtation mission circuit of said main computer unit; Comprise: sign indicating number shaping circuit and power signal output circuit, described sign indicating number shaping circuit is a schmidt trigger circuit, described power signal output circuit is a metal-oxide-semiconductor on-off circuit; The coded signal output terminal of the input termination microcontroller treatment circuit of said schmidt trigger circuit; The input end of the said metal-oxide-semiconductor on-off circuit of its output termination, the described communication line power supply source of a termination of the source electrode of the metal-oxide-semiconductor of this metal-oxide-semiconductor on-off circuit and drain electrode, the other end is connected to first of said two heart yearns.
Further; The metal-oxide-semiconductor on-off circuit of said power signal output circuit also comprises a MOS switch tube voltage clamping circuit, and this MOS switch tube voltage clamping circuit comprises: Darlington triode Q5, voltage stabilizing diode D2, diode D3 and resistance R 5; Wherein, The emitter of said Darlington triode Q5 is connected to the drain electrode of metal-oxide-semiconductor in the said metal-oxide-semiconductor on-off circuit, and its emitter is connected to the source class of said metal-oxide-semiconductor through diode D3, and its base stage is through resistance R 5 ground connection; The positive pole of described voltage stabilizing diode D2 connects the collector of Darlington triode Q5, and its negative pole connects the base stage of Darlington triode Q5.
Further; The signal of communication transtation mission circuit of said main computer unit; Also comprise a metal-oxide-semiconductor on-off circuit; The signal of communication transtation mission circuit switch control end of the said microcontroller treatment circuit of control termination of this metal-oxide-semiconductor on-off circuit, the output terminal of the source class of its metal-oxide-semiconductor and the said signal of communication transtation mission circuit of drain electrode one termination, the other end is connected to described communication line power supply source.
Further; The signal of communication receiving circuit of said main computer unit comprises: resistance sampling circuit, signal amplification circuit, signal discrimination circuit and signal transformation circuit; Wherein, Second of said two heart yearns of input termination of described resistance sampling circuit, the input end of the said signal amplification circuit of its output termination, the input end of the said signal discrimination circuit of output termination of this signal amplification circuit; The input end of the said signal transformation circuit of output termination of this signal discrimination circuit, the sign indicating number level input port of the said microcontroller treatment circuit of output termination of this signal transformation circuit.
Further; The signal of communication receiving circuit of said main computer unit also comprises a metal-oxide-semiconductor on-off circuit; The signal of communication receiving circuit switch control end of the said microcontroller treatment circuit of control termination of this metal-oxide-semiconductor on-off circuit; The source class of its metal-oxide-semiconductor and drain electrode one termination said two heart yearns second, the input end of the said resistance sampling circuit of another termination.
Further, the current foldback circuit of said communication line holding circuit comprises: triode Q6-Q7, diode D6-D7, resistance R 6-R12, capacitor C 1; Wherein, Described resistance R 7 is connected in series in first of said two heart yearns, and the base stage of described triode Q6 connects an end of said resistance R 7 through resistance R 6, and the emitter of this triode connects the other end of said resistance R 7; Connect an end of said capacitor C 1 behind its collector series resistance R8, the diode D6; Connect the positive pole of said diode D6 after another series connection described diode D7, diode D8 and resistance R 12 of said two heart yearns, the other end ground connection of said capacitor C 1, the base stage of said triode Q7 connects an end of said capacitor C 1 through resistance R 9; Its grounded emitter; Its collector is connected to power supply source through resistance R 11, and said resistance R 10 is connected in base stage and the emitter of triode Q7, and the collector of this triode connects the over-current signal input end of said microcontroller treatment circuit.
Further, the polarity transformation circuits of said appendent computer system is a rectifier bridge.
Further; The signal of communication transtation mission circuit of said appendent computer system comprises: triode Q8, resistance R 13-R15, diode D8, capacitor C 2; The collector of wherein said triode Q8 connects the output plus terminal of said polarity transformation circuits through resistance R 13; Its grounded emitter; Its base stage is connected and is connect the coded signal output terminal of said microcontroller treatment circuit after described diode D8, the resistance R 14, and described capacitor C 2 is connected in the two ends of resistance R 14, and said resistance R 15 is connected in base stage and the emitter of triode Q8.
Further; The signal of communication receiving circuit of said appendent computer system comprises: capacitor C 3-C4, resistance R 16-R19, diode D9, triode Q9; Wherein, connect successively described resistance R 16 and capacitor C 4 back ground connection of the collector of triode Q8 in the said signal of communication transtation mission circuit of a termination of said capacitor C 3, the other end; The tie point of this resistance R 16 and capacitor C 4 connects the base stage of said triode Q9 and connects power supply source through resistance R 17; Said diode D9 is connected in the two ends of resistance R 17, the grounded emitter of said triode Q9, and its collector connects power supply source through resistance R 10 and connects the coded signal input end of said microcontroller treatment circuit through resistance R 19.
The utility model is through adopting technique scheme; The beneficial effect that has is: 1; Two heart yearns through at main computer unit are provided with common mode, differential mode and current foldback circuit, to sealing in of thunderbolt or other power circuit, also can guarantee the safety of each communication node equipment; 2; Through improvement project to the signal of communication receiving circuit and the signal of communication transtation mission circuit of main computer unit and appendent computer system; Improved the communication signal transmission quality, its channel capacity can realize that 2000 meters the distant signal transmission and the number of its support data acquisition unit also can reach 200.
Description of drawings
Fig. 1 is the circuit theory diagrams of the utility model one preferred embodiment.
Embodiment
Combine accompanying drawing and embodiment that the utility model is further specified at present.
The two line communication interface circuit of the utility model shown in accompanying drawing 1 comprises: a main computer unit 1 and a plurality of appendent computer systems 2, and described main computer unit 1 is connected each appendent computer system 2 through two heart yearn L+ with L-, wherein:
Described main computer unit 1 comprises: microcontroller treatment circuit 101, signal of communication transtation mission circuit 102, signal of communication receiving circuit 103, communication line holding circuit 104 and communication line power supply source 105; Wherein, The sign indicating number level output end mouth of the said microcontroller treatment circuit 101 of input termination of described signal of communication transtation mission circuit 102; The described communication line power supply source 105 of its output terminal one termination; The other end is connected to first heart yearn L+ of said two heart yearns; Second heart yearn L-of said two heart yearns of input termination of described signal of communication receiving circuit 103, the sign indicating number level input end of the said microcontroller treatment circuit 101 of its output termination, described communication line holding circuit 104 is common mode, differential mode holding circuit and the current foldback circuit 104A that are connected on said two heart yearns.
Described appendent computer system 2 comprises: polarity transformation circuits 201, stabilized voltage supply 202, signal of communication receiving circuit 203, signal of communication transtation mission circuit 204, microcontroller treatment circuit 205 and transducing signal Acquisition Circuit 206; Wherein, Two of said two heart yearn L+ of the input termination of described polarity transformation circuits 201 and L-; The negativing ending grounding of its output; The anode of its output is connected in parallel with the input end of said mu balanced circuit 202, the output terminal of signal of communication transtation mission circuit 204 and the input end of signal of communication receiving circuit 203 respectively; The coded signal output terminal of the said microcontroller treatment circuit 205 of input termination of said signal of communication transtation mission circuit 204; The coded signal input end of the said microcontroller treatment circuit 205 of output termination of said signal of communication receiving circuit 203, described transducing signal Acquisition Circuit 206 output terminals are connected to the data acquisition port of said microcontroller treatment circuit 205.
Further; The signal of communication transtation mission circuit 102 of said main computer unit 1; Comprise: sign indicating number shaping circuit and power signal output circuit, described sign indicating number shaping circuit is a schmidt trigger circuit, described power signal output circuit is a metal-oxide-semiconductor on-off circuit; The coded signal output terminal of the input termination microcontroller treatment circuit 101 of said schmidt trigger circuit; The input end of the said metal-oxide-semiconductor on-off circuit of its output termination, the described communication line power supply source 105 of a termination of the source electrode of the metal-oxide-semiconductor of this metal-oxide-semiconductor on-off circuit and drain electrode, the other end are connected to first heart yearn L+ of said two heart yearns.
Further; The metal-oxide-semiconductor on-off circuit of said power signal output circuit also comprises a MOS switch tube voltage clamping circuit 102A, and this MOS switch tube voltage clamping circuit 102A comprises: Darlington triode Q5, voltage stabilizing diode D2, diode D3 and resistance R 5; Wherein, The emitter of said Darlington triode Q5 is connected to the drain electrode of metal-oxide-semiconductor in the said metal-oxide-semiconductor on-off circuit, and its emitter is connected to the source class of said metal-oxide-semiconductor through diode D3, and its base stage is through resistance R 5 ground connection; The positive pole of described voltage stabilizing diode D2 connects the collector of Darlington triode Q5, and its negative pole connects the base stage of Darlington triode Q5.
Further; The signal of communication transtation mission circuit 102 of said main computer unit 1; Also comprise an on-off circuit 102B, this on-off circuit 102B is a metal-oxide-semiconductor on-off circuit, the signal of communication transtation mission circuit switch control end of the said microcontroller treatment circuit 101 of control termination of this metal-oxide-semiconductor on-off circuit; The output terminal of the source class of its metal-oxide-semiconductor and the said signal of communication transtation mission circuit 102 of drain electrode one termination, the other end is connected to described communication line power supply source 105.
Further; The signal of communication receiving circuit 103 of said main computer unit 1 comprises: resistance sampling circuit, signal amplification circuit, signal discrimination circuit and signal transformation circuit; Wherein, Second heart yearn L-of said two heart yearns of input termination of described resistance sampling circuit, the input end of the said signal amplification circuit of its output termination, the input end of the said signal discrimination circuit of output termination of this signal amplification circuit; The input end of the said signal transformation circuit of output termination of this signal discrimination circuit, the sign indicating number level input port of the said microcontroller treatment circuit 101 of output termination of this signal transformation circuit.
Further; The signal of communication receiving circuit of said main computer unit 1 also comprises a metal-oxide-semiconductor on-off circuit 103B; The signal of communication receiving circuit switch control end of the said microcontroller treatment circuit 101 of control termination of this metal-oxide-semiconductor on-off circuit 103B; Second heart yearn L-of the source class of its metal-oxide-semiconductor and said two heart yearns of drain electrode one termination, the input end of the said resistance sampling circuit of another termination.
Further, the current foldback circuit 104A of said communication line holding circuit comprises: triode Q6-Q7, diode D6-D7, resistance R 6-R12, capacitor C 1; Wherein, Described resistance R 7 is connected in series in first heart yearn L+ of said two heart yearns, and the base stage of described triode Q6 connects an end of said resistance R 7 through resistance R 6, and the emitter of this triode connects the other end of said resistance R 7; Connect an end of said capacitor C 1 behind its collector series resistance R8, the diode D6; Another L-of said two heart yearns connects and connects the positive pole of said diode D6 after described diode D7, diode D8 and the resistance R 12, the other end ground connection of said capacitor C 1, and the base stage of said triode Q7 connects an end of said capacitor C 1 through resistance R 9; Its grounded emitter; Its collector is connected to the power supply source of 5V through resistance R 11, and said resistance R 10 is connected in base stage and the emitter of triode Q7, and the collector of this triode connects the over-current signal input end of said microcontroller treatment circuit 101.
Further, the polarity transformation circuits 201 of said appendent computer system 2 is rectifier bridges.
Further; The signal of communication transtation mission circuit 204 of said appendent computer system 2 comprises: triode Q8, resistance R 13-R15, diode D8, capacitor C 2; The collector of wherein said triode Q8 connects the output plus terminal of said polarity transformation circuits 201 through resistance R 13; Its grounded emitter; Its base stage is connected and is connect the coded signal output terminal of said microcontroller treatment circuit 205 after described diode D8, the resistance R 14, and described capacitor C 2 is connected in the two ends of resistance R 14, and said resistance R 15 is connected in base stage and the emitter of triode Q8.
Further; The signal of communication receiving circuit 203 of said appendent computer system 2 comprises: capacitor C 3-C4, resistance R 16-R19, diode D9, triode Q9; Wherein, The collector of triode Q8 in the said signal of communication transtation mission circuit 204 of one termination of said capacitor C 3; The other end connect successively described resistance R 16 and capacitor C 4 back ground connection, the tie point of this resistance R 16 and capacitor C 4 connects the base stage of said triode Q9 and connects power supply source through resistance R 17, and said diode D9 is connected in the two ends of resistance R 17; The grounded emitter of said triode Q9, its collector connect power supply source through resistance R 10 and connect the coded signal input end of said microcontroller treatment circuit 205 through resistance R 19.
Fusing type fuse F1, F2 and resettable fuse F3 in this two line communication interface circuit are over-current protection device, and the overcurrent of common mode voltage differential mode voltage is shielded.T1, T2, T3 are that glass discharge vessel is carried out clamp to high-voltage signal; D12, D13, D14 are that two-way TVS pipe carries out clamp to the low-voltage signal that transfinites, and R23 is a voltage dependent resistor (VDR), and R20, R27, R47 are current-limiting resistance; R7 is the current sense resistor of chip L+; When electric current surpassed 1A, triode Q6 output voltage was to triode Q7, and triode Q7 conducting output low level is to the test side P0.2 of single-chip microcomputer U8; The defeated low level of the P0.4 of single-chip microcomputer is turn-offed heart yearn L+ output to triode Q3 through becoming high level control Q4 (IRF9530) after the triode Q3 anti-phase.R26 for the signal and the sampling resistor current, when the current exceeds 1A, the output voltage is clamped by the diode D7 and sent transistor Q7, transistor Q7 turns on the output low-to-end test chip U8 P0.2, MCU P0. 3 output high to three tube Q13, control Q12 (IRF630) L-off wire output.When overcurrent turn-offed self-insurance, single-chip microcomputer whenever broke 5 milliseconds at a distance from 2 seconds switches, and detect overcurrent and whether disappear, when overcurrent disappears, the output of two bus recoveries.The data that the single-chip microcomputer of microcontroller treatment circuit 101 sends form pulse signal through the break-make of U2B74HC14 and triode Q1 control triode Q2 (IRF9530).Triode Q5 output voltage is approximately VDD-5V, merges through isolating diode D3 and pulse signal, is formed on the pulse signal on the VDD-5V.In order to improve the voltage to the transducing signal Acquisition Circuit, triode Q2 conducting output supply voltage VDD gives the transducing signal Acquisition Circuit when not sending out data.After removing the sampling resistor R26 pulse current signal by the blocking capacitor C13 to the op amp U2, U3, after two noninverting op amp comparator U4 after entering a pulse signal, and then through the 74HC14 chip microcontroller U5 to U8 after shaping The P0.0 decoding.
Although specifically show and introduced the utility model in conjunction with preferred embodiment; But the those skilled in the art should be understood that; In the spirit and scope of the utility model that does not break away from appended claims and limited; Can make various variations to the utility model in form with on the details, be the protection domain of the utility model.
Claims (10)
1. two line communication interface circuit comprises: a main computer unit and a plurality of appendent computer system, and described main computer unit connects each appendent computer system through two heart yearns, it is characterized in that:
Described main computer unit comprises: microcontroller treatment circuit, signal of communication transtation mission circuit, signal of communication receiving circuit, communication line holding circuit and communication line power supply source; Wherein, The sign indicating number level output end mouth of the said microcontroller treatment circuit of input termination of described signal of communication transtation mission circuit; The described communication line power supply source of its output terminal one termination; The other end is connected to first of said two heart yearns; Second of said two heart yearns of input termination of described signal of communication receiving circuit, the sign indicating number level input end of the said microcontroller treatment circuit of its output termination, described communication line holding circuit is common mode, differential mode holding circuit and the current foldback circuit that is connected on said two heart yearns;
Described appendent computer system comprises: polarity transformation circuits, stabilized voltage supply, signal of communication receiving circuit, signal of communication transtation mission circuit, microcontroller treatment circuit and transducing signal Acquisition Circuit; Wherein, Two of said two heart yearns of input termination of described polarity transformation circuits; The negativing ending grounding of its output; The anode of its output is connected in parallel with the input end of said mu balanced circuit, the output terminal of signal of communication transtation mission circuit and the input end of signal of communication receiving circuit respectively; The coded signal output terminal of the said microcontroller treatment circuit of input termination of said signal of communication transtation mission circuit, the coded signal input end of the said microcontroller treatment circuit of output termination of said signal of communication receiving circuit, described transducing signal Acquisition Circuit output terminal is connected to the data acquisition port of said microcontroller treatment circuit.
2. two line communication interface circuit as claimed in claim 1; It is characterized in that: the signal of communication transtation mission circuit of said main computer unit; Comprise: sign indicating number shaping circuit and power signal output circuit, described sign indicating number shaping circuit is a schmidt trigger circuit, described power signal output circuit is a metal-oxide-semiconductor on-off circuit; The coded signal output terminal of the input termination microcontroller treatment circuit of said schmidt trigger circuit; The input end of the said metal-oxide-semiconductor on-off circuit of its output termination, the described communication line power supply source of a termination of the source electrode of the metal-oxide-semiconductor of this metal-oxide-semiconductor on-off circuit and drain electrode, the other end is connected to first of said two heart yearns.
3. two line communication interface circuit as claimed in claim 2; It is characterized in that: the metal-oxide-semiconductor on-off circuit of said power signal output circuit, also comprise a MOS switch tube voltage clamping circuit, this MOS switch tube voltage clamping circuit comprises: Darlington triode Q5, voltage stabilizing diode D2, diode D3 and resistance R 5; Wherein, The emitter of said Darlington triode Q5 is connected to the drain electrode of metal-oxide-semiconductor in the said metal-oxide-semiconductor on-off circuit, and its emitter is connected to the source class of said metal-oxide-semiconductor through diode D3, and its base stage is through resistance R 5 ground connection; The positive pole of described voltage stabilizing diode D2 connects the collector of Darlington triode Q5, and its negative pole connects the base stage of Darlington triode Q5.
4. two line communication interface circuit as claimed in claim 1; It is characterized in that: the signal of communication transtation mission circuit of said main computer unit; Also comprise a metal-oxide-semiconductor on-off circuit; The signal of communication transtation mission circuit switch control end of the said microcontroller treatment circuit of control termination of this metal-oxide-semiconductor on-off circuit, the output terminal of the source class of its metal-oxide-semiconductor and the said signal of communication transtation mission circuit of drain electrode one termination, the other end is connected to described communication line power supply source.
5. two line communication interface circuit as claimed in claim 1; It is characterized in that: the signal of communication receiving circuit of said main computer unit comprises: resistance sampling circuit, signal amplification circuit, signal discrimination circuit and signal transformation circuit; Wherein, Second of said two heart yearns of input termination of described resistance sampling circuit, the input end of the said signal amplification circuit of its output termination, the input end of the said signal discrimination circuit of output termination of this signal amplification circuit; The input end of the said signal transformation circuit of output termination of this signal discrimination circuit, the sign indicating number level input port of the said microcontroller treatment circuit of output termination of this signal transformation circuit.
6. two line communication interface circuit as claimed in claim 5; It is characterized in that: the signal of communication receiving circuit of said main computer unit also comprises a metal-oxide-semiconductor on-off circuit; The signal of communication receiving circuit switch control end of the said microcontroller treatment circuit of control termination of this metal-oxide-semiconductor on-off circuit; The source class of its metal-oxide-semiconductor and drain electrode one termination said two heart yearns second, the input end of the said resistance sampling circuit of another termination.
7. two line communication circuit as claimed in claim 1; It is characterized in that: the current foldback circuit of said communication line holding circuit; Comprise: triode Q6-Q7, diode D6-D7, resistance R 6-R12, capacitor C 1, wherein, described resistance R 7 is connected in series in first of said two heart yearns; The base stage of described triode Q6 connects an end of said resistance R 7 through resistance R 6; The emitter of this triode connects the other end of said resistance R 7, connects an end of said capacitor C 1 behind its collector series resistance R8, the diode D6, connects the positive pole of said diode D6 after another series connection described diode D7, diode D8 and resistance R 12 of said two heart yearns; The other end ground connection of said capacitor C 1; The base stage of said triode Q7 connects an end of said capacitor C 1 through resistance R 9, its grounded emitter, and its collector is connected to power supply source through resistance R 11; Said resistance R 10 is connected in base stage and the emitter of triode Q7, and the collector of this triode connects the over-current signal input end of said microcontroller treatment circuit.
8. two line communication circuit as claimed in claim 1 is characterized in that: the polarity transformation circuits of said appendent computer system is a rectifier bridge.
9. two line communication circuit as claimed in claim 1; It is characterized in that: the signal of communication transtation mission circuit of said appendent computer system comprises: triode Q8, resistance R 13-R15, diode D8, capacitor C 2; The collector of wherein said triode Q8 connects the output plus terminal of said polarity transformation circuits through resistance R 13; Its grounded emitter; Its base stage is connected and is connect the coded signal output terminal of said microcontroller treatment circuit after described diode D8, the resistance R 14, and described capacitor C 2 is connected in the two ends of resistance R 14, and said resistance R 15 is connected in base stage and the emitter of triode Q8.
10. two line communication circuit as claimed in claim 9; It is characterized in that: the signal of communication receiving circuit of said appendent computer system comprises: capacitor C 3-C4, resistance R 16-R19, diode D9, triode Q10; Wherein, The collector of triode Q8 in the said signal of communication transtation mission circuit of one termination of said capacitor C 3; The other end connect successively described resistance R 16 and capacitor C 4 back ground connection, the tie point of this resistance R 16 and capacitor C 4 connects the base stage of said triode Q10 and connects power supply source through resistance R 17, and said diode D9 is connected in the two ends of resistance R 17; The grounded emitter of said triode Q10, its collector connect power supply source through resistance R 10 and connect the coded signal input end of said microcontroller treatment circuit through resistance R 19.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011201589369U CN202126685U (en) | 2011-05-17 | 2011-05-17 | Communication interface circuit for two-bus |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011201589369U CN202126685U (en) | 2011-05-17 | 2011-05-17 | Communication interface circuit for two-bus |
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| CN202126685U true CN202126685U (en) | 2012-01-25 |
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| CN2011201589369U Expired - Fee Related CN202126685U (en) | 2011-05-17 | 2011-05-17 | Communication interface circuit for two-bus |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102324179A (en) * | 2011-05-17 | 2012-01-18 | 福建省万华电子科技有限公司 | Two-bus communication interface circuit |
| CN104244512A (en) * | 2014-07-28 | 2014-12-24 | 李玉峰 | Boost type LED drive short circuit overload projecting circuit |
| CN105429655A (en) * | 2015-12-29 | 2016-03-23 | 踪念品 | Two-bus data transmitting circuit |
| WO2016107378A1 (en) * | 2014-12-30 | 2016-07-07 | 王玮冰 | Power supply device and control method therefor |
| CN106528481A (en) * | 2016-12-29 | 2017-03-22 | 无锡华润矽科微电子有限公司 | Discharge circuit integrated behind bus rectifier bridge at interior of slave chip |
| CN107180002A (en) * | 2016-03-10 | 2017-09-19 | 北京纳衡仪器仪表有限公司 | It is a kind of to use two line simultaneous transmission information and the circuit of power supply |
| CN111009109A (en) * | 2019-12-26 | 2020-04-14 | 深圳市创仁科技有限公司 | M-BUS receiving circuit and 4G water meter collector based on M-BUS |
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2011
- 2011-05-17 CN CN2011201589369U patent/CN202126685U/en not_active Expired - Fee Related
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102324179A (en) * | 2011-05-17 | 2012-01-18 | 福建省万华电子科技有限公司 | Two-bus communication interface circuit |
| CN104244512A (en) * | 2014-07-28 | 2014-12-24 | 李玉峰 | Boost type LED drive short circuit overload projecting circuit |
| WO2016107378A1 (en) * | 2014-12-30 | 2016-07-07 | 王玮冰 | Power supply device and control method therefor |
| CN105429655A (en) * | 2015-12-29 | 2016-03-23 | 踪念品 | Two-bus data transmitting circuit |
| CN105429655B (en) * | 2015-12-29 | 2017-09-08 | 踪念品 | A kind of two lines bus data transtation mission circuit |
| CN107180002A (en) * | 2016-03-10 | 2017-09-19 | 北京纳衡仪器仪表有限公司 | It is a kind of to use two line simultaneous transmission information and the circuit of power supply |
| CN107180002B (en) * | 2016-03-10 | 2021-08-13 | 北京纳衡仪器仪表有限公司 | Circuit for simultaneously transmitting information and power supply by using two lines |
| CN106528481A (en) * | 2016-12-29 | 2017-03-22 | 无锡华润矽科微电子有限公司 | Discharge circuit integrated behind bus rectifier bridge at interior of slave chip |
| CN106528481B (en) * | 2016-12-29 | 2021-10-15 | 华润微集成电路(无锡)有限公司 | Bus rectifier bridge post-discharge circuit integrated in slave chip |
| CN111009109A (en) * | 2019-12-26 | 2020-04-14 | 深圳市创仁科技有限公司 | M-BUS receiving circuit and 4G water meter collector based on M-BUS |
| CN111009109B (en) * | 2019-12-26 | 2020-10-27 | 深圳市创仁科技有限公司 | M-BUS receiving circuit and 4G water meter collector based on M-BUS |
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