CN202119911U - Circuit for reducing ultrasonic range holes - Google Patents
Circuit for reducing ultrasonic range holes Download PDFInfo
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- CN202119911U CN202119911U CN2011200928483U CN201120092848U CN202119911U CN 202119911 U CN202119911 U CN 202119911U CN 2011200928483 U CN2011200928483 U CN 2011200928483U CN 201120092848 U CN201120092848 U CN 201120092848U CN 202119911 U CN202119911 U CN 202119911U
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Abstract
A circuit for reducing ultrasonic range holes comprises a CPU (central processing unit) controller, an ultrasonic transmitting sensor, an ultrasonic receiving sensor, an ultrasonic transmission driving circuit, an ultrasonic transmission smearing suppression circuit, an ultrasonic receiving circuit, an ultrasonic receiving sensor and a power supply circuit, wherein the smearing suppression circuit in an ultrasonic transmitting circuit consists of an optical-isolation SCR (silicon controlled rectifier) and a control circuit thereof, the ultrasonic receiving circuit outputs signals through a secondary amplifying circuit, a band-pass filter circuit, a voltage comparison circuit and a signal locking circuit to the CPU controller. A central frequency parameter of a band-pass filter of the receiving circuit is set to 40KHz, a voltage comparer is capable of comparing potential adjustment through a potentiometer, and the signal locking circuit is capable of locking supersonic return signals. By the aid of the technology, the smearing length of ultrasonic transmission can be decreased so that the measuring holes are reduced, other interference signals except for 40KHz can be filtered so that measuring sensitivity is improved and measuring precision is enhanced, and the two common ultrasonic sensors are used so that service cost is reduced.
Description
Technical field
The utility model relates to a kind of circuit that reduces the ultrasonic ranging blind area, is mainly used in when utilizing the range finding of ultrasonic echo principle, to reduce its measurement blind area.
Background technology
Along with the development of technology, people are more and more for the needs that use ultrasonic ranging.When utilizing the range finding of ultrasonic echo principle, because the conditions of streaking of transmitted wave exists, causing and measuring the blind area is fixing the existence.
At present, reduce the ultrasonic ranging blind area two methods are arranged.One is to reduce emissive power.But, reducing ultrasonic emitting power, ultrasonic echo will die down, and influences measuring distance; Another method is the measurement sensitivity that improves ultrasonic sensor, and the inhibition remained shock that adopts appropriate measures reduces hangover.But the sensitivity that improves ultrasonic sensor can cause the cost geometric series of ultrasonic sensor to increase.
Summary of the invention
The utility model technical matters to be solved is; Overcome the problem that exists in the prior art; A kind of circuit that reduces the ultrasonic ranging blind area is provided, and this circuit design can effectively reduce the ultrasonic emitting hangover, improves the ultrasound wave receiving sensitivity; Reduce the ultrasonic measurement blind area to greatest extent, reduce use cost.
For the technical scheme that addresses the above problem the utility model is such:
A kind of circuit that reduces the ultrasonic ranging blind area comprises cpu controller, ultrasonic emitting sensor, ultrasound wave receiving sensor, ultrasonic transmit circuit, ultrasound wave receiving circuit and power-supplying circuit.Cpu controller drives ultrasonic emitting sensor emission ultrasound wave through ultrasonic transmit circuit; Ultrasonic transmit circuit is by the primary coil of cpu controller all transformers in triode driving emission; In the secondary coil of all transformers suppress circuit with hangover and be connected, and be connected to the ultrasonic emitting sensor.
This hangover suppresses circuit and is made up of photoelectricity isolation SCR and control circuit thereof.
The ultrasound wave receiving sensor is connected with the ultrasound wave receiving circuit; The ultrasound wave receiving circuit is through 2 grades of amplifying circuits; Bandwidth-limited circuit; Voltage comparator circuit, the output signal is to the signal lock circuit of being made up of the R-S trigger, and the output terminal of this signal lock circuit links to each other with the external interrupt pin of cpu controller.
The center-frequency parameters of bandwidth-limited circuit is set to 40KHZ in this receiving circuit, and voltage comparator can compare current potential through potentiometer and regulate, and signal lock circuit can lock hyperacoustic echoed signal.
Beneficial effect, the described technology of the utility model can reduce the hangover length of ultrasonic emitting, measures the blind area thereby reduce; Other undesired signals beyond the filtering 40KHZ improve and measure sensitivity, increase measuring accuracy; Use 2 common ultrasonic sensors, use cost is lower.
Description of drawings
Specify the utility model below in conjunction with accompanying drawing and embodiment.
Fig. 1 is the described ultrasonic ranging circuit of a utility model one-piece construction synoptic diagram.
Fig. 2 is the ultrasonic transmit circuit synoptic diagram among Fig. 1.
Fig. 3 is the ultrasound wave receiving circuit synoptic diagram among Fig. 1.
Fig. 4 is the signal lock circuit synoptic diagram among Fig. 1.
Fig. 5 is for using the ultrasound wave conditions of streaking comparison diagram of this circuit front and back.
Embodiment
For technological means, creation characteristic that the utility model is realized, reach purpose and be easy to understand understanding with effect, below in conjunction with concrete diagram, further set forth the utility model.
As shown in Figure 1; The utility model designs by cpu controller, ultrasonic emitting sensor, the ultrasound wave receiving sensor, and ultrasonic emitting driving circuit, ultrasonic emitting hangover suppress circuit; Ultrasound wave receiving circuit, ultrasound wave receive signal lock circuit and power-supplying circuit is formed.
Its principle of work is: ultrasonic transmit circuit drives ultrasonic emitting sensor emission ultrasound wave, and ultrasound wave runs into the barrier reflection, forms ultrasonic echo, and this echoed signal is received by the ultrasound wave receiving sensor.The ultrasound wave receiving sensor is connected with the ultrasound wave receiving circuit, and the signal output part of ultrasound wave receiving circuit links to each other with the external interrupt pin of cpu controller.
As shown in Figure 2, cpu controller drives ultrasonic emitting sensor emission ultrasound wave through ultrasonic transmit circuit.Wherein, ultrasonic transmit circuit is by the primary coil of cpu controller all transformers in triode driving emission, and the secondary coil of middle all transformers suppresses circuit with hangover and is connected, and is connected to the ultrasonic emitting sensor.
Cpu controller is that one or more dutycycles of 40KHZ are 50% pulse signal through P1.1 pin output frequency, and pulse signal is via resistance R 2, capacitor C 1, the driving circuit that NPN type triode Q1 forms, the primary coil of all transformer T2 in the driving.In the primary coil of all transformer T2 be connected to power supply VCC through current-limiting resistance R1 and flat wave capacitor E1.In the secondary coil both positive and negative polarity of all transformer T2 connect the both positive and negative polarity of ultrasonic emitting sensor LS1 respectively.In all transformer T2 be used to improve the emission voltage of ultrasonic emitting sensor LS1, and make transmitted waveform as much as possible near sinusoidal wave.
In suppress circuit with hangover during the secondary coil positive and negative electrodes in same of all transformer T2 and link to each other.Hangover suppresses circuit by current-limiting resistance R3, power resistor R4, and current-limiting resistance R5, NPN type triode Q2, photoelectricity is isolated SCR U1 and is formed.Under the control of the P1.2 of cpu controller pin, during operate as normal, photoelectricity is isolated SCR U1 and is in not on-state, the secondary coil circuit of all transformer T2 in can not influencing; Having launched one or more dutycycles through P1.1 at cpu controller is after 50% frequency is the waveform of 40KHZ; Cpu controller is through P1.2 output signal; Through resistance R 5 and triode Q2; Drive photoelectricity isolation SCR U1 and be in conducting state, remaining hangover oscillation energy in middle all transformer T2 is consumed through resistance R 4.Change the resistance of resistance R 4, can change the ratio of damping of hangover vibration, thereby change the duration of hangover vibration.
As shown in Figure 3, the ultrasonic echo signal is after being received by ultrasound wave receiving sensor LS10, and process is by receiving conditioning circuit; 2 grades of amplifying circuits; Bandwidth-limited circuit, the ultrasound wave receiving circuit that voltage comparator circuit is formed, the output signal SIG_OUT give signal lock circuit.
In the receiving conditioning circuit part, resistance R 20, resistance R 21, capacitor C 15 is formed reference circuits, and this Voltage Reference is connected to three positive inputs of operational amplifier U10, i.e. the 3rd pin, the 5th pin and the 10th pin.The signal that ultrasound wave receiving sensor LS10 receives is a millivolt level signal, through coupling capacitance C10 and protection diode D10, and D11, the output signal is connected to the reverse input end of operational amplifier U10 in 2 grades of amplifying circuits, i.e. its 2nd pin through resistance R 13.
At 2 grades of amplifying circuits, resistance R 13, resistance R 10 is formed first order amplifying circuit with operational amplifier U10A, and its gain is A=R10/R13.Resistance R 11, resistance R 15 is formed second level amplifying circuit with operational amplifier U10B, and its gain is A=R11/R15.At the output signal of the first order amplifying circuit of U10A the 1st pin reverse input end, i.e. the 6th pin through coupling capacitance C12 and resistance R 15 concatenation operation amplifier U10B.Be connected to the resistance R 16 of bandwidth-limited circuit through coupling capacitance C13 at the output signal of the second level amplifying circuit of U10B pin.
At bandwidth-limited circuit, BPF. is by resistance R 14, resistance R 16, and resistance R 18, capacitor C 14, capacitor C 10 is formed with operational amplifier U10C.Configuration resistance R 14, resistance R 16, resistance R 18, capacitor C 14, the value of capacitor C 10 makes that this BPF. centre frequency is 40KHZ.
One end of resistance R 16 connects the output signal of 2 grades of amplifying circuits, the other end and resistance R 18, and capacitor C 10 links to each other with capacitor C 14; The other end of resistance R 18 is connected to ground GND; The other end of capacitor C 10 links to each other with an end of resistance R 12 and the 12nd pin of operational amplifier U10C; Capacitor C 14 links to each other with an end of resistance R 12 and the 9th pin of operational amplifier U10C.The output signal of bandwidth-limited circuit is connected to voltage comparator circuit through the 9th pin of operational amplifier U10C.
At voltage comparator circuit, form reverse comparer by operational amplifier U10D and variohm RP10.The output signal of bandwidth-limited circuit is connected to the reverse input end of operational amplifier U10D, i.e. the 13rd pin through resistance R 19.The resistance two ends of variohm RP10 are connected respectively to power supply VCC and ground GND, and its voltage tap is connected to the positive input of operational amplifier, i.e. the 12nd pin.The output signal SIG_OUT of voltage comparator circuit is connected to signal lock circuit through the 14th pin of operational amplifier U10D.
As shown in Figure 4,4 NAND gate circuit U2A, U2B, U2C and U2D form signal lock circuit.The output signal SIG_OUT of signal receiving circuit links to each other with the 9th pin of Sheffer stroke gate U2C; The 10th pin of Sheffer stroke gate U2C links to each other with the P1.5 pin of cpu controller; Output the 8th pin of Sheffer stroke gate U2C links to each other with the 13rd pin of Sheffer stroke gate U2D and the 1st pin of Sheffer stroke gate U2A simultaneously; The 2nd pin of Sheffer stroke gate U2A links to each other with the P1.3 pin of cpu controller; Output the 3rd pin of Sheffer stroke gate U2A is connected to the 4th pin of Sheffer stroke gate U2B; The 5th pin of Sheffer stroke gate U2B is connected to the 11st pin of Sheffer stroke gate U2D; Output the 3rd pin of Sheffer stroke gate U2B is connected to the 12nd pin of Sheffer stroke gate U2D and the P1.4 pin of cpu controller simultaneously.
But cpu controller is through P1.3 pin output signal reset signal lock-in circuit; Through P1.5 pin enable signal lock-in circuit; The output signal of signal lock circuit triggers the external interrupt of cpu controller through the P1.4 pin.
As shown in Figure 5, for using the ultrasonic emitting signal simulation result of the utility model circuit front and back.The ultrasonic pulse of 8 40KHZ of same emission, be 200us total launch time.Above waveform effect before being to use, add hangover time, amount to and be about 450us; Below the effect of a waveform after being to use, add hangover time, amount to and be about 210us.Hangover time is reduced to about 10us, reaches the purpose that reduces range hole.
More than show and described the advantage of ultimate principle, principal character and the utility model of the utility model.The technician of the industry should understand; The utility model is not restricted to the described embodiments; The principle of describing in the foregoing description and the instructions that the utility model just is described; The utility model also has various changes and modifications under the prerequisite that does not break away from the utility model spirit and scope, and these variations and improvement all fall in the utility model scope that requires protection.The utility model requires protection domain to be defined by appending claims and equivalent thereof.
Claims (4)
1. circuit that reduces the ultrasonic ranging blind area; Comprise cpu controller, ultrasonic emitting sensor, the ultrasound wave receiving sensor, ultrasonic emitting driving circuit, ultrasonic emitting hangover suppress circuit; The ultrasound wave receiving circuit, ultrasound wave receives signal lock circuit and power-supplying circuit.Wherein, Cpu controller drives ultrasonic emitting sensor emission ultrasound wave through ultrasonic transmit circuit; Ultrasonic transmit circuit is by the primary coil of cpu controller all transformers in triode driving emission; In the secondary coil of all transformers suppress circuit with hangover and be connected, and be connected to the ultrasonic emitting sensor.
2. a kind of circuit that reduces the ultrasonic ranging blind area according to claim 1 is characterized in that hangover suppresses circuit and is made up of at a distance from SCR and control circuit thereof light.
3. a kind of circuit that reduces the ultrasonic ranging blind area according to claim 1; It is characterized in that the ultrasound wave receiving sensor is connected with the ultrasound wave receiving circuit; The ultrasound wave receiving circuit is through 2 grades of amplifying circuits, bandwidth-limited circuit, voltage comparator circuit; The output signal is to the signal lock circuit of being made up of the R-S trigger, and the output terminal of this signal lock circuit links to each other with the external interrupt pin of cpu controller.
4. a kind of circuit that reduces the ultrasonic ranging blind area according to claim 1; The center-frequency parameters that it is characterized in that bandwidth-limited circuit in this receiving circuit is set to 40KHZ; Voltage comparator can compare current potential through potentiometer and regulate, and signal lock circuit can lock hyperacoustic echoed signal.
Priority Applications (1)
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CN2011200928483U CN202119911U (en) | 2011-04-01 | 2011-04-01 | Circuit for reducing ultrasonic range holes |
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CN2011200928483U CN202119911U (en) | 2011-04-01 | 2011-04-01 | Circuit for reducing ultrasonic range holes |
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CN202119911U true CN202119911U (en) | 2012-01-18 |
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CN2011200928483U Expired - Fee Related CN202119911U (en) | 2011-04-01 | 2011-04-01 | Circuit for reducing ultrasonic range holes |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102749109A (en) * | 2012-07-11 | 2012-10-24 | 浙江大学 | Aftershock energy control-based method for reducing working blind areas of ultrasonic energy transducer |
CN103391079A (en) * | 2013-07-29 | 2013-11-13 | 中国石油大学(华东) | Device for fast closing sound wave excitation signal tailing |
CN108226908A (en) * | 2017-12-26 | 2018-06-29 | 清华大学苏州汽车研究院(吴江) | A kind of ultrasonic sensor remained shock and sensitivity test method and system |
CN109597085A (en) * | 2019-01-22 | 2019-04-09 | 科瑞工业自动化系统(苏州)有限公司 | A kind of ultrasonic sensor applied to escalator |
-
2011
- 2011-04-01 CN CN2011200928483U patent/CN202119911U/en not_active Expired - Fee Related
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102749109A (en) * | 2012-07-11 | 2012-10-24 | 浙江大学 | Aftershock energy control-based method for reducing working blind areas of ultrasonic energy transducer |
CN103391079A (en) * | 2013-07-29 | 2013-11-13 | 中国石油大学(华东) | Device for fast closing sound wave excitation signal tailing |
CN108226908A (en) * | 2017-12-26 | 2018-06-29 | 清华大学苏州汽车研究院(吴江) | A kind of ultrasonic sensor remained shock and sensitivity test method and system |
CN108226908B (en) * | 2017-12-26 | 2021-10-08 | 清华大学苏州汽车研究院(吴江) | Method and system for testing residual vibration and sensitivity of ultrasonic sensor |
CN109597085A (en) * | 2019-01-22 | 2019-04-09 | 科瑞工业自动化系统(苏州)有限公司 | A kind of ultrasonic sensor applied to escalator |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120118 Termination date: 20180401 |