CN202066967U - Adder and correlator integrating device - Google Patents
Adder and correlator integrating device Download PDFInfo
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- CN202066967U CN202066967U CN2011201471494U CN201120147149U CN202066967U CN 202066967 U CN202066967 U CN 202066967U CN 2011201471494 U CN2011201471494 U CN 2011201471494U CN 201120147149 U CN201120147149 U CN 201120147149U CN 202066967 U CN202066967 U CN 202066967U
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- full adder
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Abstract
The utility model discloses an adder and correlator integrating device. The adder and correlator integrating device is provided to solve the problems that the resource utilization rate is low, the universality and the flexibility are poor, the power consumption is large and the like during the capturing process of a multi-simulation satellite receiver. The adder and correlator integrating device comprises a first full adder, a first not gate and a first AND gate, wherein a sum output end of the first full adder is connected with the input end of the first not gate, a carry output end of the first full adder and the output end of the first not gate are respectively used as two inputs of the first AND gate, and the adder and correlator integrating device also comprises four output ends, i.e. a sum output end, a carry output end, a first correlation output end and a second correlation output end. On the basis of the full adder, the adder and correlator integrating device is improved; and on the premise that the resource is not obviously increased, not only can the function of the adder can be realized, but also the capturing function can be completed through the correlation operation, so the utilization rate of the resource can be improved, the system flexibility can be increased, and the system power consumption can be reduced.
Description
Technical field
The utility model belongs to field of navigation technology, is specifically related to the capturing unit of satellite navigation receiver.
Background technology
GPS (GPS, Global Position System) receiver generally includes the catching of signal, signal carrier and sign indicating number locking, navigation message and the extraction of pseudorange and resolving of calculating and locator value to the processing of received signal.What gps system adopted is spread spectrum technic, before the band spread receiver despread-and-demodulation, must make the spreading code of receiver local recovery and carrier wave and received signal synchronously, only at code phase and carrier frequency error within the specific limits the time, detuner could operate as normal.Owing to there is the influence of the factors such as time delay, Doppler shift, multipath effect of drift, the electric wave transmission of frequency source, code phase and carrier wave can have certain uncertainty synchronously, therefore receiver must at first be caught signal, code phase and estimating carrier frequencies error be reduced in the certain limit just can offer track loop, carry out signal trace.Catching of navigation satellite signal is the first step and the key of GPS receiver signal Processing.
In spread spectrum system, direct sequence spread spectrum communication system is present most widely used spread spectrum.Resistant DS Spread Spectrum System be the information that will send with pseudorandom (PN, Pseudo-Noise) sequence extension is gone to a very wide frequency band, sends then, the radio frequency bandwidth of system is than wide many of original bandwidth.And, use the pseudo-random sequence identical to carry out relevant treatment to received signal with transmitting terminal at the receiving end of system, recover original information.The autocorrelation performance of pseudo-random sequence is very good, auto-correlation secondary lobe and cross correlation value are extremely low, therefore can realize the synchronization acquistion of frequency expansion sequence by checking the local spread spectrum code sequence that produces and the cross correlation value of the spread spectrum code sequence that receives, interfering signal power in the signal band is reduced greatly, thereby improved the output signal-to-noise ratio of system, reached jamproof purpose.Receiving end in system, what use that the pseudo-random sequence identical with transmitting terminal carry out relevant treatment to received signal is exactly correlator.
In digital computing system, adder circuit is most important basic processing unit circuit, utilizes totalizer can realize much other circuit functions such as multiplier, divider and subtracter.Though realize the design of adder circuit various ways is arranged, constitute this circuit the basis be full adder.
In receiver, especially in the multi-mode satellite receiver, can change arresting structure and persistence length at any time according to the signal to noise ratio (S/N ratio) of satellite constellation, satellite-signal and capture time etc. if catch.At present in the multimode rake receiver, most of receivers all are to use fixing structure, catch internal resource or catch with the other parts resource be not general, when trapping module did not need work, its resource was sheerly wasted.If some the time want to change persistence length, dependency structure etc. according to true environment, these all can't be realized at fixing at present receiver structure.Problems such as therefore present catching exists the utilization factor of resource low, versatility and very flexible, power consumption are big, therefore research can recombinate more and more meaningful, but still not relevant at present reconstitutable elementary cell.
The utility model content
The purpose of this utility model is that the utilization factor for the resource of the capturing unit that solves existing satellite navigation receiver is low, versatility and very flexible, problem that power consumption is big, has proposed a kind of totalizer and correlator integrated device.
The technical solution of the utility model is: a kind of totalizer and correlator integrated device, comprise first full adder, first not gate and first and door, linking to each other of first full adder with the input end of output terminal with first not gate, the carry output terminal of first full adder and the output terminal of first not gate respectively as first with the door two inputs, described totalizer and correlator integrated device comprise four output terminals, be respectively totalizer and correlator integrated device with output terminal, carry output terminal, the relevant output terminal of the first relevant output terminal with second.
Further, two the data input ends and the carry end of described first full adder are used to import the addition data that need carry out additive operation, first full adder with output terminal as totalizer and correlator integrated device and output terminal, the carry output terminal of first full adder is as the carry output terminal of totalizer and correlator integrated device;
Further, two data input ends of described first full adder are used to import one two the relevant data of needs, the carry end of first full adder is used to import one one the relevant data of needs, the data input pin of first full adder of low data that is used to import the relevant data of described one two needs is as described totalizer and the correlator one further first relevant output terminal, first with output terminal as the second relevant output terminal of described totalizer and correlator integrated device.
Equivalents as such scheme, a kind of totalizer and correlator integrated device, comprise second full adder, second not gate and first rejection gate, the carry output terminal of second full adder links to each other with the input end of second not gate, second full adder and the output terminal output terminal and second not gate are respectively as two inputs of first rejection gate, described totalizer and correlator integrated device comprise four output terminals, be respectively totalizer and correlator integrated device with output terminal, carry output terminal, the relevant output terminal of the first relevant output terminal with second.
Further, two the data input ends and the carry end of second full adder are used to import the addition data that need carry out additive operation, second full adder with output terminal as totalizer and correlator integrated device and output terminal, the carry output terminal of second full adder is as the carry output terminal of totalizer and correlator integrated device.
Further, two data input ends of second full adder are used to import one two the relevant data of needs, the carry end of second full adder is used to import one one the relevant data of needs, the data input pin of second full adder of low data that is used to import the relevant data of described one two needs is as the first relevant output terminal of described totalizer and correlator integrated device, and the output terminal of first rejection gate is as the second relevant output terminal of described totalizer and correlator integrated device.
The beneficial effects of the utility model: totalizer that the utility model proposes and correlator integrated device can be finished capturing function by related operation, simultaneously again can be by the elementary cell of additive operation as other computing.This scheme is improved on the basis of traditional full adder, in not obvious increase resource, utilize totalizer of the present utility model and correlator integrated device can finish adder functions, can finish capturing function again, in needs, can be used as the totalizer use and also can be used as the correlator use, when not needing to catch, this device can also participate in the other parts of receiver and carry out computing, improve the utilization factor of resource greatly, reduce system power dissipation, had good versatility and dirigibility.
Description of drawings
Fig. 1 is totalizer of the present utility model and correlator integrated device structural representation.
Fig. 2 is totalizer of the present utility model and correlator integrated device equivalents structural representation.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment the utility model is further elaborated.
Totalizer and correlator integrated device structure be as shown in Figure 1: a kind of totalizer and correlator integrated device, comprise the first full adder A1, the first not gate B1 and first and the door C1, the first full adder A1 links to each other with the input end of output terminal with the first not gate B1, the carry output terminal of the first full adder A1 and the output terminal of first not gate respectively as first with the door two inputs, described totalizer and correlator integrated device comprise four output terminals, be respectively totalizer and correlator integrated device and output terminal, the carry output terminal, the first relevant output terminal Out[0] relevant output terminal Out[1 with second].
When totalizer and correlator integrated device use as totalizer, two data input ends and the carry end of the first full adder A1 are used to import the addition data that need carry out additive operation, the first full adder A1 with output terminal as totalizer and correlator integrated device and output terminal, the carry output terminal of the first full adder A1 is as the carry output terminal of totalizer and correlator integrated device.
Totalizer and correlator integrated device are during as correlator, two data input ends of the first full adder A1 are used to import one two the relevant data of needs, the carry end of the first full adder A1 is used to import one one the relevant data of needs, the data input pin of first full adder of low data that is used to import the relevant data of described one two needs is as described totalizer and the correlator one further first relevant output terminal Out[0], first with the output terminal of a C1 the second relevant output terminal Out[1 as described totalizer and correlator integrated device].
As shown in Figure 2, equivalents as such scheme, a kind of totalizer and correlator integrated device, comprise the second full adder A2, the second not gate B2 and the first rejection gate C2, the carry output terminal of the second full adder A2 links to each other with the input end of the second not gate B2, the second full adder A2 and the output terminal output terminal and the second not gate B2 are respectively as two inputs of the first rejection gate C2, described totalizer and correlator integrated device comprise four output terminals, be respectively totalizer and correlator integrated device and output terminal, the carry output terminal, the first relevant output terminal Out[0] relevant output terminal Out[1 with second].
When totalizer and correlator integrated device use as totalizer, two data input ends and the carry end of the second full adder A2 are used to import the addition data that need carry out additive operation, the second full adder A2 with output terminal as totalizer and correlator integrated device and output terminal, the carry output terminal of the second full adder A2 is as the carry output terminal of totalizer and correlator integrated device.
Totalizer and correlator integrated device are during as correlator, two data input ends of the second full adder A2 are used to import one two the relevant data of needs, the carry end of the second full adder A2 is used to import one one the relevant data of needs, the data input pin of the second full adder A2 of low data that is used to import the relevant data of described one two needs is as the first relevant output terminal Out[0 of described totalizer and correlator integrated device], the output terminal of the first rejection gate C2 is as the second relevant output terminal Out[1 of described totalizer and correlator integrated device].
Totalizer and correlator integrated device are during as totalizer, and the function that realizes with conventional full-adder is identical, no longer is described in detail.
In correlator, generally adopt a PN sign indicating number to carry out relevant with two AD (related data) sign indicating number.PN sign indicating number 1 bits of encoded method: complement representation, a stet position, 1 expression-1,0 expression 1.AD dibit coding method: complement representation, 01 expression, 1,00 expression 0,11, expression-1.The local PN code correlator of the AD sign indicating number of following surface analysis 2bit and lbit is seen Out[0 by the relation of observing output and input]=AD[0], this can be left intact and get final product.Out[1] as follows with PN sign indicating number and AD sign indicating number truth table:
PN sign indicating number coding: complement representation, a stet position, 1 expression-1,0 expression 1.
AD coding: complement representation, 01 expression, 1,00 expression 0,11, expression-1.
The PN sign indicating number is as shown in table 1 with AD sign indicating number multiplied result (relevant true value).The actual value of AD val representative input data, AD[1], AD[0] represent its coding.The actual value of PN val representative input data, PN represents its coding.Out val represents the actual value of output data, Out[1], Out[0] represent its coding.
Table 1
True value after relevant is as shown in table 2, from truth table, can find, Out[1] be the carry value that all values is added up, except last three 1 situation, can see when three all be 1 the time, output should be 0, so, by adding a not gate and one and just can realize in that full adder being outside with door, also can be by adding a not gate and a rejection gate realization in that full adder is outside.
Table 2
| AD[1] | AD[0] | PN | Out[1] |
| 0 | 1 | 0 | 0 |
| 0 | 0 | 0 | 0 |
| 1 | 1 | 0 | 1 |
| 0 | 1 | 1 | 1 |
| 0 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 |
In totalizer and correlator integrated device, can export the result of addition, also can export correlated results simultaneously.Can export two kinds of results simultaneously or time division multiplex is finished different functions in obstructed occasion.In the time of the needs difference in functionality, do not need to reconfigure, only need be directly connected to corresponding ports and get final product.This device except the navigation in catch, in one spread spectrum communication, also can use.
The utility model improves on the basis of traditional full adder, in not obvious increase resource, can finish adder functions, can finish capturing function again, in needs, can be used as the totalizer use and also can be used as the correlator use, when not needing to catch, this device can also participate in the other parts of receiver and carry out computing, improve the utilization factor of resource greatly, reduced system power dissipation, have good versatility and dirigibility.
Those of ordinary skill in the art will appreciate that embodiment described here is in order to help reader understanding's principle of the present utility model, should to be understood that protection domain of the present utility model is not limited to such special statement and embodiment.Those of ordinary skill in the art can make various other various concrete distortion and combinations that do not break away from the utility model essence according to disclosed these technology enlightenments of the utility model, and these distortion and combination are still in protection domain of the present utility model.
Claims (6)
1. totalizer and correlator integrated device, it is characterized in that, comprise first full adder, first not gate and first and door, linking to each other of first full adder with the input end of output terminal with first not gate, the carry output terminal of first full adder and the output terminal of first not gate respectively as first with the door two inputs, described totalizer and correlator integrated device comprise four output terminals, be respectively totalizer and correlator integrated device with output terminal, carry output terminal, the relevant output terminal of the first relevant output terminal with second.
2. totalizer according to claim 1 and correlator integrated device, it is characterized in that, two the data input ends and the carry end of described first full adder are used to import the addition data that need carry out additive operation, first full adder with output terminal as totalizer and correlator integrated device and output terminal, the carry output terminal of first full adder is as the carry output terminal of totalizer and correlator integrated device.
3. totalizer according to claim 1 and correlator integrated device, it is characterized in that, two data input ends of described first full adder are used to import one two the relevant data of needs, the carry end of first full adder is used to import one one the relevant data of needs, the data input pin of first full adder of low data that is used to import the relevant data of described one two needs is as described totalizer and the correlator one further first relevant output terminal, first with output terminal as the second relevant output terminal of described totalizer and correlator integrated device.
4. totalizer and correlator integrated device, it is characterized in that, comprise second full adder, second not gate and first rejection gate, the carry output terminal of second full adder links to each other with the input end of second not gate, second full adder and the output terminal output terminal and second not gate are respectively as two inputs of first rejection gate, described totalizer and correlator integrated device comprise four output terminals, be respectively totalizer and correlator integrated device with output terminal, carry output terminal, the relevant output terminal of the first relevant output terminal with second.
5. totalizer according to claim 4 and correlator integrated device, it is characterized in that, two the data input ends and the carry end of described second full adder are used to import the addition data that need carry out additive operation, second full adder with output terminal as totalizer and correlator integrated device and output terminal, the carry output terminal of second full adder is as the carry output terminal of totalizer and correlator integrated device.
6. totalizer according to claim 4 and correlator integrated device, it is characterized in that, two data input ends of described second full adder are used to import one two the relevant data of needs, the carry end of second full adder is used to import one one the relevant data of needs, the data input pin of second full adder of low data that is used to import the relevant data of described one two needs is as the first relevant output terminal of described totalizer and correlator integrated device, and the output terminal of first rejection gate is as the second relevant output terminal of described totalizer and correlator integrated device.
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| CN2011201471494U CN202066967U (en) | 2011-05-11 | 2011-05-11 | Adder and correlator integrating device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102323604A (en) * | 2011-05-11 | 2012-01-18 | 成都成电电子信息技术工程有限公司 | Adder and correlator integrated device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102323604A (en) * | 2011-05-11 | 2012-01-18 | 成都成电电子信息技术工程有限公司 | Adder and correlator integrated device |
| CN102323604B (en) * | 2011-05-11 | 2013-01-02 | 成都成电电子信息技术工程有限公司 | Adder and correlator integrated device |
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Granted publication date: 20111207 Effective date of abandoning: 20130306 |
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