CN202050480U - Ground digital television receiver - Google Patents
Ground digital television receiver Download PDFInfo
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- CN202050480U CN202050480U CN 201020661200 CN201020661200U CN202050480U CN 202050480 U CN202050480 U CN 202050480U CN 201020661200 CN201020661200 CN 201020661200 CN 201020661200 U CN201020661200 U CN 201020661200U CN 202050480 U CN202050480 U CN 202050480U
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Abstract
The utility model discloses a ground digital television receiver which comprises a housing, a front face plate, a rear face plate and an antenna arranged on the housing, as well as a video output interface and an audio output unit both arranged on the rear face plate. The ground digital television receiver further comprises an integrated signal decoding unit which is arranged inside the housing, and a FLASH memory unit, a DDR (Double Data Rate) memory unit, a tuner unit and a channel demodulation unit, which are electrically connected with the integrated signal decoding unit respectively. The tuner unit is electrically connected with the channel demodulation unit, and the video output interface and the audio output unit are both electrically connected with the integrated signal decoding unit. The receiver receives television signals through the antenna, the signals are processed by the tuner unit and the channel demodulation unit and then transmitted to the integrated signal decoding unit, and the integrated signal decoding unit further processes the signals to generate various video/audio signals and transmits the video/audio signals to the video output interface and the audio output unit correspondingly. The ground digital television receiver adopts the single chip to achieve decryption of different coding standards.
Description
Technical field
The utility model relates to a kind of wireless digital TV-set receiving system, particularly a kind of ground digital television receiver.
Background technology
Ground digital television broadcast (Terrestrial Digital Multimedia TV/Handle Broadcasting) is a kind of television broadcasting system with terrestrial broadcasting circulation way transmitting digital TV broadcast singal.In digital TV ground, wired, satellite transmits mode, the digital terrestrial television transmission system environment is the most complicated, and also higher because of its specification requirement, spectators extensively receive much concern.The terrestrial wireless digital television broadcasting has overcome not only that the artificial antenna TV is subject to disturb, poor image quality, the shortcoming of ghost image is arranged, and can also transmit nearly 8 cover TV programme in a television channel, has greatly improved the utilance of wireless frequency spectrum.In August, 2006, China has issued the ground digital television broadcast transmission standard " digital television ground broadcast transmission system frame structure, chnnel coding and modulation " (standard No. is GB20600-2006) of oneself, and this standard is also referred to as the DTMB standard.
Ground national digital television broadcasting (Digital Television Multimdia Broadcasting, being called for short DTMB) system is the important component part in the comprehensive nerve of a covering of China's radio and television, it will with digital video broadcast-satellite system and cable digital TV broadcast system and other auxiliary systems are collaborative mutually provides comprehensive audient to cover.The standard of DTMB has merged the single-carrier scheme (ADTB-T) of Shanghai Communications University and two kinds of modulation systems of multi-carrier scheme (DMB-T) of Tsing-Hua University, has the characteristics of autonomous innovation.DTMB implements in beginning on August 1st, 2007 is formal, indicates that the development of China's television broadcasting industry has entered the new epoch.And digital television receiving apparatus such as existing set-top box can only receive digital catv signal, and therefore, ground digital television receiving set (can be described as the terrestrial DTV set-top box) is provided, and trend is inevitable.
Chinese patent literature CN100527796C discloses a kind of ground digital television receiver, and this receiver comprises MPEG2 SD/high definition decoding unit, tuner unit, channel demodulation unit, Flash memory cell, DDR memory, video output unit, audio output unit, AVS SD/high definition decoding unit and SDRAM memory.Described tuner unit is connected with the channel demodulation unit, described channel demodulation unit, Flash memory cell, DDR memory, video output unit and audio output unit all are connected with MPEG2 SD/high definition decoding unit, described AVS SD/high definition decoding unit is connected with MPEG2 SD/high definition decoding unit, and described AVS SD/high definition decoding unit is connected with Flash memory cell, SDRAM memory; The Flash memory cell is used for the storing software control program, is used to control MPEG2 SD/high definition decoding and examines the operation of unit and AVS SD/high definition decoding unit; Ephemeral data when the SDRAM memory is used for storing AVS SD/high definition decoding unit program running and decoding processing; Ephemeral data when the DDR memory is used for store M PEG2 SD/high definition decoding unit program running and decoding processing.This ground digital television receiver all is suitable for the area of adopting MPEG2 or AVS coding standard.But this receiver provides two independent decoding chip unit to MPEG2 or AVS coding and decodes respectively, and AVS SD/high definition decoding unit to need after the AVS code signal decoding by the HOST bus pass to alternately MPEG2 SD/high definition decoding unit again by MPEG2 SD/high definition decoding unit to signal processing after outputting video signal and audio signal, too complicated to the decode procedure of AVS signal; This receiver all do not support the signal of coding standard and VC-1 coding standard H.264, and this receiver recording and storing of support channel program not.
Summary of the invention
Technical problem to be solved in the utility model provide a kind of adopt a decoding chip can realize MPEG-2, H.264, multiple coding standards such as VC-1 and the AVS ground digital television receiver of decoding, and this ground digital television receiver support is carried out the free of losses recording and storing to channel program.
The technical scheme that realizes the utility model purpose provides a kind of ground digital television receiver, the shell that connects before and after comprising, be fixed on shell front opening place front panel, be fixed on the rear board of outer casing back opening part and be arranged on FLASH memory cell and DDR memory cell in the shell, also comprise being arranged on the antenna on the shell and being arranged on video output interface and audio output unit on the rear board, also comprise the tuner unit, channel demodulation unit and the integrated signal decoding unit that are arranged in the shell.Audio output unit comprises digital audio and video signals output interface and simulated audio signal output unit.
Tuner unit is provided with I2C bus interface, antenna port and TV signal output end.The channel demodulation unit is provided with I2C bus interface, reseting port, tv signal input and TV data output interface.Integrated signal decoding unit is provided with TV data input interface, PB interface, DDR2 interface, S/PDIF digital audio standard interface, video D/A conversion unit and I2S bus interface.
Antenna is electrically connected with the antenna port of tuner unit.The I2C bus interface of tuner unit is electrically connected with the I2C bus interface of integrated signal decoding unit.The TV signal output end of tuner unit is electrically connected with the tv signal input of channel demodulation unit.
The TV data output interface of channel demodulation unit is electrically connected with the TV data input interface of integrated signal decoding unit, and the I2C bus interface of channel demodulation unit is electrically connected with the I2C bus interface of integrated signal decoding unit.
The PB interface of integrated signal decoding unit is electrically connected with the I/O interface of FLASH memory cell.The DDR2 interface of integrated signal decoding unit is electrically connected with the FPDP of DDR memory cell and control signal port.The S/PDIF digital audio standard interface of integrated signal decoding unit is electrically connected with the digital audio and video signals output interface.The output of the video D/A conversion unit of integrated signal decoding unit is electrically connected with video output interface.The I2S bus interface of integrated signal decoding unit is electrically connected with the simulated audio signal input of simulated audio signal output unit.
The TV data output interface of channel demodulation unit comprises clock signal port, data useful signal port, synchronous signal port and bit stream data port.The TV data input interface of integrated signal decoding unit then comprises corresponding clock signal port, data useful signal port, synchronous signal port and bit stream data port, and the corresponding ports in the TV data input interface of each port in the TV data output interface of channel demodulation unit and integrated signal decoding unit is electrically connected.
It is the decoding chip of SMP8652 that integrated signal decoding unit adopts model, support to comprise MPEG-2, H.264, the decoding of the coding standard of VC-1 and AVS.Integrated signal decoding unit also is provided with restarts reseting port, USB interface and SATA-2 interface, the port that can be connected with the USB memory device when USB interface wherein is to use, the port that can be connected with the SATA memory device when SATA-2 interface is to use.
Above-mentioned ground digital television receiver also comprises the HDMI reflector, the HDMI reflector be support HDMI 1.3a standard device.Integrated signal decoding unit also is provided with the HDMI interface, and the HDMI interface of integrated signal decoding unit is electrically connected with the signal input part of HDMI reflector.
Above-mentioned ground digital television receiver also comprises micro-control unit, power subsystem, power supply input/output interface spare and receiver of remote-control sytem.
Power supply input/output interface spare is provided with the dc supply input mouth.The output of power supply input/output interface spare is electrically connected with the power input of power subsystem.Micro-control unit and power subsystem all are arranged in the shell.The output of micro-control unit is electrically connected with the control end of power subsystem, and the power output end of power subsystem is electrically connected with the power end of tuner unit, channel demodulation unit and integrated signal decoding unit respectively.Receiver of remote-control sytem is an I.R. infrared receiving device, can accept infrared remote control signal.Remote signal first output of receiver of remote-control sytem is electrically connected with the remote signal input of integrated signal decoding unit, and remote signal second output of receiver of remote-control sytem is electrically connected with the remote signal input of micro-control unit.
It is the frequency conversion silicon tuner of MAX2165 that tuner unit adopts model.
It is the two-way demodulation chip of ATBM8831 that the channel demodulation unit adopts model, and this chip is supported the demodulation of two kinds of modulation systems of multi-carrier scheme of the single-carrier scheme of Shanghai Communications University and Tsing-Hua University simultaneously.
FLASH memory cell employing capacity is the NAND Flash internal memory of 1G.The DDR memory cell comprises the DDR2 sdram memory device that 2 capacity are 1G, ephemeral data when wherein 1 internal memory is used for storing integrated signal decoding unit decoding processing, the ephemeral data that another internal memory is used for storing integrated signal decoding unit when carrying out system management.
Video output interface comprises the output port of composite video broadcast singal output port and video component terminal.The digital audio and video signals output interface is a COAX output port.The simulated audio signal output unit comprises an audio digital to analog converter and the stereo left and right sound channels output port that is connected with audio digital to analog converter, and the simulated audio signal output unit is electrically connected with the I2S bus interface of integrated signal decoding unit by its audio digital to analog converter.
Above-mentioned ground digital television receiver also comprises front panel circuit board and VFD display screen.The VFD display screen is fixed on the front panel, also is provided with the control button device that comprises power switch button device, channel switch button device, function switching push button device, volume adjusting button device on the front panel.VFD display screen and each control button device all are electrically connected with the front panel circuit board.Carry signal, front panel circuit board to send corresponding all kinds of control signal, can also accept the signal that integrated signal decoding unit sends and be forwarded to the VFD display screen by the high-speed synchronous serial port between front panel circuit board and the integrated signal decoding unit to integrated signal decoding unit.
Receiver of remote-control sytem is arranged on the front panel.
Each output port of audio output unit, power supply input/output interface spare, video output interface and HDMI reflector all are arranged on the rear board.
The utlity model has positive effect:
(1) ground digital television receiver of the present utility model is owing to adopt an integrated decoding chip can support to comprise MPEG-2, the 10th part H.264(MPEG-4), VC-1(WMV9) and the decoding of the multiple coding standard of AVS, support that not only coding standard is many, and saved and adopted a plurality of decoding chips respectively to the decode process of data interaction again of respective coding standard, decode procedure is simply efficient.
(2) ground digital television receiver of the present utility model can carry out the direct stored record of TS data flow to the ground digital television program by SATA-2 interface and USB interface, and can name automatically according to channel program information, this storage mode is a kind of break-even code stream recording mode of comparing with the ground digital television signal emission source.
What (3) ground digital television receiver of the present utility model adopted is that model is the two-way demodulation chip of ATBM8831, supports the demodulation of two kinds of modulation systems of multi-carrier scheme (DMB-T) of the single-carrier scheme (ADTB-T) of Shanghai Communications University and Tsing-Hua University simultaneously.
(4) ground digital television receiver of the present utility model is supported digital audio, analogue audio frequency, analog video, composite video broadcast singal and the multiple audio frequency of HDMI high-resolution multimedia signal, the video way of output, can satisfy different users's different demands.
Description of drawings
Fig. 1 is a kind of circuit diagram of the present utility model.
Mark in the above-mentioned accompanying drawing is as follows:
Tuner unit 1, channel demodulation unit 2, integrated signal decoding unit 3, FLASH memory cell 41, DDR memory cell 42, USB memory device 43, SATA memory device 44, antenna 50, digital audio and video signals output interface 51, simulated audio signal output unit 52, audio digital to analog converter 52-1, video output interface 53, HDMI reflector 54, micro-control unit 60, power subsystem 61, power supply input/output interface spare 62, receiver of remote-control sytem 7.
Embodiment
(embodiment 1)
See Fig. 1, the shell that connects before and after the ground digital television receiver of present embodiment comprises, the front panel (Front Panel) that is fixed on shell front opening place, be fixed on the rear board (Back Panel) of outer casing back opening part and be arranged on tuner unit 1, channel demodulation unit 2, integrated signal decoding unit 3, FLASH memory cell 41, DDR memory cell 42, micro-control unit 60, power subsystem 61 and front panel circuit board in the shell.Ground digital television receiver also comprises the antenna 50 that is arranged on the shell and is arranged on power supply input/output interface spare 62, HDMI reflector 54, video output interface 53 and audio output unit on the rear board.Audio output unit comprises digital audio and video signals output interface 51 and simulated audio signal output unit 52 again.Ground digital television receiver also comprises the receiver of remote-control sytem 7 that is arranged on the front panel.
The model that integrated signal decoding unit 3 adopts Sigma Design companies to make is the decoding chip of SMP8652, and this chip is for supporting to comprise MPEG-2, the 10th part H.264(MPEG-4), VC-1(WMV9) and the integrated decoding chip of the decoding of the multiple coding standard of AVS.Integrated signal decoding unit 3 mainly comprises CPU, file format resolver (Demux module), audio hardware decoder and hardware video decoder.Integrated signal decoding unit 3 also is provided with and is used for the I2C bus interface that is connected with channel demodulation unit 2 with tuner unit 1, the TV data input interface that is used for 2 reception data from the channel demodulation unit, be used for the bidirectional interface PB interface that is connected with FLASH memory cell 41, be used for and the DDR memory cell 42 two-way interface DDR2 interfaces that are connected, be used for S/PDIF digital audio standard interface to digital audio and video signals output interface 51 output signals, be used for video D/A conversion unit (Video DACS) to video output interface 53 output signals, be used for I2S bus interface to simulated audio signal output unit 52 output signals, be used for HDMI interface to HDMI reflector 54 output signals, be used for USB interface that is connected with USB memory device 43 and the SATA-2 interface that is used for being connected with SATA memory device 44.Integrated signal decoding unit 3 also is provided with restarts reseting port RESET end.
The model that tuner unit 1 adopts Maxim Integrated Products company to make is the frequency conversion silicon tuner (Silicon Tuner) of MAX2165, and it comprises that RF tracking filter, low noise amplifier, transmission suppress trapper and base band low pass channel selecting filter able to programme.Tuner unit 1 is provided with I2C bus interface, antenna port and TV signal output end.
Channel demodulation unit 2 adopts highly to be opened up news to reach the model that company makes is the two-way demodulation chip of ATBM8831, and this chip is supported the demodulation of two kinds of modulation systems of multi-carrier scheme (DMB-T) of the single-carrier scheme (ADTB-T) of Shanghai Communications University and Tsing-Hua University simultaneously.And the channel demodulation unit is provided with restarts reseting port RESET end.Channel demodulation unit 2 also is provided with I2C bus interface, reseting port, tv signal input and TV data output interface.
Antenna 50 is electrically connected with the antenna port of tuner unit 1; The I2C bus interface of tuner unit 1 and the I2C bus interface of channel demodulation unit 2 are electrically connected with the I2C bus interface of integrated signal decoding unit 3 jointly; The TV signal output end TX end of tuner unit 1 is electrically connected with the tv signal input TX end of channel demodulation unit 2.Each TS interface of the TV data output interface of channel demodulation unit 2 is electrically connected with the TV data input interface of integrated signal decoding unit 3.
Each TS interface of the TV data output interface of channel demodulation unit 2 comprises clock signal port (TSBDCLK), data useful signal port (TSBDVLD), synchronous signal port (TSPSYNCD) and bit stream data port (TSBD[7:0]); The TV data input interface of integrated signal decoding unit 3 then comprises corresponding clock signal port, data useful signal port, synchronous signal port and bit stream data port, and the corresponding ports in the TV data input interface of each TS interface in the TV data output interface of channel demodulation unit 2 and integrated signal decoding unit 3 is electrically connected.
FLASH memory cell 41 employing capacity are the NAND Flash internal memory of 1G.FLASH memory cell 41 is used for the storing software control program, and FLASH memory cell 41 is connected with the PB interactive interfacing of integrated signal decoding unit 3 by its I/O interface, and described software control procedure can be controlled the operation of integrated signal decoding unit 3.
DDR memory cell 42 comprises the DDR2 sdram memory device that 2 capacity are 1G, its FPDP all is connected with the DDR2 interactive interfacing of integrated signal decoding unit 3 with the control signal port, ephemeral data when wherein 1 internal memory is used for storing integrated signal decoding unit 3 decoding processing, the ephemeral data that another internal memory is used for storing integrated signal decoding unit 3 when carrying out system management.
Video output interface 53 comprises the output port of composite video broadcast singal (CVBS) output port and video component terminal (Y, Pr, Pb).
Audio output unit comprises digital audio and video signals output interface 51 and 52 two parts of simulated audio signal output unit, and wherein digital audio and video signals output interface 51 is COAX output ports that are connected with the S/PDIF digital audio standard interface of integrated signal decoding unit 3; Simulated audio signal output unit 52 comprises an audio digital to analog converter (Stereo DAC) 52-1 and the stereo left and right sound channels output port that is connected with audio digital to analog converter 52-1, and audio digital to analog converter (Stereo DAC) 52-1 also is connected with the I2S bus interface of integrated signal decoding unit 3.
HDMI reflector 54(HDMI transmitter) supports HDMI 1.3a standard, the bandwidth of HDMI 1.3a technical specification is more than the twice of HDMI1.0, and supports the broader dark technology of color space, new digital audio format and automated audio/audio video synchronization ability (" sound/as synchronously ") etc.HDMI 1.3a upwards supports 10,12 and 16 (RGB or YCbCr) color depths from 8 bit depth of previous HDMI technical specification version.The signal input part of HDMI reflector 54 is electrically connected with the HDMI interface of integrated signal decoding unit 3.
Receiver of remote-control sytem 7 is I.R. infrared receiving devices, can accept infrared remote control signal.Remote signal first output of receiver of remote-control sytem 7 is electrically connected with the remote signal input of integrated signal decoding unit 3, remote signal second output of receiver of remote-control sytem 7 is electrically connected with the remote signal input of micro-control unit 60, can be respectively to integrated signal decoding unit 3 and micro-control unit 60 output control signals.
The ground digital television receiver of present embodiment also comprises the VFD display screen, this VFD display screen is fixed on the front panel, also is provided with the control button device that comprises power switch button device, channel switch button device, function switching push button device, volume adjusting button device on the front panel.VFD display screen and each control button device all are electrically connected with the front panel circuit board.Carry signal (SPI signal) by the high-speed synchronous serial port between front panel circuit board and the integrated signal decoding unit 3.The user can send corresponding all kinds of control signals to integrated signal decoding unit 3 after pressing the corresponding button on the front panel, the front panel circuit board can be accepted the signal that integrated signal decoding unit 3 sends and be forwarded to the VFD display screen, and the VFD display screen shows corresponding channel indication information etc.
Each output port of audio output unit, power supply input/output interface spare 62, video output interface 53, HDMI reflector 54 all are arranged on the rear board.
The direct current that inserts 12V, 3A by power supply input/output interface spare 62 when the ground digital television receiver of present embodiment uses is powered, receive ground digital television signals by antenna 50, carry out detection, be transferred to channel demodulation unit 2 after amplifying, resolve into base band (I/Q) signal by 1 pair of signal of tuner unit then.Channel demodulation unit 2 is demodulated to the TV data input interface of TS data flow transmission to integrated signal decoding unit 3 with base band (I/Q) signal.Integrated signal decoding unit 3 is under the control of the control signal that receiver of remote-control sytem 7 receives, serial data line SDA by its I2C bus and serial time clock line SCL control tuner unit 1 channel parameter are set, control channel demodulating unit 2 is provided with demodulation parameter, wherein data wire SDA is used for bi-directional data control, and clock line SCL is used for clock control.Integrated signal decoding unit 3 sends the frequency order to tuner unit 1 and channel demodulation unit 2 respectively, controls both running statuses.Tuner unit 1 is logged on to a TV channel, and signal backward integration signal decoding unit 3 sends locked signal, channel demodulation unit 2 locking demodulation parameter backward integration signal decoding units 3 send locked signal.Be transferred to the TS data flow of integrated signal decoding unit 3 by each TS interface of TV data input interface, file format resolver (Demux module) through integrated signal decoding unit 3 is resolved, separate and generate audio frequency PES(Packetized Elementary Stream) data flow, video PES(Packetized Elementary Stream) data flow, Program Specific Information stream (PSI) and other packets, then audio frequency PES data flow and video PES data flow are sent to the decoding of carrying out Voice ﹠ Video in the relevant hardware decoder respectively, handle again at last and generate digital high-definition video signal, the composite video broadcast singal, digital audio and video signals and simulated audio signal, each road signal such as high-resolution multimedia signal HDMI signal, in these signals, digital high-definition video signal is transported to the video component terminal Y end of video output interface 53, Pr end and Pb end, the composite video broadcast singal is transported to the composite video broadcast singal output port cvbs end of video output interface 53, digital audio and video signals is transported to the digital audio and video signals output interface 51 of audio output unit, simulated audio signal is transported to the simulated audio signal output unit 52 of audio output unit, and high-resolution multimedia signal HDMI signal is transported to HDMI reflector 54.
When carrying out said process, integrated signal decoding unit 3 can also carry out record with the TS data flow, also promptly stores USB memory device 43 by the stored record of SATA-2 interface into to SATA memory device 44 or by USB interface.When carrying out above-mentioned stored record, integrated signal decoding unit 3 is named the file of storage according to the Program Specific Information stream (PSI) that the file format resolver parses from the TS data flow, owing to be directly the TS data flow to be stored, therefore to compare with the data that the ground digital signal emitting-source is launched be break-even code stream record to the data of storage.
Certainly, integrated signal decoding unit 3 can read the file that is stored in the TS data flow in SATA memory device 44 or the USB memory device 43, and the file format resolver (Demux module) of the integrated signal decoding unit 3 of process is resolved, separate and generate audio frequency PES(Packetized Elementary Stream) data flow, video PES(Packetized Elementary Stream) data flow, Program Specific Information stream (PSI) and other packets, then audio frequency PES data flow and video PES data flow are sent to the decoding of carrying out Voice ﹠ Video in the relevant hardware decoder respectively, handle generating digital high-definition video signal at last again, digital audio and video signals and simulated audio signal, each road signal such as high-resolution multimedia (HDMI) signal exports corresponding video output interface 53 to, audio output unit, HDMI reflector 54.
Claims (10)
1. ground digital television receiver, the shell that connects before and after comprising, be fixed on shell front opening place front panel, be fixed on the rear board of outer casing back opening part and be arranged on FLASH memory cell (41) and DDR memory cell (42) in the shell, also comprise the antenna (50) that is arranged on the shell and be arranged on video output interface (53) and audio output unit on the rear board, it is characterized in that:
Also comprise the tuner unit (1), channel demodulation unit (2) and the integrated signal decoding unit (3) that are arranged in the shell; Audio output unit comprises digital audio and video signals output interface (51) and simulated audio signal output unit (52);
Tuner unit (1) is provided with I2C bus interface, antenna port and TV signal output end; Channel demodulation unit (2) is provided with I2C bus interface, reseting port, tv signal input and TV data output interface; Integrated signal decoding unit (3) is provided with TV data input interface, PB interface, DDR2 interface, S/PDIF digital audio standard interface, video D/A conversion unit and I2S bus interface;
Antenna (50) is electrically connected with the antenna port of tuner unit (1); The I2C bus interface of tuner unit (1) is electrically connected with the I2C bus interface of integrated signal decoding unit (3); The TV signal output end of tuner unit (1) is electrically connected with the tv signal input of channel demodulation unit (2);
The TV data output interface of channel demodulation unit (2) is electrically connected with the TV data input interface of integrated signal decoding unit (3), and the I2C bus interface of channel demodulation unit (2) is electrically connected with the I2C bus interface of integrated signal decoding unit (3);
The PB interface of integrated signal decoding unit (3) is electrically connected with the I/O interface of FLASH memory cell (41); The DDR2 interface of integrated signal decoding unit (3) is electrically connected with the FPDP and the control signal port of DDR memory cell (42); The S/PDIF digital audio standard interface of integrated signal decoding unit (3) is electrically connected with digital audio and video signals output interface (51); The output of the video D/A conversion unit of integrated signal decoding unit (3) is electrically connected with video output interface (53); The I2S bus interface of integrated signal decoding unit (3) is electrically connected with the simulated audio signal input of simulated audio signal output unit (52);
The TV data output interface of channel demodulation unit (2) comprises clock signal port, data useful signal port, synchronous signal port and bit stream data port; The TV data input interface of integrated signal decoding unit (3) then comprises corresponding clock signal port, data useful signal port, synchronous signal port and bit stream data port, and the corresponding ports in the TV data input interface of each port in the TV data output interface of channel demodulation unit (2) and integrated signal decoding unit (3) is electrically connected.
2. ground digital television receiver according to claim 1 is characterized in that: it is the decoding chip of SMP8652 that integrated signal decoding unit (3) adopts model, support to comprise MPEG-2, H.264, the decoding of the coding standard of VC-1 and AVS; Integrated signal decoding unit (3) also is provided with restarts reseting port, USB interface and SATA-2 interface, the port that can be connected with USB memory device (43) when USB interface wherein is to use, the port that can be connected with SATA memory device (44) when the SATA-2 interface is to use.
3. ground digital television receiver according to claim 2 is characterized in that: also comprise HDMI reflector (54), HDMI reflector (54) be support HDMI 1.3a standard device; Integrated signal decoding unit (3) also is provided with the HDMI interface, and the HDMI interface of integrated signal decoding unit (3) is electrically connected with the signal input part of HDMI reflector (54).
4. ground digital television receiver according to claim 3 is characterized in that: also comprise micro-control unit (60), power subsystem (61), power supply input/output interface spare (62) and receiver of remote-control sytem (7);
Power supply input/output interface spare (62) is provided with the dc supply input mouth; The output of power supply input/output interface spare (62) is electrically connected with the power input of power subsystem (61); Micro-control unit (60) and power subsystem (61) all are arranged in the shell; The output of micro-control unit (60) is electrically connected with the control end of power subsystem (61), and the power output end of power subsystem (61) is electrically connected with the power end of tuner unit (1), channel demodulation unit (2) and integrated signal decoding unit (3) respectively; Receiver of remote-control sytem (7) is an I.R. infrared receiving device, can accept infrared remote control signal; Remote signal first output of receiver of remote-control sytem (7) is electrically connected with the remote signal input of integrated signal decoding unit (3), and remote signal second output of receiver of remote-control sytem (7) is electrically connected with the remote signal input of micro-control unit (60).
5. ground digital television receiver according to claim 2 is characterized in that: it is the frequency conversion silicon tuner of MAX2165 that tuner unit (1) adopts model.
6. ground digital television receiver according to claim 2 is characterized in that: channel demodulation unit (2) adopt model is the two-way demodulation chip of ATBM8831.
7. ground digital television receiver according to claim 1 is characterized in that: FLASH memory cell (41) employing capacity is the NAND Flash internal memory of 1G; DDR memory cell (42) comprises the DDR2 sdram memory device that 2 capacity are 1G, the ephemeral data that ephemeral data when wherein 1 internal memory is used for storing integrated signal decoding unit (3) decoding processing, another internal memory are used for storing integrated signal decoding unit (3) when carrying out system management.
8. ground digital television receiver according to claim 1 is characterized in that: video output interface (53) comprises the output port (Y, Pr, Pb) of composite video broadcast singal output port (cvbs) and video component terminal; Digital audio and video signals output interface (51) is a COAX output port; Simulated audio signal output unit (52) comprises an audio digital to analog converter (52-1) and the stereo left and right sound channels output port that is connected with audio digital to analog converter, and simulated audio signal output unit (52) is electrically connected by the I2S bus interface of its audio digital to analog converter (52-1) with integrated signal decoding unit (3).
9. ground digital television receiver according to claim 1 and 2 is characterized in that: also comprise front panel circuit board and VFD display screen; The VFD display screen is fixed on the front panel, also is provided with the control button device that comprises power switch button device, channel switch button device, function switching push button device, volume adjusting button device on the front panel; VFD display screen and each control button device all are electrically connected with the front panel circuit board; Carry signal by the high-speed synchronous serial port between front panel circuit board and the integrated signal decoding unit (3), the front panel circuit board can send corresponding all kinds of control signals to integrated signal decoding unit (3), can also accept the signal that integrated signal decoding unit (3) sends and be forwarded to the VFD display screen.
10. ground digital television receiver according to claim 4 is characterized in that: receiver of remote-control sytem (7) is arranged on the front panel;
Each output port of audio output unit, power supply input/output interface spare (62), video output interface (53) and HDMI reflector (54) all are arranged on the rear board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201020661200 CN202050480U (en) | 2010-12-15 | 2010-12-15 | Ground digital television receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201020661200 CN202050480U (en) | 2010-12-15 | 2010-12-15 | Ground digital television receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202050480U true CN202050480U (en) | 2011-11-23 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201020661200 Expired - Lifetime CN202050480U (en) | 2010-12-15 | 2010-12-15 | Ground digital television receiver |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202050480U (en) |
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2010
- 2010-12-15 CN CN 201020661200 patent/CN202050480U/en not_active Expired - Lifetime
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