CN202050399U - Serial port tie line management instruction-check-type 8K-channel sensor 128-group home appliance wire holder - Google Patents

Serial port tie line management instruction-check-type 8K-channel sensor 128-group home appliance wire holder Download PDF

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CN202050399U
CN202050399U CN2010206962888U CN201020696288U CN202050399U CN 202050399 U CN202050399 U CN 202050399U CN 2010206962888 U CN2010206962888 U CN 2010206962888U CN 201020696288 U CN201020696288 U CN 201020696288U CN 202050399 U CN202050399 U CN 202050399U
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曾艺
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Chongqing Technology and Business University
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Abstract

串行口联络线管理核对指令式8K路传感器128组家电接线座是一种计算机与家电的接口装置,通过串行口的TXD配合两根联络线管理128组电子电器,用一根输入联络线检测8K(K=1,2,3,......)路传感器;包括:RS232C接口、USB接口、

Figure DSA00000406486700011
电平转换电路、8bit串入并出移位寄存器、256个8bit数据比较器电路、128个RS触发器电路、128组电子开关电路、8bit×K并入串出移位寄存器以及8K(K=1,2,3,......)对传感器接线端。其中,RTS作为上述两种移位寄存器的时钟信号,DTR分别作为8bit串入并出移位寄存器的串行输入信号以及8bit×K并入串出移位寄存器的数据移位/装载控制信号,TXD作为所述比较器电路的输出允许控制信号,该比较器电路的输出控制128个RS触发器电路及其电子开关电路;CTS接收8bit×K并入串出移位寄存器的串行输出信号。用于现有电器网络化管理。

Figure 201020696288

Serial port connection line management check instruction type 8K channel sensor 128 sets of home appliance terminal block is a computer and home appliance interface device, through the TXD of the serial port and two connection lines to manage 128 groups of electronic appliances, with one input connection line Detect 8K (K=1, 2, 3,...) sensors; including: RS232C interface, USB interface,

Figure DSA00000406486700011
Level conversion circuit, 8bit serial input and output shift register, 256 8bit data comparator circuits, 128 RS flip-flop circuits, 128 sets of electronic switch circuits, 8bit×K parallel input and serial output shift register and 8K (K= 1, 2, 3, ...) to the sensor terminals. Among them, RTS is used as the clock signal of the above two shift registers, and DTR is used as the serial input signal of the 8bit serial input and output shift register and the data shift/load control signal of the 8bit×K parallel input and serial output shift register respectively. TXD is used as the output permission control signal of the comparator circuit, and the output of the comparator circuit controls 128 RS flip-flop circuits and their electronic switch circuits; CTS receives the serial output signal of the 8bit×K parallel input and serial output shift register. It is used for network management of existing electrical appliances.

Figure 201020696288

Description

Serial port interconnection management core is to 128 groups of household electrical appliances junction blocks of instruction type 8K road transducer
Technical field
The utility model belongs to the application electric technology field, particularly relates to a kind of computer of household electrical appliance automation and interface arrangement of domestic electronic and electrical equipment realized.
Background technology
Submit to recently the utility model patent " the serial port junctor management management core is to 128 groups of home appliance wire holders of instruction type No. 8 sensors " of Patent Office of State Intellectual Property Office examination so that computer can detect the output state of 8 Sensor of Switch-Output Type, and by means of two of computer serial port output interconnections and send data wire TXD and send out the binary data instruction by 8 SI PO shift registers exactly, through comparing with the instruction code that presets, manage 128 groups of domestic electronics and electrical equipment.
Summary of the invention
The purpose of this utility model is to provide a kind of serial port interconnection management core to 128 groups of household electrical appliances junction blocks of instruction type 8K road transducer, it is main frame with the computer, rely on an input interconnection of serial port to detect 8K (K=1,2,3, ...) road digital quantity output type transducer, two output interconnections by serial port are sent out the binary data instruction, and send the output of data wire TXD control data instruction with it, this director data and the command code that presets are compared, manage 128 groups of domestic electronics and electrical equipment; Comprise: RS232C interface, USB interface, USB change the serial port circuit,
Figure BSA00000406487000011
Level shifting circuit, 8bit SI PO shift register, 256 8bit data comparator circuit, 128 rest-set flip-flop circuit, 128 groups of electronic switching circuits, 8bit * K incorporate into and go here and there out shift register, 8K (K=1,2,3 ...) to sensor terminals, voltage-stabilized power supply circuit, anti-lightning strike and surge circuit and power line and plug thereof.
The technical scheme that its technical problem that solves the utility model adopts is:
USB interface is connected to the corresponding signal input part that USB turns to the serial port circuit, the corresponding port line parallel of the latter's signal output part and RS232C interface; The 5th pin GND of RS232C interface is connected to power cathode, and its 4th pin DTR, the 7th pin RTS, the 3rd pin TXD are connected respectively to
Figure BSA00000406487000012
A RS232C level signal input of level shifting circuit; The TTL/CMOS level signal output of the corresponding RTS of this level shifting circuit is connected respectively to 8bit SI PO shift register and 8bit * K to be incorporated into and goes here and there out the clock signal input terminal of shift register; The TTL/CMOS level signal output of the corresponding DTR of this level shifting circuit is connected respectively to serial signal input of 8bit SI PO shift register and 8bit * K to be incorporated into and goes here and there out the parallel input data of the shift register control end that is shifted/loads; The comparative result A=B signal output that the TTL/CMOS level signal output of the corresponding TXD of this level shifting circuit is connected to 256 8bit data comparator circuit allows control end
Figure BSA00000406487000021
Also connect a pull-up resistor to positive source; The 8th pin CTS of serial port is connected to
Figure BSA00000406487000022
A RS232C level signal output of level shifting circuit, the TTL/CMOS level signal input of corresponding this level shifting circuit is connected to 8bit * K and incorporates into and go here and there out the serial signal output of shift register therewith; 8 signal output part Q of 8bit SI PO shift register 7Q 6Q 5Q 4Q 3Q 2Q 1Q 0One group of comparison signal input A with 256 8bit data comparator circuit 7A 6A 5A 4A 3A 2A 1A 0In regular turn in parallel, 256 comparative result A=B signal output parts of 256 8bit data comparator circuit connect respectively a pull down resistor to power cathode, also are connected in regular turn respectively 128 opposed 1 end S and reset terminal R of 128 rest-set flip-flop circuit; 128 output Q of 128 rest-set flip-flop circuit are connected respectively to the control signal input of one group of electronic switching circuit; The ac input end of voltage-stabilized power supply circuit is received civil power with anti-lightning strike in parallel with surge circuit by power line and plug thereof.
The 8bit SI PO shift register is made up of a 74HC164.
256 8bit data comparator circuit are made up of 256 8bit data comparators, and it is A that each 8bit data comparator has two groups of comparison signal inputs 7A 6A 5A 4A 3A 2A 1A 0And B 7B 6B 5B 4B 3B 2B 1B 0One group of comparison signal input A of each 8bit data comparator 7A 6A 5A 4A 3A 2A 1A 0Difference is in regular turn in parallel, consists of one group of comparison signal input A of 256 8bit data comparator circuit 7A 6A 5A 4A 3A 2A 1A 0Another group comparison signal input B of each 8bit data comparator 7B 6B 5B 4B 3B 2B 1B 0Be connected respectively to the common port of a single-pole double-throw switch (SPDT), so have 8 * 256 single-pole double-throw switch (SPDT)s, the in addition two ends of these single-pole double-throw switch (SPDT)s are connected respectively to positive source and power cathode; Each 8bit data comparator also has the signal output part of a comparative result A=B and a comparative result A=B signal output to allow control end
Figure BSA00000406487000023
The former high level is effective, consists of altogether 256 comparative result A=B signal output parts of 256 8bit data comparator circuit, latter's Low level effective, and the comparative result A=B signal output that consists of 256 8bit data comparator circuit in parallel allows control end
Figure BSA00000406487000024
8bit * K incorporates into and goes here and there out shift register and be made up of K piece 74HC165 cascade, their sheet choosing end is all received power cathode, its clock signal input terminal all links together, constitute the clock signal input terminal of described shift register, the 1st cascade carry signal input DS receives the positive pole of power supply, its serial signal output Q HBe connected to the 2nd serial signal input B, the 2nd serial signal output Q HBe connected to the 3rd cascade carry signal input DS, and the like, the serial signal output Q of K-1 piece HBe connected to the cascade carry signal input DS of K piece, the serial signal output Q of K piece HSerial signal output as described shift register; The 8K of described shift register parallel signal input connects a pull-up resistor respectively to positive source, also respectively with power cathode constitute 8K (K=1,2,3 ...) and to sensor terminals.
Voltage-stabilized power supply circuit is made up of power transformer, diode bridge rectifier circuit, capacitor filter and circuit of three-terminal voltage-stabilizing integrated 7806, and two outputs of 7806 have constituted the positive source and the power cathode of this device respectively.
Anti-lightning strike and surge circuit is made up of a fuse and a piezo-resistance polyphone.
Figure BSA00000406487000031
Level shifting circuit is made up of in conjunction with four electrochemical capacitors two MAX232.
128 groups of electronic switching circuits comprise 128 groups of electronic switching circuits, and each structure of organizing electronic switching circuit is identical, comprises separately: No. 1 alternating current electronic switching circuit and 1 road direct current electronic switching circuit.
The alternating current electronic switching circuit comprises: 1 NPN triode, 1 PNP triode, 1 base resistance, 1 base biasing resistor, 1 collector resistance, 1 current limliting collector resistance, a light-emitting diode and a solid-state relay; Wherein, the base stage of one termination NPN triode of base resistance, the other end is as the signal input end of this group electronic switching circuit, base biasing resistor is connected in parallel on the emitter junction of PNP triode, the emitter of this PNP triode connects positive source, its base stage and collector resistance, the collector electrode series connection of light-emitting diode and NPN triode, the emitter of NPN triode is connected to power cathode, current limliting of the collector electrode of PNP triode series connection is connected to the positive pole in the signal input end of solid-state relay with collector resistance, the negative pole in the signal input end of solid-state relay is connected to power cathode; Two outputs of solid-state relay constitute the output of this alternating current electronic switching circuit.
The electronic DC switch circuit comprises: triode and base resistance, a diode and a direct current relay; Wherein, the base stage of one termination triode of base resistance, the other end is as the signal input end of this group electronic switching circuit, the emitter of triode is connected to power cathode, its collector electrode is connected respectively to an end of the coil of the positive pole of diode and direct current relay, and the other end of the negative pole of diode and the coil of direct current relay all is connected to positive source; Six terminals of two pairs of single-pole double-throw switch (SPDT)s of direct current relay have constituted the output of this electronic DC switch circuit.
The utility model has constituted the interface between computer and domestic electronic and the electrical equipment, its advantage is, both can cooperate to incorporate into and go here and there out shift register and detect 8K (K=1 by an input interconnection, 2,3 ...) output state of road digital quantity output type transducer, can cooperate by two output interconnections again to send the correct binary data instruction of data wires output, through data relatively, manage 128 groups of domestic electronics or electrical equipment.
Description of drawings
Below in conjunction with accompanying drawing, further specify the utility model.
Fig. 1 is the circuit of the sensor interface part of circuit theory diagrams of the present utility model, wherein, and K=2, S 16..., S 01Representative sensor.
Fig. 2 is the schematic diagram of one group of electronic switching circuit.
Fig. 3 is circuit (square frame) figure of the transfer instruction data division of circuit theory diagrams of the present utility model.
Fig. 4 is made of the circuit theory diagrams of a 8bit binary data comparator 4bit binary data comparator.
Among the figure, 001.-128. electronic switching circuit, 11.-12. Level shifting circuit, 13.8bit SI PO shift register, 15.128 rest-set flip-flop circuit, 16., 17.8bit incorporates into and goes here and there out shift register, 31. the single-pole double throw direct current electromagnetic relay, 32. solid-state relay SSR, 5. voltage-stabilized power supply circuits, 51. anti-lightning strike and surge circuit, 6.USB interface, 7.USB changes serial port circuit, 8.RS232C interface, 9.256 individual 8bit data comparator circuit, 91.-93.4bit binary data comparator.
Embodiment
As shown in Figure 1,8bit incorporates into and goes here and there out shift register (16), (17) cascade and form 8bit * K and incorporate into and go here and there out shift register (K=2).When DTR is the parallel input data displacement/loading control end SHIFT/LOAD of 74HC165 (16), (17) when being low level, the data of 16 parallel inputs of 74HC165 (16), (17) are loaded.When RTS is the pulse of a positive transition of the every input of clock signal input terminal of 74HC165 (16), (17), the data of 16 parallel inputs that are loaded take place once to be shifted successively, for example: A → B → ... → G → H → Q HTherefore, event attribute according to serial communication control MSComm32.OCX: MSComm32.CTSholding/.DSRholding/.DCDholding, from the 8th pin CTS (also can use CD, DSR instead) of RS232C interface just can interrupt response mode or the mode of inquiry analyze 8 road digital quantity output type transducer S 16..., S 01State.16 the pull-up resistor Rs relevant with the parallel input of 74HC165 (16), (17) 16..., R 01Make and do not insert transducer S 16..., S 01The time its input end in stable level state.
As shown in Figure 3,8bit SI PO shift register (13) is made up of a 74HC164, its key points for operation are: be before the rising edge arrival of RTS at clock pulse signal, need be ready to the one digit number of transmission according to the serial signal input B of Di to 74HC164 (13) by DTR; The rising edge of clock pulse signal arrives, and displacement action: Q0=Di will take place the parallel output terminal of 74HC164 (13), Q0 → Q1 → Q2 → ... → Q6 → Q7; Output earlier is no less than 808 parallel-by-bit dateouts of coming zero clearing 74HC164 (13) before sending out data command at every turn, also can not go zero clearing, only exports needed data.
As shown in Figure 4, a 8bit binary data comparator is formed with (93) in 3 tetrad data comparator integrated circuits (91), (92), therefore, uses 256 8bit data comparators can form 256 8bit data comparator circuit (9).As seen from Figure 4, one group of data input pin A of comparator (92) and (91) 3A 2A 1A 0, A 3A 2A 1A 0Consisted of successively one group of comparison signal input A of this 8bit data comparator 7A 6A 5A 4A 3A 2A 1A 0Another group data input pin B of comparator (92) and (91) 3B 2B 1B 0, B 3B 2B 1B 0Consisted of successively another group comparison signal input B of this comparator 7B 6B 5B 4B 3B 2B 1B 0, they come the prepositioned instruction code by eight single-pole double-throw switch (SPDT)s.Utilize one group of data input pin B of comparator (93) 3B 2B 1B 0Highest order B 3The comparative result A=B signal output that consists of this 8bit data comparator allows control end
Figure BSA00000406487000051
If that is:
Figure BSA00000406487000052
The output signal A=B end of comparator (93) is always low level.Therefore, the pull down resistor R000 among Fig. 3 ..., R255 is also nonessential.
After " sealing in 8 the binary command data that walk abreast out ", Output attribute according to control MSComm32.OCX, character string is at random write in the serial port output register, then " its front of character of every transmission is superimposed with a low level beginning flag position ", this will cause 256 8bit data comparator circuit (9) output comparative result, guarantee that the correct director data of in good time transmission gives the 128 couples of R and the S control end of 128 rest-set flip-flop circuit (15).
8bit SI PO shift register (13) and 8bit * K incorporate into and go here and there out shift register (16), (17) (K=2) shared RTS is as clock signal input terminal, and shared DTR is as separately serial signal input B and data shift/loading control end SHIFT/LOAD.Therefore, can influence the operating state of the latter (16), (17) when operating the former (13), at this moment, the event attribute of not going to be concerned about serial communication control MSComm32.OCX gets final product; Also can influence the operating state of the former (13) when the operation latter (16), (17), at this moment, not send any data from TXD, just can be so that the output of the comparative result A=B signal of 256 8bit data comparator circuit (9) allows control end
Figure BSA00000406487000053
Be in the high level disarmed state, thereby 256 comparative result A=B signal output parts of 256 8bit data comparator circuit (9) all are in low level, do not influence the 128 couples of R and the S control end of 128 rest-set flip-flop circuit (15), that is do not influence the operating state of electronic switching circuit (001)-(128).

Claims (9)

1.串行口联络线管理核对指令式8K路传感器128组家电接线座,其特征是:包括RS232C接口、USB接口、USB转串行口电路、
Figure FSA00000406486900011
电平转换电路、8bit串入并出移位寄存器、256个8bit数据比较器电路、128个RS触发器电路、128组电子开关电路、8bit×K并入串出移位寄存器、8K(K=1,2,3,......)对传感器接线端、稳压电源电路、防雷击和浪涌电路以及电源线及其插头;其中,USB接口连接到USB转串行口电路的相应的信号输入端,后者的信号输出端与RS232C接口的相应端口线并联;RS232C接口的第五针GND连接到电源负极,其第四针DTR、第七针RTS、第三针TXD分别连接到
Figure FSA00000406486900012
电平转换电路的一个RS232C电平信号输入端;该电平转换电路对应RTS的TTL/CMOS电平信号输出端分别连接到8bit串入并出移位寄存器与8bit×K并入串出移位寄存器的时钟信号输入端;该电平转换电路对应DTR的TTL/CMOS电平信号输出端分别连接到8bit串入并出移位寄存器的一个串行信号输入端以及8bit×K并入串出移位寄存器的并行输入数据移位/装载控制端;该电平转换电路对应TXD的TTL/CMOS电平信号输出端连接到256个8bit数据比较器电路的比较结果A=B信号输出允许控制端
Figure FSA00000406486900013
还连接一个上拉电阻到电源正极;串行口的第八针CTS连接到
Figure FSA00000406486900014
电平转换电路的一个RS232C电平信号输出端,与此相应的该电平转换电路的TTL/CMOS电平信号输入端连接到8bit×K并入串出移位寄存器的串行信号输出端;8bit串入并出移位寄存器的8个信号输出端Q7Q6Q5Q4Q3Q2Q1Q0与256个8bit数据比较器电路的一组比较信号输入端A7A6A5A4A3A2A1A0依序并联,256个8bit数据比较器电路的256个比较结果A=B信号输出端分别连接一个下拉电阻到电源负极,还分别依序连接到128个RS触发器电路的128对置1端S与复位端R;128个RS触发器电路的128个输出端Q分别连接到一组电子开关电路的控制信号输入端;稳压电源电路的交流输入端与防雷击和浪涌电路并联,通过电源线及其插头接到市电。
1. Serial port connection line management check command type 8K sensor 128 groups of home appliance wiring sockets, its characteristics are: including RS232C interface, USB interface, USB to serial port circuit,
Figure FSA00000406486900011
Level conversion circuit, 8bit serial input and serial output shift register, 256 8bit data comparator circuits, 128 RS flip-flop circuits, 128 sets of electronic switch circuits, 8bit×K parallel input and serial output shift register, 8K (K= 1, 2, 3,...) to the sensor terminal, the regulated power supply circuit, the lightning protection and surge protection circuit, the power cord and its plug; among them, the USB interface is connected to the USB-to-serial port circuit The corresponding signal input terminal, the signal output terminal of the latter is connected in parallel with the corresponding port line of the RS232C interface; the fifth pin GND of the RS232C interface is connected to the negative pole of the power supply, and the fourth pin DTR, the seventh pin RTS, and the third pin TXD are connected respectively arrive
Figure FSA00000406486900012
An RS232C level signal input terminal of the level conversion circuit; the TTL/CMOS level signal output terminal of the level conversion circuit corresponding to the RTS is respectively connected to the 8bit serial input parallel output shift register and the 8bit×K parallel input serial output shift The clock signal input end of the register; the TTL/CMOS level signal output end of the level conversion circuit corresponding to DTR is respectively connected to a serial signal input end of the 8bit serial input and output shift register and an 8bit×K parallel input serial output shift register The parallel input data shift/load control terminal of the bit register; the TTL/CMOS level signal output terminal of the level conversion circuit corresponding to TXD is connected to the comparison result A=B signal output of 256 8bit data comparator circuits to allow the control terminal
Figure FSA00000406486900013
Also connect a pull-up resistor to the positive pole of the power supply; the eighth pin CTS of the serial port is connected to
Figure FSA00000406486900014
An RS232C level signal output terminal of the level conversion circuit, and the corresponding TTL/CMOS level signal input terminal of the level conversion circuit is connected to the serial signal output terminal of the 8bit×K parallel input and serial output shift register; 8 signal output terminals Q 7 Q 6 Q 5 Q 4 Q 3 Q 2 Q 1 Q 0 and 256 comparison signal input terminals A 7 A 6 A of 8bit serial input and parallel output shift registers 5 A 4 A 3 A 2 A 1 A 0 are connected in parallel in sequence, and the 256 comparison results A=B signal output terminals of 256 8bit data comparator circuits are respectively connected to a pull-down resistor to the negative pole of the power supply, and are also connected to 128 in sequence The 128 opposing 1 terminals S and the reset terminal R of the RS flip-flop circuit; the 128 output terminals Q of the 128 RS flip-flop circuits are respectively connected to the control signal input terminals of a group of electronic switch circuits; the AC input terminals of the regulated power supply circuit It is connected in parallel with the lightning protection and surge protection circuit, and connected to the mains through the power cord and its plug.
2.根据权利要求1所述的串行口联络线管理核对指令式8K路传感器128组家电接线座,其特征是:8bit串入并出移位寄存器由一块74HC164组成。2. The serial port connection line management checking instruction type 8K sensor 128 group home appliance terminal block according to claim 1, characterized in that: the 8-bit serial input and parallel output shift register is composed of a 74HC164. 3.根据权利要求1所述的串行口联络线管理核对指令式8K路传感器128组家电接线座,其特征是:256个8bit数据比较器电路由256个8bit数据比较器组成,每个8bit数据比较器有两组比较信号输入端即A7A6A5A4A3A2A1A0和B7B6B5B4B3B2B1B0;各个8bit数据比较器的一组比较信号输入端A7A6A5A4A3A2A1A0分别依序并联,构成256个8bit数据比较器电路的一组比较信号输入端A7A6A5A4A3A2A1A0;每个8bit数据比较器的另一组比较信号输入端B7B6B5B4B3B2B1B0分别连接到一个单刀双掷开关的公共端,于是共有8×256个单刀双掷开关,这些单刀双掷开关的另两端分别连接到电源正极与电源负极;各个8bit数据比较器还有一个比较结果A=B的信号输出端与一个比较结果A=B信号输出允许控制端
Figure FSA00000406486900021
前者高电平有效,一共构成256个8bit数据比较器电路的256个比较结果A=B信号输出端,后者低电平有效,并联构成256个8bit数据比较器电路的比较结果A=B信号输出允许控制端
Figure FSA00000406486900022
3. The serial port connection line management checking instruction type 8K road sensor 128 groups of home appliance terminal blocks according to claim 1 is characterized in that: 256 8bit data comparator circuits are composed of 256 8bit data comparators, each 8bit The data comparator has two sets of comparison signal input terminals, namely A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0 and B 7 B 6 B 5 B 4 B 3 B 2 B 1 B 0 ; each 8bit data comparator A group of comparison signal input terminals A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0 are respectively connected in parallel in sequence to form a group of comparison signal input terminals A 7 A 6 A 5 A of 256 8bit data comparator circuits 4 A 3 A 2 A 1 A 0 ; another group of comparison signal input terminals B 7 B 6 B 5 B 4 B 3 B 2 B 1 B 0 of each 8bit data comparator are respectively connected to the common of a SPDT switch terminal, so there are 8×256 single-pole double-throw switches, and the other two ends of these single-pole double-throw switches are respectively connected to the positive pole of the power supply and the negative pole of the power supply; each 8bit data comparator also has a signal output terminal of the comparison result A=B and a Comparison result A=B signal output allows control terminal
Figure FSA00000406486900021
The former is active at high level and constitutes a total of 256 comparison result A=B signal output terminals of 256 8bit data comparator circuits; the latter is active at low level and forms the comparison result A=B signal of 256 8bit data comparator circuits in parallel output enable control terminal
Figure FSA00000406486900022
4.根据权利要求1所述的串行口联络线管理核对指令式8K路传感器128组家电接线座,其特征是:8bit×K并入串出移位寄存器由K块74HC165级联组成,它们的片选端都接到电源负极,其时钟信号输入端都连接在一起,构成所述移位寄存器的时钟信号输入端,第1块的级联进位信号输入端DS接到电源的正极,其串行信号输出端QH连接到第2块的串行信号输入端B,第2块的串行信号输出端QH连接到第3块的级联进位信号输入端DS,依次类推,第K-1块的串行信号输出端QH连接到第K块的级联进位信号输入端DS,第K块的串行信号输出端QH作为所述移位寄存器的串行信号输出端;所述移位寄存器的8K个并行信号输入端分别连接一个上拉电阻到电源正极,还分别与电源负极构成8K(K=1,2,3,......)对传感器接线端。4. According to claim 1, the serial port connection line management check instruction type 8K sensor 128 groups of home appliance terminal block is characterized in that: 8bit×K parallel input and serial output shift registers are composed of K blocks of 74HC165 cascaded, and they The chip select ends of each chip are all connected to the negative pole of the power supply, and the clock signal input terminals are all connected together to form the clock signal input end of the shift register. The cascaded carry signal input terminal DS of the first block is connected to the positive pole of the power supply, and its The serial signal output terminal Q H is connected to the serial signal input terminal B of the second block, the serial signal output terminal Q H of the second block is connected to the cascade carry signal input terminal DS of the third block, and so on, and the Kth The serial signal output Q H of the -1 block is connected to the cascade carry signal input DS of the K block, and the serial signal output Q H of the K block is used as the serial signal output of the shift register; The 8K parallel signal input ends of the shift register are respectively connected to a pull-up resistor to the positive pole of the power supply, and also form 8K (K=1, 2, 3, . . . ) paired sensor terminals with the negative pole of the power supply. 5.根据权利要求1所述的串行口联络线管理核对指令式8K路传感器128组家电接线座,其特征是:稳压电源电路由电源变压器、二极管桥式整流电路、电容滤波电路以及三端稳压集成电路7806组成,7806的两个输出端分别构成了本装置的电源正极与电源负极。5. According to claim 1, the serial port connection line management checking instruction type 8K road sensor 128 groups of home appliance terminal block is characterized in that: the stabilized power supply circuit is composed of a power transformer, a diode bridge rectifier circuit, a capacitor filter circuit and three The two output terminals of the 7806 respectively constitute the positive pole and negative pole of the power supply of the device. 6.根据权利要求1所述的串行口联络线管理核对指令式8K路传感器128组家电接线座,其特征是:防雷击和浪涌电路由一只熔断器和一个压敏电阻串连组成。6. According to claim 1, the serial port connection line management check command type 8K sensor 128 groups of home appliance terminal block is characterized in that: the lightning protection and surge circuit is connected in series by a fuse and a piezoresistor composition. 7.根据权利要求1所述的串行口联络线管理核对指令式8K路传感器128组家电接线座,其特征是:128组电子开关电路包括128组电子开关电路,各组电子开关电路的结构相同,各自包括1路交流电电子开关电路和1路直流电电子开关电路。7. According to claim 1, the serial port connection line management checking command type 8K sensor 128 groups of household appliance terminal block is characterized in that: 128 groups of electronic switch circuits include 128 groups of electronic switch circuits, and the structure of each group of electronic switch circuits The same, each including 1 AC electronic switch circuit and 1 DC electronic switch circuit. 8.根据权利要求7所述的串行口联络线管理核对指令式8K路传感器128组家电接线座,其特征是:交流电电子开关电路包括:1只NPN三极管、1只PNP三极管、1个基极电阻、1个基极偏置电阻、1个集电极电阻、1个限流用集电极电阻、一只发光二极管和一块固态继电器;其中,基极电阻的一端接NPN三极管的基极,另一端作为该组电子开关电路的控制信号输入端,基极偏置电阻并联在PNP三极管的发射结上,该PNP三极管的发射极接电源正极,其基极与集电极电阻、发光二极管以及NPN三极管的集电极串联,NPN三极管的发射极连接到电源负极,PNP三极管的集电极串联一个限流用集电极电阻连接到固态继电器的控制信号输入端中的正极,固态继电器的控制信号输入端中的负极连接到电源负极;固态继电器的两个输出端构成该交流电电子开关电路的输出端。8. According to claim 7, the serial port connection line management check command type 8K sensor 128 groups of home appliance terminal block is characterized in that: the AC electronic switch circuit includes: 1 NPN triode, 1 PNP triode, 1 base electrode resistor, a base bias resistor, a collector resistor, a collector resistor for current limiting, a light-emitting diode and a solid state relay; wherein, one end of the base resistor is connected to the base of the NPN transistor, and the other end As the control signal input terminal of this group of electronic switching circuits, the base bias resistor is connected in parallel to the emitter junction of the PNP transistor, the emitter of the PNP transistor is connected to the positive pole of the power supply, and the base and collector resistor, the light-emitting diode and the NPN transistor The collectors are connected in series, the emitter of the NPN transistor is connected to the negative pole of the power supply, the collector of the PNP transistor is connected in series with a collector resistor for current limiting, connected to the positive pole of the control signal input terminal of the solid state relay, and the negative pole of the control signal input terminal of the solid state relay is connected To the negative pole of the power supply; the two output ends of the solid state relay constitute the output end of the alternating current electronic switch circuit. 9.根据权利要求7所述的串行口联络线管理核对指令式8K路传感器128组家电接线座,其特征是:直流电子开关电路包括:一只三极管及其基极电阻、一只二极管和一个直流继电器;其中,基极电阻的一端接三极管的基极,另一端作为该组电子开关电路的控制信号输入端,三极管的发射极连接到电源负极,其集电极分别连接到二极管的正极和直流继电器的线圈的一端,二极管的负极与直流继电器的线圈的另一端都连接到电源正极;直流继电器的两对单刀双掷开关的六个接线端构成了该直流电子开关电路的输出端。9. According to claim 7, the serial port connection line management checking command type 8K sensor 128 groups of home appliance terminal block is characterized in that: the DC electronic switch circuit includes: a triode and its base resistance, a diode and A DC relay; wherein, one end of the base resistor is connected to the base of the triode, and the other end is used as the control signal input end of the group of electronic switching circuits, the emitter of the triode is connected to the negative pole of the power supply, and the collector is respectively connected to the positive pole and the One end of the coil of the DC relay, the negative pole of the diode and the other end of the coil of the DC relay are all connected to the positive pole of the power supply; the six terminals of the two pairs of SPDT switches of the DC relay constitute the output end of the DC electronic switch circuit.
CN2010206962888U 2010-12-29 2010-12-29 Serial port tie line management instruction-check-type 8K-channel sensor 128-group home appliance wire holder Expired - Fee Related CN202050399U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111314636A (en) * 2020-01-20 2020-06-19 思特威(上海)电子科技有限公司 CMOS image sensor with improved column data shift reading

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111314636A (en) * 2020-01-20 2020-06-19 思特威(上海)电子科技有限公司 CMOS image sensor with improved column data shift reading
CN111314636B (en) * 2020-01-20 2022-02-08 思特威(上海)电子科技股份有限公司 CMOS image sensor with improved column data shift reading

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