CN202034970U

CN202034970U - Wireless receiver based on chip AT89S52

Info

Publication number: CN202034970U
Application number: CN201120141650XU
Authority: CN
Inventors: 司巧梅; 陈微微; 关洪海; 李树平; 刘志宇
Original assignee: 司巧梅
Priority date: 2011-05-06
Filing date: 2011-05-06
Publication date: 2011-11-09
Anticipated expiration: 2021-05-06

Abstract

Disclosed is a wireless receiver based on a chip AT89S52. Wireless data transmission is a current growing trend. Though researches and uses of the wireless communication technology start early, the wireless application protocol closely related to the wireless communication technology is not mentioned and dose not draw much attention until recent years. The wireless receiver based on the chip AT89S52 comprises a single-chip microcomputer AT89S52 (1). The single-chip microcomputer AT89S52 is connected with an erasable memory 24C128 (2), a wireless receiver F211SP (3), a 128*64 LCD (liquid crystal display) (4) and a group of keys (5). The wireless receiver based on the chip AT89S52 is applicable to wireless receiving.

Description

Based on chip AT89S52 wireless receiver

Technical field:

The utility model relates to a kind of novel communications field, is specifically related to a kind of based on chip AT89S52 wireless receiver.

Background technology:

Wireless data transmission is in the trend of development at present, though the research of right wireless communication technique and use are early, home control network communication protocol tight with it is just to be mentioned by people in recent years and pay close attention to widely.Communications protocol is absolutely necessary.

Summary of the invention:

The purpose of this utility model provides a kind of on the basis of agreement, and various data send with unified format and accept, and make communication module have versatility, have reduced the complexity that communication process is handled respectively for different pieces of information.

Above-mentioned purpose realizes by following technical scheme:

A kind of based on chip AT89S52 wireless receiver, its composition comprises: single chip computer AT 89S52, described single chip computer AT 89S52 connect electric erasable memory 24C128, wireless receiver F211SP, 128 * 64 LCD LCD and one group of button.

Described based on chip AT89S52 wireless receiver, described single chip computer AT 89S52 comprises serial transmitting terminal TXD and serial interface receiving end RXD, described serial transmitting terminal TXD all is connected described wireless receiver F211SP with described serial interface receiving end RXD, described wireless receiver F211SP connects external antenna, described single chip computer AT 89S52 has P0 interface and P2 interface, the P0 interface of described single chip computer AT 89S52 connects LCD, the P2 mouth of described single chip computer AT 89S52 connects described electric erasable memory 24C128, described single chip computer AT 89S52 has P1.0, P1.1, P1.2 and P1.3, described P1.0 all is connected described button with described P1.2 with described P1.3 with described P1.1.

Described based on chip AT89S52 wireless receiver, described chip AT89S52 comprises Wireless Transmitter, and described Wireless Transmitter one end connects described antenna, and the described Wireless Transmitter other end connects single-chip microcomputer.

Beneficial effect:

1. the single chip computer AT 89S52 of the utility model employing combines at a high speed and high density technology and low-power consumption feature, and its inherits and expand the architecture and the command system of single-chip microcomputer MCS-48 single-chip microcomputer.

The single chip computer AT 89S52 that the utility model adopts also can work in low-power consumption mode, can select free time and power-down mode by two kinds of softwares.Under idle pulley, freeze central processor CPU and timer RAM, serial port and interrupt system are kept its function.Under the power-down mode, preserve timer RAM data, clock oscillation stops, and stops other function in the chip simultaneously.

The single chip computer AT 89S52 high reliability that the utility model adopts, volume is little, and is in light weight.

Antijamming capability and low error rate that the utility model adopts; Based on the modulation system of frequency shift keying fsk, adopt the efficient channel coding techniques, improved the ability of anti-bursty interference of data and random disturbances.

The transmission performance that the utility model adopts is good; Under the sighting distance situation, aerial position height〉2 meters, the reliable transmission distance〉800m (error rate BER=10-6/2400 Bit/S).

The interface that the utility model adopts is various, is provided with easy to use.

Description of drawings:

Accompanying drawing 1 is the theory structure schematic diagram of this product.

Accompanying drawing 2 is the encapsulation figure of the AT89S52 of accompanying drawing 1.

Accompanying drawing 3 is the CPU part electrical connection diagram of accompanying drawing 1.

Embodiment:

Embodiment 1:

A kind of based on chip AT89S52 wireless receiver, its composition comprises: single-chip microcomputer 1 model AT89S52, described single chip computer AT 89S52 connect electric erasable memory 2 model 24C128, wireless receiver 3 model F211SP, 128 * 64 LCD LCD4 and one group of button 5.

Embodiment 2:

Embodiment 1 is described based on chip AT89S52 wireless receiver, described single chip computer AT 89S52 comprises serial transmitting terminal TXD and serial interface receiving end RXD, described serial transmitting terminal TXD all is connected described wireless receiver F211SP with described serial interface receiving end RXD, described wireless receiver F211SP connects external antenna, described single chip computer AT 89S52 has P0 interface and P2 interface, the P0 interface of described single chip computer AT 89S52 connects LCD, the P2 mouth of described single chip computer AT 89S52 connects described electric erasable memory 24C128, described single chip computer AT 89S52 has P1.0, P1.1, P1.2 and P1.3, described P1.0 all is connected described button with described P1.2 with described P1.3 with described P1.1.

Embodiment 3:

Embodiment 1 or 2 described based on chip AT89S52 wireless receiver, described chip AT89S52 comprises Wireless Transmitter, and described Wireless Transmitter one end connects described antenna 6, and the described Wireless Transmitter other end connects single-chip microcomputer.

Embodiment 4:

Embodiment 1 is described based on chip AT89S52 wireless receiver, and described chip AT89S52 sends with the reception pin by serial and is connected FC211SP, and described Wireless Transmitter FC211SP one end connects described antenna.Described chip AT89S52 connects display device by the P0 mouth, be used for showing receive data, described chip AT89S52 connects memory device by the P2 mouth, be used for storage receive data.Described chip AT89S52 connects keyboard equipment by the P1 mouth, is used to control wireless receiver.

Embodiment 5:

Above embodiment is described based on chip AT89S52 wireless receiver, described Wireless Transmitter FC211SP wireless transmission micropower wireless data transmission module is the wireless transmission chip of a kind of modulation system based on frequency shift keying fsk of being produced by wireless technology Co., Ltd of Shenzhen Youda, once can transmit the above Frame of 200K byte, be fit to the design and use.

The channel of described Wireless Transmitter FC211SP, interface, data format are set:

1. parameter setting or read:

The user can change or check the serial ports speed in radio station, aerial speed, channel number and address code.

Command frame format is as shown in table 1.

The data frame format of table 1 FC211SP:

The order frame head

Frame length

Command word

Verification and

The command word verification of order frame head frame length and

Order frame head: 55H AAH;

Frame length=command word length+1;

Command word: length is no more than 8 bytes;

Check and (two bytes): frame length+order data 1+ ... + order data n (high-order) preceding;

All command words are hexadecimal;

The data frame format content of table 2 FC211SP.

Channel and frequency:

The channel of table 3 FC211SP and frequency

Channel number	Frequency	Channel number	Frequency
				1	432.8000MHZ	2	432.9000MHZ
3	433.0000MHZ	4	433.1000MHZ
				5	433.2000MHZ	6	433.3000MHZ
7	433.4000MHZ	8	433.5000MHZ

Claims

1. one kind based on chip AT89S52 wireless receiver, its composition comprises: single chip computer AT 89S52 is characterized in that: described single chip computer AT 89S52 connects electric erasable memory 24C128, wireless receiver F211SP, 128 * 64 LCD LCD and one group of button.

2. according to claim 1 based on chip AT89S52 wireless receiver, it is characterized in that: described single chip computer AT 89S52 comprises serial transmitting terminal TXD and serial interface receiving end RXD, described serial transmitting terminal TXD all is connected described wireless receiver F211SP with described serial interface receiving end RXD, described wireless receiver F211SP connects external antenna, described single chip computer AT 89S52 has P0 interface and P2 interface, the P0 interface of described single chip computer AT 89S52 connects LCD, the P2 mouth of described single chip computer AT 89S52 connects described electric erasable memory 24C128, described single chip computer AT 89S52 has P1.0, P1.1, P1.2 and P1.3, described P1.0 all is connected described button with described P1.2 with described P1.3 with described P1.1.

3. according to claim 1 and 2 based on chip AT89S52 wireless receiver, it is characterized in that: described chip AT89S52 comprises Wireless Transmitter, described Wireless Transmitter one end connects described antenna, and the described Wireless Transmitter other end connects single-chip microcomputer.