CN201984819U - Multifunctional vehicle-mounted multimedia system - Google Patents

Abstract

The utility model discloses a multifunctional vehicle-mounted multimedia system, comprising a whole multimedia system body based on an FPGA (field programmable gate array). The whole multimedia system body comprises an FPGA chip, a memory chip, a decoding chip, an encoding chip and the like; the FPGA chip realizes a computer base system, a video decoding module, an MEPG-2 decompression module, a video encoding module and the like; and the working principle of the system is as follows: processing data, DVD video data and reversing video data from a computer are respectively stored by three different frame buffer address spaces, and real-time online switching of three types of data is realized by a key, so that the system resource is multiplexed. In the multifunctional vehicle-mounted multimedia system, multifunctional equipments are integrated, real-time switching among different data resources is realized, and the system can carry out hardware upgrading with the passage of time, so that the investment of consumers is protected. The multimedia system based on the FPGA not only can be applied in automobiles, but also can be applied in the industries related to video processing.

Description

Multifunctional vehicle mounted multimedia system

Technical field

The utility model relates to a kind of in-vehicle multi-media system, particularly a kind of multifunctional vehicle mounted multimedia system.

Background technology

Along with the continuous development of modern information technologies, emerging electronic application---vehicle multimedia system arises at the historic moment, and more and more receives the concern in market.But also all quite simple technology when many these type systematics occur several years ago, as application number is that 200410022860.1 patent of invention discloses a kind of " the wireless folding and unfolding of vehicle mounted multimedia; satnav; wireless communication system all-in-one ", application number is that 200510103422.2 application for a patent for invention discloses a kind of " method of operating of in-vehicle multi-media system and in-vehicle multi-media system ", application number is that 200810161742.7 application for a patent for invention discloses and a kind ofly only uses (or special-purpose) in " in-vehicle information apparatus and the in-vehicle multi-media system " of judging that the road landform is used, especially application number is that 201010195169.9 application for a patent for invention discloses a kind of " based on vehicle-mounted multimedia double-picture display system and the display packing of FPGA ", this patented claim technology can be used for GPS navigation and shows, mutual switching between the different navigation system, but the same screen that only is used for GPS navigation and video entertainment program shows that (annotate: it adopts FPGA master to be stressed that the display system and the display packing of the two pictures of navigation, the purpose that adopts FPGA is to show for the same screen of realizing synthetic and navigation screen and entertainment that two GPS navigation show, and in the purpose method of stating in realization, FPGA realizes specific function as logical design specially, what its framework adopted is the mode of CPU+FPGA, and its synthetic method is that the form of software realizes).

In view of: on the one hand, though in-vehicle multi-media system is of a great variety at present, function is different, but how the good integration of multiple functions such as present vehicle carried video amusement, driver assistance, vehicle-mounted computer is become the more powerful product of function and become present problem demanding prompt solution, the manufacturer of automobile industry is being faced with increasing challenge, the consumer expects that forever their automobile has up-to-date audio frequency and multimedia system, and more intelligent video DAS (Driver Assistant System); On the other hand; because the variation of vehicle-mounted function system; comprise vehicle-mounted computer system; Vehicular media playing system, vehicle-mounted DAS (Driver Assistant System) etc.; the user wishes to carry out quick switching between various function systems according to actual conditions, and multiplex system to greatest extent, thereby is unlikely to take too many space and satisfies to greatest extent and the investment of protection oneself is ready; this just requires the in-vehicle multi-media system in market should have multiple function, and can realize the quick switching between various functions.In a word, multimedia system function ratio in the market is more single, can not realize above-mentioned function fully, and the similar method that can solve corresponding problem is a plurality of independently systems of installing respectively on automobile, to finish function separately.But a plurality of independently systems are installed on automobile, way like this, cost is too high, and environment inside car differs enough installing spaces are provided surely, and influences the aesthetic feeling of environment inside car.But just there has been higher requirement in very fast market: have again now these system integrations are " intelligent multimedia system ", promptly merge the demand of multiple function system, this system can work alone, but all to use the resource that comes from same common platform, so just can provide more accurate information for the driver, help them to make and determine more accurately and provide safer abundanter driving to experience, realize these, just need more powerful high level multimedia computing platform.

Summary of the invention

Technical problem to be solved in the utility model is to provide a kind of multifunctional vehicle mounted multimedia system, the feasible shared resource that can realize function more than at least three kinds, that is: realize sharing of resources such as vehicle-mounted computer, audio-visual video and reversing video, and the fusion by multisystem, and by different frame buffers can be flexibly and fast the real-time online switching of realization different system more than at least three kinds.

The utility model is realized by following approach: this multifunctional vehicle mounted multimedia system, it is characterized in that: the disposal system integral body that comprises FPGA, video decoding chip, video coding chip, the audio coding decoding chip, the DB9 serial line interface, the system configuration chip, the platform configuration chip, the 3G communication chip, described FPGA disposal system integral body, comprise FPGA process chip and DDR-SDRAM pin-saving chip (cache chip), described FPGA process chip is connected with the DDR-SDRAM pin-saving chip by multiport memory controller (MPMC), described FPGA is connected with video decoding chip by DVI IN interface, described FPGA is connected with video encoding process chip by DVI OUT interface, video coding chip links to each other with the LCD liquid crystal display, described FPGA is connected with the audio coding decoding chip by DAI OUT interface, the audio coding decoding chip links to each other with audio output apparatus, described FPGA is connected with the DB9 serial line interface by the UART controller, described FPGA is connected with ACE advanced configuration device by configuration JTEG interface, described ACE advanced configuration device is connected with the CF card with the platform configuration chip respectively by the CF interface, and described FPGA process chip is connected with the 3G communication chip by the UART controller.

The disposal system integral body of described FPGA comprises FPGA process chip, DDR-SDRAM metadata cache chip, video decoding chip, video coding chip, audio coding decoding chip, DB9 serial line interface, system configuration chip, platform configuration chip, 3G communication chip, terminal LCD display screen, audio output apparatus, the solid-state memory CF of system card.Employing is based on the SoPC framework of FPGA, as MCU, realize the shared resource of three kinds of functions with the soft nuclear of system, that is: vehicle-mounted computer, audio-visual video and reversing video, realize the fusion of multisystem, can realize that by different frame buffers the real-time online of three kinds of different systems switches.

Structure of the present utility model can be specially:

Described FPGA is connected with video decoding chip by DVI IN interface, and H.656 the connection standard is.FPGA is connected with video encoding process chip by the DVIOUT interface, and H.656 the connection standard is.Video coding chip output standard or PAL, or SNTC.Video coding chip output type or composite video, or independent vide.

Structure of the present utility model can further be specially:

FPGA in the described multimedia system comprises microprocessor module, on-chip SRAM module, serial ports UART, interruptable controller, button GPIO interface, intra-system bus, bus president's device, system reset module, the reset button that its outer contact pin is outer, system clock module, its external crystal oscillator; Digital video input interface, data enable module, Gamma correction module, go into frame buffer module, multiport memory control module, go out frame buffer module, MEPG-2 decoder module, video output interface, video output interface outputs to video encoder according to configuration, video bus, FLASH controller module, it connects platform configuration chip and IIC controller module.

Principle of work: microprocessor module, on-chip SRAM module, serial ports UART, when system debug and upgrading, use, interruptable controller, button GPIO interface are used for the user and produce interruption by button triggering causing microprocessor module, microprocessor module calls interrupt service routine and selects mode of operation, thereby enters corresponding frame buffer address space; Intra-system bus, bus president's device are used for determining which module to have the bus right to use when a plurality of module application bus right to use; The system reset module provides the global reset signal of all modules in the sheet, and system clock module provides global clock signal in the sheet; The digital video input interface is used for receiving video signals; The data enable module, it mainly carries out the shaping of signal and produces the DE signal, and this module can produce video control signal and (comprise HSysc, VSysc) provide unified interface signal for subsequent module according to user's configuration; The Gamma correction module strengthens the video image of importing; Go into frame buffer module, the video flowing of input is outputed to VFBC interface among the MPMC by the video dma mode, thereby the video data of a frame is input to memory headroom, go the interlacing processing according to the FS field signal simultaneously; The multiport memory control module, the access of control DDR-SDRAM, simultaneously other modules are kept transparent, make other modules can consider the control difference that different storage chips bring, wherein the VFBC interface is a special interface at the 2D data stream in the MPMC module; Go out frame buffer module, the data of a frame are extracted by the VFBC interface, and export (as interlacing output etc.) according to the mode of configuration; The MEPG-2 decoder module carries out the decoding of video and audio frequency to the DVD video flowing of importing, and input reversing video flowing is carried out bypass; Video output interface outputs to video encoder 105 according to configuration, and video bus comprises 24 digital video data-signals and video control signal (HSysc, VSysc and DE); The FLASH controller module connects the platform configuration chip; IIC controller module, its effect are that the coding and decoding video chip is carried out initial configuration.

The digital video input interface receives the H.656 standardized digital signal from video decoding chip 104, also can receive 8 compressed digital video stream signals from DVD, carries out input video stream by software and selects configuration.

Multifunctional vehicle mounted multimedia system implementation method of the present utility model comprises two parts of master routine and interrupt service routine, and wherein master routine may further comprise the steps after beginning:

11, system configuration is from soft, the hardware configuration data of platform configuration FLASH loading reconfigurable system;

22, close interruption, so system initialisation phase forbids interrupting;

33, load operation system loads embedded OS from external solid storage device (as: CF card);

44, device initializeization, initialization clock, serial ports and the parameter that goes out/go into frame buffer module comprise the frame start address, the line number of frame, the columns of frame and row byte number; The parameter of initialization data enable module, comprise end pixel after end pixel before the level, horizontal synchronization pulse width, the level, vertical before end pixel, vertical sync pulse width and vertical end pixel afterwards.If be provided with interlaced scan mode, second vertical preceding end pixel, vertical sync pulse width and vertical back end pixel must be set also.

55, open interruption, allow to accept look-at-me (as: button);

66, detecting key-press status, at this key-press status register three kinds of patterns are arranged, is respectively pattern 0: vehicle-mounted computer, pattern 1: audio-visual broadcast, pattern 2: reversing video.(the system default pattern is a vehicle-mounted computer.)

77, enter the display interface of corresponding modes, the start address according to the corresponding frame buffer of key-press status adjustment comprises: audio-visual video, user interface, reversing video etc.;

Three frames of described step 44 initialization can further specifically be respectively vehicle-mounted computer frame buffer, audio-visual frame of video buffer memory and reversing frame of video buffer memory, and they zero clearings.

Wherein the interruption reset condition program may further comprise the steps after beginning:

111, go into frame buffer and enable, open into frame buffer module;

222, go out frame buffer and enable, be opened to frame buffer module;

333, key-press status is selected corresponding pattern according to key-press status, pattern 0: vehicle-mounted computer, pattern 1: audio-visual broadcast, pattern 2: reversing video;

444, according to corresponding mode switch frame buffer address space, comprising: switch to vehicle-mounted computer frame buffer address space, switch to audio-visual frame of video buffer address space, switch to reversing frame of video buffer address space;

555, select corresponding video input pattern, pattern 1 is the MEPG-2 video flowing, and pattern 2 is standard video stream H.656;

666, select video flowing output, system adopts is standard video stream H.656;

777, data enable, the final switch of whole video passage is finished the shaping of synchronous control signal and is enabled.

Wherein said step 333 comprises computer frame buffer address space (A), audio-visual frame of video buffer address space (B), reversing frame of video buffer address space (C).Go out frame buffer module (15) after the steering order that receives from microprocessor (1), multiport memory controller (14) reads the data of corresponding modes from DDR-SDRAM (103), and exports corresponding data by LCD display (111).Trigger interruptable controller (4) by button and produce look-at-me, enter the interruption reset condition program, change mode state, thus real-time Switch Video data content.

In sum, the utility model has following advantage compared to existing technology: by sharing the frame buffer address space, only need a display screen just can provide a comprehensive information processing platform for the user, can fast obtain different video stream datas neatly by native system, and can not influence the appearance design of whole multimedia system, utilize the able to programme and reconfigurable characteristics of FPGA simultaneously, native system helps the upgrading configuration of hardware, the interface flexible of native system each several part, compatible strong, can be according to the needs of the characteristics and the video flowing IO interface of each interface, adjust the interface parameters and the consensus standard of each several part, to reach the optimal performance of whole multimedia system.

Description of drawings

Fig. 1 is a system block diagram of the present utility model;

Fig. 2 is the functional block diagram of FPGA described in the utility model;

Fig. 3 is the utility model flow chart of steps;

Fig. 4 is the utility model frame memory-mapped synoptic diagram.

Wherein (see Fig. 1, Fig. 2): 1 microprocessor, 2 on-chip SRAM modules, 3 serial ports UART, 4 interruptable controllers, 5 button GPIO interfaces, 6 intra-system bus, 7 bus arbiters, 8 system reset modules, 9 system clock modules, 10 system digits are looked input interface, 11 data enable modules, 12 is the Gamma correction module, and 13 go into frame buffer module, 14 multiport memory control modules, 15 go out frame buffer module, 16 is the MEPG-2 decoder module, 17 video output interfaces, 18 video buss, the 19FLASH controller module, 20 is the IIC controller module, and 101 is FPGA disposal system integral body, and 102 is the FPGA process chip, 103 is DDR-SDRAM pin-saving chip (cache chip), 104 video decoding chips, 105 video coding chips, 106 audio coding decoding chips, 107 is the DB9 serial line interface, 108 system configuration chips, 109 platform configuration chips, 110 is the 3G communication chip, 111 is the LCD liquid crystal display, 112 audio output apparatus, 113 is the CF card, 114 is DVI IN interface, 115 is DVI OUT interface, 116 is the audio frequency IO interface of standard, and 117 is the JTEG interface, and 118 is the CF interface.

Embodiment

Below be a kind of embodiment of the present utility model: with reference to Fig. 1,101 is the disposal system integral body based on FPGA, 102 is the FPGA process chip, 103 is DDR-SDRAM pin-saving chip (cache chip), the 104th, video decoding chip, the 105th, video coding chip, the 106th, the audio coding decoding chip, the 107th, the DB9 serial line interface, 108 is the system configuration chip, 109 is the platform configuration chip, 110 is the 3G communication chip, 111 is the terminal LCD display screen, and 112 is audio output apparatus, and 113 is the solid-state memory CF of system card.114 are video input interface H.656, and H.656 digital video signal that can acceptance criteria is connected with (among Fig. 2) DVI IN module.115 are video output interface H.656, can send the H.656 digital video signal of standard, are connected with (among Fig. 2) DVI OUT module.116 is the audio frequency IO interface of standard, is connected with (among Fig. 2) DAI OUT module.

Each functional module of FPGA in the multimedia system is divided as shown in Figure 2, and 1 is microprocessor module, and 2 is the on-chip SRAM module, and 3 is serial ports UART, uses when system debug and upgrading; 4 is interruptable controller, and 5 is button GPIO interface, and the user triggers 4 by button and causes that 1 produces interruption, and 1 calls interrupt service routine selects mode of operation, thereby enters corresponding frame buffer address space; 6 is intra-system bus, and 7 is bus president device, determines which module to have the bus right to use when a plurality of module application bus right to use; 8 are the system reset module, and 9 is system clock module, and 8 provide the global reset signal of all modules in the sheet, the reset button that its outer contact pin is outer, and 9 provide global clock signal in the sheet, its external crystal oscillator; 10 is the digital video input interface, can receive the H.656 standardized digital signal from video decoding chip 104, also can receive 8 compressed digital video stream signals from DVD, carries out input video stream by software and selects configuration; 11 is the data enable module, and it mainly carries out the shaping of signal and produces the DE signal, and this module can produce video control signal and (comprise HSysc, VSysc) provide unified interface signal for subsequent module according to user's configuration; 12 is the Gamma correction module, and the video image of importing is strengthened; 13 for going into frame buffer module, the video flowing of input outputed to VFBC interface among the MPMC by the video dma mode, thereby the video data of a frame is input to memory headroom, goes the interlacing processing according to the FS field signal simultaneously; 14 is the multiport memory control module, the access of control DDR-SDRAM, simultaneously other modules are kept transparent, make other modules can consider the control difference that different storage chips bring, wherein the VFBC interface is a special interface at the 2D data stream in the MPMC module; 15 for going out frame buffer module, the data of a frame extracted by the VFBC interface, and export (as interlacing output etc.) according to the mode of configuration; 16 is the MEPG-2 decoder module, and the DVD video flowing of importing is carried out the decoding of video and audio frequency, and input reversing video flowing is carried out bypass; 17 is video output interface, and outputing to video encoder 105,18 according to configuration is video bus, comprises 24 digital video data-signals and video control signal (HSysc, VSysc and DE); 19 is the FLASH controller module, connects platform configuration chip 109; 20 is the IIC controller module, and its effect is that the coding and decoding video chip is carried out initial configuration.

It is computer video stream that three video flowings, article one video flowing are arranged during total system work, is produced by microprocessor 1, by the bus interface connection multiport memory controller 14 of special use, thereby enters computer frame buffer space; The second video flowing is audio-visual video flowing, the compressed video data of input is through digital video input interface 8, go into frame buffer module 13, multiport memory controller 14, enter into audio-visual frame of video spatial cache, again through going out frame buffer module 15, MEPG-2 decoder module 16 is by video output interface 17 outputting standards digital video signal H.656; Article three, video flowing is the reversing video flowing, the standard of input is digital video signal H.656, pass through digital video input interface 8, data enable module 9, go into frame buffer module 13, multiport memory controller 14, enter into reversing frame of video spatial cache, again through going out frame buffer module 15, by video output interface 17 outputting standards digital video signal H.656.Article three, the video flowing correspondence three kinds of patterns, can switch in real time by button.

Fig. 3 is the process flow diagram of system, and total system is divided into master routine and interruption reset condition program.Wherein master routine comprises: system configuration 11, close to interrupt 22, load operation system 33, device initializeization 44, open interrupt 55, key-press status 66, display interface 77; Interrupt service routine comprises: go into that frame buffer enables 111, goes out that frame buffer enables 222, key-press status 333, switch frame buffer address space 444, select input pattern 555, select output mode 666, data enable 777.

Fig. 4 is a frame memory-mapped synoptic diagram.A is a computer frame buffer address space, and B is audio-visual frame of video buffer address space, and C is reversing frame of video buffer address space.Go out frame buffer module after the steering order that receives from microprocessor, the multiport memory controller reads the data of corresponding modes from DDR-SDRAM, and exports corresponding data by LCD display.Trigger interruptable controller by button and produce look-at-me, thereby enter the interruption reset condition program, change mode state, thus real-time Switch Video data content.

The utility model all is based on the video compression standard of MEPG-2, can adopt similar method to be generalized to other compression standard and the video compression standard of formulating at present, so what emphasize is compression function.

The utility model all is based on the DDR-SDRAM memory chip, but can adopt similar method to be generalized to other memory chip, and what emphasize is the function of internal memory.

Frame buffer can realize that the real-time online of different system more than at least three kinds switches; The utility model emphasizes that the method that adopts Hardware I P to examine realizes the functions of modules of system on function realizes, software only carries out the switching between system initialization configuration and the function system.

Also can find out the performance example of a kind of creativeness of the present utility model from the following stated: automobile entertainment apparatus is very dull at present, though car ' s style is various, but from economy car to luxurious offroad vehicle, the amusement equipment of automobile the inside are very simple, lag far behind the speed of development of present IT industry.For example, the amusement equipment that are equipped with in the cars on hand, from general single dish CD, to 6 dish DVD, to embedded navigation DVD, all automobile entertainment apparatus all are these several selections, just be that the user has bought an Audi, be fitted on the most luxurious configuration, also have only navigation, DVD to select, under this reality, the user can only be forced to accept dull like this automobile life.Function of the present invention, just in order to solve the user a vast townie problem, powerful high resolution digital liquid crystal screen, cooperate powerful vehicle-mounted computer navigation software, the ability of the panorama enlarged drawing demonstration of complicated viaduct can be provided, with the ability of autonomous route planning, this also is the existing indeterminable at all problem of electronic equipment.In addition, when going out to run into traffic congestion just because of the user, the time of often staying in automobile is very long, one-man always not again in the automobile, so the user can utilize these times to do some things fully, sees a film no matter be, still online speculation in stocks, still play recreation, can the boring once traffic congestion time of play, enjoys real different brand-new in-vehicle information and live.Have, because the utility model helps the upgrading configuration of hardware, cooperate driver assistance software, vehicle-mounted computer can provide a more comfortable driving environment, departs from detection, fatigue driving detection and nobody-is-safe's monitoring etc. as automatic cruising, navigation channel.

It is same as the prior art that the utility model is not stated part.

Claims (7)

1. multifunctional vehicle mounted multimedia system, it is characterized in that: comprise FPGA disposal system integral body (101), video decoding chip (104), video coding chip (105), audio coding decoding chip (106), DB9 serial line interface (107), system configuration chip (108), platform configuration chip (109), 3G communication chip (110), described FPGA disposal system integral body (101) comprises FPGA process chip (102) and DDR-SDRAM metadata cache chip (103), described FPGA process chip is connected with DDR-SDRAM pin-saving chip (103) by multiport memory controller module (14), described FPGA is connected with video decoding chip (104) by DVI IN interface (114), described FPGA is connected with video encoding process chip (105) by DVI OUT interface (115), video coding chip (105) links to each other with LCD liquid crystal display (111), described FPGA is connected with audio coding decoding chip (106) by DAI OUT interface (116), audio coding decoding chip (106) links to each other with audio output apparatus (112), described FPGA is connected with DB9 serial line interface (107) by the UART controller, described FPGA is connected with ACE advanced configuration device (108) by configuration JTEG interface (117), described ACE advanced configuration device (108) is connected with CF card (113) with platform configuration chip (109) respectively by CF interface (118), and described FPGA process chip is connected with 3G communication chip (110) by the UART controller.

2. multifunctional vehicle mounted multimedia system according to claim 1 is characterized in that, described FPGA is connected with video decoding chip (104) by DVI IN interface (114), and H.656 the connection standard is.

3. multifunctional vehicle mounted multimedia system according to claim 1 is characterized in that, described FPGA is connected with video encoding process chip (105) by DVI OUT interface (115), and H.656 the connection standard is.

4. multifunctional vehicle mounted multimedia system according to claim 1 is characterized in that, video coding chip (105) output standard or PAL, or SNTC.

5. multifunctional vehicle mounted multimedia system according to claim 1 is characterized in that, video coding chip (105) output type or composite video, or independent vide.

6. multifunctional vehicle mounted multimedia system according to claim 1 is characterized in that, described FPGA comprises microprocessor module (1), on-chip SRAM module (2), serial ports UART (3), interruptable controller (4), button GPIO interface (5), intra-system bus (6), bus arbiter (7), system reset module (8), the reset button that its outer contact pin is outer, system clock module (9), its external crystal oscillator, system digits video input interface (10), data enable module (11), Gamma correction module (12), go into frame buffer module (13), multiport memory controller module (14) goes out frame buffer module (15), MEPG-2 decoder module (16), video output interface (17), video output interface outputs to video encoder according to configuration, video bus (18), FLASH controller module (19), IIC controller module (20).

7. multifunctional vehicle mounted multimedia system according to claim 6, it is characterized in that, described digital video input interface (10) or reception perhaps receive 8 compressed digital videos stream signals from DVD from the H.656 standardized digital signal of video decoding chip (104).

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