CN201860339U - Bus controlled reset circuit - Google Patents
Bus controlled reset circuit Download PDFInfo
- Publication number
- CN201860339U CN201860339U CN2010206274214U CN201020627421U CN201860339U CN 201860339 U CN201860339 U CN 201860339U CN 2010206274214 U CN2010206274214 U CN 2010206274214U CN 201020627421 U CN201020627421 U CN 201020627421U CN 201860339 U CN201860339 U CN 201860339U
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- CN
- China
- Prior art keywords
- chip
- smbus
- reset
- reset circuit
- expansion
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Abstract
The utility model belongs to the technical field of telecommunication network, and particularly discloses a bus controlled reset circuit, which comprises an I2C/SMBUS (inter-integrated circuit/system management bus) master device, an I2C/SMBUS extended I/O (input/output) chip connected with the I2C/SMBUS master device, and a plurality of reset chips connected with the I2C/SMBUS extended I/O chip. The bus controlled reset circuit is capable of realizing independent resetting of each chip on a single board, while cost is reduced and area of a PCB (printed circuit board) is saved.
Description
Technical field
The utility model relates to the telecommunication network technology field, particularly a kind of reset circuit of total line traffic control.
Background technology
Along with the develop rapidly of modern telecom network, the application of veneer in network more and more widely.The various functions of network are generally carried by different veneers, and each veneer is all most important to the support of network.In network, veneer is generally had safeguard measure, as redundancy backup, reset or the like.Particularly resetting, is requisite measure in the veneer maintenance, has all designed reseting logic in the general veneer treatment system, finishes resetting of veneer by reseting logic.Existing resetting mostly is direct driving (drive one or drive many) or Buffer and waits and realize.All chips can be realized resetting together on the veneer, but can not realize resetting of one chip.And realize that cost is higher.
The utility model content
(1) technical problem that will solve
The technical problems to be solved in the utility model is how to realize resetting separately of chip on the veneer.
(2) technical scheme
For solving the problems of the technologies described above, the utility model provides a kind of reset circuit of total line traffic control, comprising:
I
2The C/SMBUS main equipment is with described I
2The I that the C/SMBUS main equipment connects
2C/SMBUS expansion I/O chip is with described I
2Several chips that are reset that C/SMBUS expansion I/O chip connects.
Wherein, described I
2The C/SMBUS main equipment passes through I
2C bus and I
2C/SMBUS expansion I/O chip connects.
Described I
2The C/SMBUS main equipment is by SMBUS bus and I
2C/SMBUS expansion I/O chip connects.
Described I
2The I/O pin of C/SMBUS expansion I/O chip is connected with the reset pin of the chip that is reset.
The described chip that is reset comprises network card chip, exchange chip, physical layer (PHY) chip and VPN (virtual private network) (Virtual Private Network, VPN) deciphering chip etc.
(3) beneficial effect
Technique scheme has following beneficial effect: the reset circuit of total line traffic control that the utility model provides can be realized resetting separately to each chip on the veneer, and reduced cost, printed circuit board (Printed Circuit Board, area PCB) have been saved.
Description of drawings
Fig. 1 is the reset circuit structural representation of total line traffic control of the utility model embodiment.
Wherein, 1:I
2The C/SMBUS main equipment; 2:I
2C/SMBUS expansion I/O chip; 3: chip is reset.
Embodiment
Below in conjunction with drawings and Examples, embodiment of the present utility model is described in further detail.Following examples are used to illustrate the utility model, but are not used for limiting scope of the present utility model.
As shown in Figure 1, be the circuit diagram of the reset circuit of total line traffic control of the utility model embodiment,
Comprise: I
2C/SMBUS main equipment (Master) 1 passes through I
2C or SMBUS bus and I
2The I that C/SMBUS main equipment 1 connects
2C/SMBUS expansion I/O chip 2, several chips 3 that are reset, its reset pin and I
2The I/O pin of C/SMBUS expansion I/O chip 2 is connected.
Wherein, the chip 3 that is reset can comprise: network card chip, exchange chip, or the like the chip that is reset of any needs.
The operation principle of the reset circuit of total line traffic control that the utility model provides is:
I
2C/SMBUS main equipment 1 passes through I
2C or SMBUS bus are to I
2Register in the C/SMBUS expansion I/O chip 2 is controlled this register controlled I
2The extended pin of C/SMBUS expansion I/O chip 2, on the chip 3 that is reset that needs reset, send signal, make and occur required level (high level or low level) on the reset pin of the chip 3 that is reset, after keeping a period of time (Millisecond), the level of changeabout (low level or high level), thus realize each resetting separately of chip 3 that be reset.
As can be seen from the above embodiments, the reset circuit of total line traffic control that the utility model provides not only can realize the resetting separately of each chip on the veneer, and reduced cost, saved the area of PCB.
The above only is a preferred implementation of the present utility model; should be understood that; for those skilled in the art; under the prerequisite that does not break away from the utility model know-why; can also make some improvement and modification, these improve and modification also should be considered as protection range of the present utility model.
Claims (5)
1. the reset circuit of a total line traffic control is characterized in that, comprising: I
2The C/SMBUS main equipment is with described I
2The I that the C/SMBUS main equipment connects
2C/SMBUS expansion I/O chip is with described I
2Several chips that are reset that C/SMBUS expansion I/O chip connects.
2. the reset circuit of total line traffic control as claimed in claim 1 is characterized in that, described I
2The C/SMBUS main equipment passes through I
2C bus and I
2C/SMBUS expansion I/O chip connects.
3. the reset circuit of total line traffic control as claimed in claim 1 is characterized in that, described I
2The C/SMBUS main equipment is by SMBUS bus and I
2C/SMBUS expansion I/O chip connects.
4. the reset circuit of total line traffic control as claimed in claim 1 is characterized in that, described I
2The I/O pin of C/SMBUS expansion I/O chip is connected with the reset pin of the chip that is reset.
5. the reset circuit of total line traffic control as claimed in claim 1 is characterized in that, the described chip that resets comprises network card chip, exchange chip, PHY chip and VPN deciphering chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010206274214U CN201860339U (en) | 2010-11-24 | 2010-11-24 | Bus controlled reset circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010206274214U CN201860339U (en) | 2010-11-24 | 2010-11-24 | Bus controlled reset circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201860339U true CN201860339U (en) | 2011-06-08 |
Family
ID=44106138
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010206274214U Expired - Fee Related CN201860339U (en) | 2010-11-24 | 2010-11-24 | Bus controlled reset circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201860339U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104850203A (en) * | 2015-06-10 | 2015-08-19 | 联想(北京)有限公司 | Electronic apparatus reset method and electronic apparatus |
-
2010
- 2010-11-24 CN CN2010206274214U patent/CN201860339U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104850203A (en) * | 2015-06-10 | 2015-08-19 | 联想(北京)有限公司 | Electronic apparatus reset method and electronic apparatus |
| CN104850203B (en) * | 2015-06-10 | 2019-02-05 | 联想(北京)有限公司 | A kind of electronic equipment repositioning method and electronic equipment |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110608 Termination date: 20171124 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |