CN201854376U - Main board of 3D (Three Dimensional) video conversion device - Google Patents
Main board of 3D (Three Dimensional) video conversion device Download PDFInfo
- Publication number
- CN201854376U CN201854376U CN2010205800814U CN201020580081U CN201854376U CN 201854376 U CN201854376 U CN 201854376U CN 2010205800814 U CN2010205800814 U CN 2010205800814U CN 201020580081 U CN201020580081 U CN 201020580081U CN 201854376 U CN201854376 U CN 201854376U
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- insert row
- module
- pcb board
- chip microcomputer
- fpga
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Abstract
The utility model discloses a main board of a 3D (Three Dimensional) video conversion device, comprising a PCB (Printed Circuit Board), an FPGA (Field Programmable Gate Array) chip, a single chip microcomputer and the like, wherein a data output power strip and a data input power strip are respectively arrayed in the middle positions of the left and right side edges of the PCB; the FPGA chip is located in the middle position of the lower side edge of the PCB; a main DC-DC (Direct Current-Direct Current) module is located at the upper left corner of the PCB; and a single chip microcomputer clock circuit and the single chip microcomputer are respectively arrayed at the right side of the data output power strip from left to right and located under the main DC-DC module. Through the utility model, the problem that a system is unstable as an FPGA chip circuit and a single chip microcomputer circuit are integrated on one PCB by the main board of the 3D video conversion device to cause mutual interference is better solved.
Description
Technical field
The utility model relates to a kind of 3D video change-over device motherboard, belongs to 3D video change-over device class.
Background technology
3D shows to be that stereo display technique is in recent years along with the formulation of 3D display standard and the issue of HDMI1.4 standard have obtained development at a high speed, the principle that 3D shows is to utilize parallax speed barrier method, the two secondary 2D pictures that will have parallax are delivered to people's right and left eyes respectively, and people's brain synthesizes a secondary three-dimensional drawing by " calculating " with it.The 3D technology is comparatively ripe technically at present, the just full custom chip of the application specific processor of 3D TV, comprise that harmless output digital control chip also emerges, the own product that some strong enterprises have also released to market, but the market manifestation of 3D TV is also bad, cause the reason of this situation to be that on the one hand at present real 3D film source is few, reason on the other hand is the high energy consumption of 3D TV, standard by China's " panel TV efficiency limit value and efficiency grade " is divided, and great majority adopt full custom chip 3D TV all not reach the grade III Standard of the market access at present.In this case, on the one hand for solving the few problem of 3D film source, also be in order to solve the high problem of 3D TV energy consumption of the full custom chip of present employing on the other hand, there is the inventor to propose a kind of 3D TV solution of transition in present stage, Here it is with fpga chip-field programmable gate array as acp chip, by design, FPGA is become satisfy the application specific processor that the 3D video is changed, the 3D converting system need be connected co-ordination with other module could realize that 3D shows, this just needs the CPU device to coordinate to finish this work, for this reason on the basis of acp chip FPGA, the single-chip microcomputer of need arranging in pairs or groups again constitutes the 3D video change-over device together, because all there are each oneself using standard in fpga chip and single-chip microcomputer manufacturer, the system combinations that two kinds of using standards is different are on a motherboard, and are more a lot of greatly than single system's difficulty.For this reason most of application persons all adopt and build the connection co-ordination that CPU is responsible for the 3D conversion equipment on the bases of fpga chip, the problem that such application model exists is that the design work difficulty of fpga chip strengthens, the fpga chip performance demands has also been improved, while is along with the raising of fpga chip performance, Overall Power Consumption also increases substantially, and prior art has further improved necessity for this reason.
Summary of the invention
The purpose that the utility model relates to is to overcome the problem that prior art exists, a kind of 3D video change-over device motherboard promptly is provided, adopt fpga chip as acp chip to solve described 3D video change-over device, supporting independently single-chip microcomputer forms the problem that a kind of 3D video change-over device exists aspect motherboard simultaneously, so that adopt fpga chip is acp chip, simultaneously supporting independently single-chip microcomputer forms the such application model of 3D video change-over device and becomes possibility, is that acp chip is built the development difficulty of 3D video change-over device and the power consumption that reduces the 3D video change-over device to reduce simple employing FPGA.
A kind of 3D video change-over device motherboard that the utility model provides, comprise pcb board, fpga chip, single-chip microcomputer, the FPGA clock circuit, the single-chip microcomputer clock circuit, the one RAM memory, the 2nd RAM memory, the ROM memory, main DC-DC module, RAM memory DC-DC module, data input insert row, data output insert row, power supply input insert row etc., it is characterized in that described data output insert row and data input insert row branch are listed in the place, centre position on the limit, the left and right sides of pcb board, described fpga chip is positioned on the pcb board lower side centre position, described main DC-DC module is positioned at the zone, the upper left corner of pcb board, a described RAM memory and the 2nd RAM memory branch are listed in main DC-DC module right side and are positioned at the fpga chip top, described RAM memory DC-DC module and ROM memory are respectively in the left side of data input insert row from top to bottom, described single-chip microcomputer clock circuit and single-chip microcomputer from left to right are respectively in the right side of data output insert row and are positioned at the lower side of main DC-DC module, described FPGA clock circuit is on the position between fpga chip and the single-chip microcomputer, and described power supply input insert row is positioned at the zone, upper right side of pcb board.
This 3D video change-over device motherboard that the utility model provides, Electro Magnetic Compatibility is better, distributed capacitance and distributed inductance are comparatively reasonable, the RAM memory DC-DC module that particularly will aim at the power supply of RAM memory is separated from main DC-DC module, and the data that are arranged on the right edge of pcb board are imported the left side of insert row, the stability and the functional reliability of 3D video change-over device have greatly been improved, the single-chip microcomputer that to be responsible for connecting co-ordination simultaneously is arranged between data output insert row and the fpga chip, relatively away from being the supporting RAM memory circuitry of fpga chip, solved fpga chip circuit and single chip circuit preferably and be incorporated on the pcb board mutually that mutual interference causes system's problem of unstable, obviously the purpose of this utility model is achieved.
Description of drawings
Accompanying drawing 1 is a kind of 3D video change-over device host board structure schematic diagram of the utility model preferred embodiment.
Among the figure 1 for fpga chip, 2 for single-chip microcomputer, 3 for the FPGA clock circuit, 4 for single-chip microcomputer clock circuit, 501 the one RAM memories, 502 be the 2nd RAM memory, 6 for ROM memory, 7 be main DC-DC module, 8 for RAM memory DC-DC module, 9 for data input insert row, 10 for data output insert row, 11 for power supply input insert row, 12 be that pcb board, 13 is that system debug insert row, 14 is pin " a 1 " identification point.
Embodiment
A kind of 3D video change-over device motherboard that this preferred embodiment provides, comprise pcb board 12, fpga chip 1, single-chip microcomputer 2, FPGA clock circuit 3, single-chip microcomputer clock circuit 4, the one RAM memory 501, the 2nd RAM memory 502, ROM memory 6, main DC-DC module 7, RAM memory DC-DC module 8, data input insert row 9, data output insert row 10, power supply input insert row 11 etc., it is characterized in that described data output insert row 10 and data input insert row were listed in the left side of pcb board 12 in 9 minutes, the place, centre position of right dual-side, described fpga chip 1 is positioned on the pcb board 12 lower side centre positions, described main DC-DC module 7 is positioned at the zone, the upper left corner of pcb board 12, a described RAM memory 501 and the 2nd RAM memory were listed in main DC-DC module 7 right sides in 502 minutes and are positioned at fpga chip 1 top, described RAM memory DC-DC module 8 and ROM memory 6 are respectively in the left side of data input insert row 9 from top to bottom, described single-chip microcomputer clock circuit 4 and single-chip microcomputer 2 from left to right are respectively in the right side of data output insert row 10 and are positioned at the lower side of main DC-DC module 7, described FPGA clock circuit 3 is on the position between fpga chip 1 and the single-chip microcomputer 2, described power supply input insert row 11 is positioned at the zone, upper right side of pcb board 12, in this preferred embodiment, described fpga chip 1 is commercially available XC3S700A, and described single-chip microcomputer is commercially available ATMEGA48V.
As further improvement, on the described pcb board 12 system debug insert row 13 can be set, to make things convenient for the line debugging, described system debug insert row 13 is arranged in this preferred embodiment on the lower right side regional location of pcb board 12, and is less to the general impacts of system like this.
As further improvement, the storing of described fpga chip 1 is positioned on the lower-left side of fpga chip 1 pin " 1 " identification point 14 of fpga chip 1, and the structural wiring of system is comparatively simple like this.
As further improvement, described power supply input insert row 11 has integrated the total line traffic control mouth of I2C and system mode detects mouth.The total line traffic control mouth of I2C is with the MCU communication, transmit some data between some TV plates and the 3D video change-over device, the setting that system mode detects mouthful mainly is a detection system state for convenience, so that control 3D video change-over device of the present utility model in system's operate as normal just just often.
As further improving, integrated power input interface in the described data input insert row 9, on the basis that power supply input insert row 11 is arranged, the purpose of integrating power supply input interface is that the user can select the input mode of external power source in data input insert row 9, to be user-friendly to.
In sum, a kind of 3D video change-over device motherboard of the present utility model, comprise pcb board, fpga chip, single-chip microcomputer etc., its main points are that described data output insert row and data input insert row branch are listed in the place, centre position on the limit, the left and right sides of pcb board, described fpga chip is positioned on the pcb board lower side centre position, described main DC-DC module is positioned at the zone, the upper left corner of pcb board, described single-chip microcomputer clock circuit and single-chip microcomputer from left to right are respectively in the right side of data output insert row and are positioned at the lower side of main DC-DC module, and the motherboard that the utility model has solved the 3D video change-over device preferably is incorporated on the pcb board fpga chip circuit and single chip circuit mutually that mutual interference causes system's problem of unstable.
The above only is an embodiment of the present utility model.But the utility model protection range is not limited thereto.Anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; the variation that can expect easily or replacement; all should be encompassed within the protection range of the present utility model, therefore, protection range of the present utility model should be as the criterion with the protection range of claim.
Claims (5)
1.
A kind of 3D video change-over device motherboard, comprise pcb board, fpga chip, single-chip microcomputer, the FPGA clock circuit, the single-chip microcomputer clock circuit, the one RAM memory, the 2nd RAM memory, the ROM memory, main DC-DC module, RAM memory DC-DC module, data input insert row, data output insert row, power supply input insert row etc., it is characterized in that described data output insert row and data input insert row branch are listed in the place, centre position on the limit, the left and right sides of pcb board, described fpga chip is positioned on the pcb board lower side centre position, described main DC-DC module is positioned at the zone, the upper left corner of pcb board, a described RAM memory and the 2nd RAM memory branch are listed in main DC-DC module right side and are positioned at the fpga chip top, described RAM memory DC-DC module and ROM memory are respectively in the left side of data input insert row from top to bottom, described single-chip microcomputer clock circuit and single-chip microcomputer from left to right are respectively in the right side of data output insert row and are positioned at the lower side of main DC-DC module, described FPGA clock circuit is on the position between fpga chip and the single-chip microcomputer, and described power supply input insert row is positioned at the zone, upper right side of pcb board.
2.
A kind of 3D video change-over device motherboard according to claim 1 is characterized in that being provided with on the described pcb board system debug insert row, and described system debug insert row is arranged on the lower right side regional location of pcb board 12.
3.
A kind of 3D video change-over device motherboard according to claim 1 is characterized in that pin " 1 " identification point of described fpga chip is positioned on the lower-left side of fpga chip.
4.
A kind of 3D video change-over device motherboard according to claim 1 is characterized in that having integrated power input interface in the described data input insert row.
5. a kind of 3D video change-over device motherboard according to claim 1 is characterized in that described power supply input insert row has been integrated the total line traffic control mouth of I2C and system mode detects mouth.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN2010205800814U CN201854376U (en) | 2010-10-28 | 2010-10-28 | Main board of 3D (Three Dimensional) video conversion device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN2010205800814U CN201854376U (en) | 2010-10-28 | 2010-10-28 | Main board of 3D (Three Dimensional) video conversion device |
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CN201854376U true CN201854376U (en) | 2011-06-01 |
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CN2010205800814U Expired - Fee Related CN201854376U (en) | 2010-10-28 | 2010-10-28 | Main board of 3D (Three Dimensional) video conversion device |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102685422A (en) * | 2012-05-03 | 2012-09-19 | 青岛海信电器股份有限公司 | Television terminal with improved power supply and signal connection structure |
-
2010
- 2010-10-28 CN CN2010205800814U patent/CN201854376U/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102685422A (en) * | 2012-05-03 | 2012-09-19 | 青岛海信电器股份有限公司 | Television terminal with improved power supply and signal connection structure |
CN102685422B (en) * | 2012-05-03 | 2014-09-17 | 青岛海信电器股份有限公司 | Television terminal with improved power supply and signal connection structure |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110601 Termination date: 20111028 |