CN201797312U - Network port circuit of Ethernet power supply device - Google Patents

Network port circuit of Ethernet power supply device Download PDF

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Publication number
CN201797312U
CN201797312U CN2010202268110U CN201020226811U CN201797312U CN 201797312 U CN201797312 U CN 201797312U CN 2010202268110 U CN2010202268110 U CN 2010202268110U CN 201020226811 U CN201020226811 U CN 201020226811U CN 201797312 U CN201797312 U CN 201797312U
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China
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supply lines
lines
network port
resistance
network interface
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CN2010202268110U
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Chinese (zh)
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郝振平
郭鑫
张溢强
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New H3C Technologies Co Ltd
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Hangzhou H3C Technologies Co Ltd
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Abstract

The utility model discloses a network port circuit of an Ethernet power supply device (PSE: power sourcing equipment). Two first devices for bleeding current during overvoltage generation are respectively in parallel connection between two ends of resistors and capacitors, which are connected in series and respectively correspond to a center tap of a positive pole power supply line and the center tap of a negative pole power supply line; and a second device for bleeding the current during overvoltage generation is in parallel connection between two ends of the resistor and the capacitor, which are connected in series and shared by non-power supply lines. Therefore, the current on the power supply lines and the non-power supply lines can be bled into the ground when the overvoltage is led into a network port connector and common mode surge is generated on the power supply lines and the non-power supply lines, thereby reducing the possibility of damaging an Ethernet power supply (POE: power over Ethernet) control chip positioned on one side of the network port connector, and further improving the common mode protection level of the network port circuit of the PSE.

Description

The network port circuit of Power over Ethernet equipment
Technical field
The utility model relates to the common mode resist technology, particularly can realize a kind of Power over Ethernet equipment (Power-Sourcing Equipment, network port circuit PSE) of common mode protection.
Background technology
Power over Ethernet is present most popular local area network technology because it is simple, cost is low, extensibility is strong, with characteristics such as IP network can combine well, the application of ethernet technology just strides forward to the public telecommunication network field from Intranet.
Along with the continuous expansion of range of application, the network interface place environment of Ethernet PSE equipment is also more abominable, produces the common mode surge thereby introduce overvoltage at the power supply network interface easily.But only be to realize the common mode protection in the prior art, thereby make the common mode degree of protection lower by isolating transformer is set at network interface.
Specifically, tradition adopts the network port circuit of the PSE of transformer isolation, comprise the Power over Ethernet that is positioned at transformer one side (Power Over Ethernet, POE) control chip and network interface connector and the drive circuit and physics (PHY) chip that are positioned at the transformer opposite side, wherein:
The anodal supply lines centre cap (POS) of POE control chip and negative pole supply lines centre cap (NEG) are connected to the centre cap of corresponding transformer respectively and are driven by one drive circuit, and every POS and every NEG respectively by a road corresponding resistance and capacitances in series to ground, i.e. capacitance-resistance ground connection respectively;
The anodal supply lines differential lines of network interface connector and negative pole supply lines differential lines by corresponding transformer be connected to PHY chip, shared one road resistance of non-supply lines and capacitances in series to ground, be shared capacitance-resistance ground connection.
When above-mentioned PSE network port circuit is worked; provide direct current by the POE control chip to network interface connector; provide ac signal by the PHY chip to network interface; direct current after the stack and ac signal can be carried to the outside by network interface connector; but when network interface connector is introduced overvoltage; and when on supply lines and non-supply lines, producing the common mode surge; though the PHY chip is owing to the protection that is subjected to by transformer isolation to a certain degree; but because the POS and the NEG of POE control chip are positioned at network interface connector one side; thereby easily cause POE control chip damage, thereby make that the common mode degree of protection of network port circuit of PSE is not high.
The utility model content
In view of this, the utility model provides the network port circuit of a kind of Ethernet PSE, can improve the common mode degree of protection.
The network port circuit of a kind of Ethernet PSE that the utility model provides comprises: be positioned at the Power over Ethernet POE control chip and the network interface connector of transformer one side and drive circuit and the phy chip that is positioned at the transformer opposite side, wherein,
The anodal supply lines centre cap of POE control chip and negative pole supply lines centre cap are connected to the centre cap of corresponding transformer respectively, and every anodal supply lines centre cap and negative pole supply lines centre cap respectively by a road corresponding resistance and capacitances in series to ground;
The anodal supply lines differential lines of network interface connector and negative pole supply lines differential lines are connected to phy chip, shared one road resistance of non-supply lines and capacitances in series to ground by corresponding transformer;
Anodal supply lines centre cap and negative pole supply lines centre cap are distinguished the series resistance and the electric capacity two ends of correspondence, be parallel with respectively one can be when overvoltage produces first device of leakage current;
Non-supply lines shared series resistance and electric capacity two ends, be parallel with one can be when overvoltage produces second device of leakage current.
Anodal supply lines centre cap and negative pole supply lines centre cap are one;
Network interface connector and phy chip are one;
And this network interface connector has the centre tapped a pair of anodal supply lines differential lines of corresponding anodal supply lines, the centre tapped anticathode supply lines differential lines of corresponding negative pole supply lines; The non-supply lines of this network interface connector comprises that two pairs of non-supply lines differential lines, every pair of non-supply lines differential lines further are connected to phy chip by corresponding transformer, non-supply lines shared ground connection series resistance and the electric capacity transformer centre cap that is connected non-power supply differential lines correspondence.
Anodal supply lines centre cap and negative pole supply lines centre cap are two;
Network interface connector is two, the respectively corresponding phy chip of each network interface connector;
And each network interface connector has a corresponding centre tapped a pair of anodal supply lines differential lines of anodal supply lines, corresponding centre tapped anticathode supply lines differential lines of negative pole supply lines respectively; The non-supply lines of each network interface connector comprises two pairs of idle lines.
First device and second device are clamper type device.
Described clamper type device is that piezo-resistance or transient voltage suppress diode TVS.
First device is that clamper type device, second device are the switching mode device.
Described clamper type device is that piezo-resistance or TVS, described switching mode device are voltage switch type Transient Suppression Diode TSS or gas discharge tube GDT.
First device and second device are the switching mode device.
Described switching mode device is TSS or GDT.
In the resistance and electric capacity of the series connection of every road, resistance is that 75 ohm, electric capacity are 1 nanofarad.
As seen from the above technical solution, the utility model is distinguished corresponding series resistance and electric capacity two ends at anodal supply lines centre cap and negative pole supply lines centre cap, in parallel respectively one can be when overvoltage produces first device of leakage current; And non-supply lines shared series resistance and electric capacity two ends, in parallel one can be when overvoltage produces second device of leakage current.Like this, just can be when network interface connector be introduced overvoltage and produce the common mode surge on supply lines and non-supply lines, with the current drain on supply lines and the non-supply lines extremely, thereby can reduce the possibility of the POE control chip damage that is positioned at network interface connector one side, and then can improve the common mode degree of protection of the network port circuit of PSE.
Description of drawings
Fig. 1 is the structural representation of gigabit PSE network port circuit among the utility model embodiment one;
Fig. 2 is the structural representation of 100,000,000 PSE network port circuits among the utility model embodiment one;
Fig. 3 is the structural representation of gigabit PSE network port circuit among the utility model embodiment two;
Fig. 4 is the structural representation of 100,000,000 PSE network port circuits among the utility model embodiment two;
Fig. 5 is the structural representation of gigabit PSE network port circuit among the utility model embodiment three;
Fig. 6 is the structural representation of 100,000,000 PSE network port circuits among the utility model embodiment three.
Embodiment
For making the purpose of this utility model, technical scheme and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the utility model is further described.
The utility model is distinguished corresponding series resistance and electric capacity two ends at every POS and every NEG, in parallel respectively one can be when overvoltage produces first device of leakage current; And non-supply lines shared series resistance and electric capacity two ends, in parallel one can be when overvoltage produces second device of leakage current.Like this, just can be when network interface connector be introduced overvoltage and produce the common mode surge on supply lines and non-supply lines, with the current drain on supply lines and the non-supply lines extremely, thereby can reduce the possibility of the POE control chip damage that is positioned at network interface connector one side, and then can improve the common mode degree of protection of the network port circuit of PSE.
In the practical application, gigabit PSE network port circuit and 100,000,000 PSE network port circuits all can adopt the scheme in the utility model; First device for example can be selected for use, and piezo-resistance, transient voltage suppress diode (Transient Voltage Suppression, clamper type device such as TVS), also can select for example voltage switch type Transient Suppression Diode (Thyristor Surge Suppressor for use, TSS), gas discharge tube (Gas Discharge Tube, switching mode device such as GDT); Second device can be selected clamper type device for use, also can select the switching mode device for use.
Below, for some embodiment the technical scheme in the utility model is further specified.
Embodiment one
In the present embodiment, first device and second device are all selected clamper type device for use, can be to a certain extent at supply lines and the non-supply lines overvoltage electric current of releasing.
Fig. 1 is the structural representation of gigabit PSE network port circuit among the utility model embodiment one.As shown in Figure 1, be example with gigabit PSE network port circuit, it comprises a POE control chip and network interface connector that is positioned at transformer one side and a drive circuit and a PHY chip that is positioned at the transformer opposite side, wherein:
POS of POE control chip and NEG are connected to the centre cap of corresponding transformer respectively and are driven by one drive circuit, and every POS and every NEG pass through a road corresponding resistance and capacitances in series respectively to ground, and every POS and every NEG distinguish corresponding series resistance and electric capacity two ends, piezo-resistance RV respectively in parallel;
The a pair of anodal supply lines differential lines of the corresponding POS of network interface connector and the anticathode supply lines differential lines of corresponding NEG are connected to the PHY chip by corresponding transformer, and the two pairs of non-supply lines differential lines also by corresponding transformer be connected to the PHY chip, and shared one road resistance and capacitances in series to ground, non-supply lines the series resistance of shared ground connection be connected the corresponding transformer centre cap that non-power supply differential lines is connected with electric capacity, and shared series resistance and electric capacity two ends piezo-resistance RV in parallel.
Fig. 2 is the structural representation of 100,000,000 PSE network port circuits among the utility model embodiment one.As shown in Figure 2, be example with 100,000,000 PSE network port circuits, it comprises POE control chip and two network interface connectors that are positioned at transformer one side and a drive circuit and two the PHY chips that are positioned at the transformer opposite side, wherein:
Two POS of POE control chip and two NEG are connected to the centre cap of corresponding transformer respectively and are driven by one drive circuit, and every POS and every NEG pass through a road corresponding resistance and capacitances in series respectively to ground, and every POS and every NEG distinguish corresponding series resistance and electric capacity two ends, piezo-resistance RV respectively in parallel;
The a pair of supply lines differential lines of the corresponding respectively POS of each network interface connector and a pair of supply lines differential lines of a corresponding NEG are connected to a PHY chip corresponding with this network interface connector by corresponding transformer; And two network interface connectors the totally four pairs of non-supply lines be idle line, and shared one road resistance and capacitances in series to ground, and altogether four pairs of non-supply lines shared series resistance and electric capacity two ends, piezo-resistance RV in parallel.
Because piezo-resistance is a kind of votage limit type protection device of clamper type, thereby PSE network port circuit as depicted in figs. 1 and 2 can connect when surge occurring by piezo-resistance the overvoltage current drain of POS and NEG to ground, with voltage clamp to a relatively-stationary magnitude of voltage at network interface, thereby realizes the protection to the back level POE control chip of network interface connector; Correspondingly, the overvoltage electric current of non-supply lines also can be released.Certainly, TVS also is a kind of FV of clamper type, and effect is similar with piezo-resistance, thereby the piezo-resistance RV that utilizes TVS to replace among Fig. 1 and Fig. 2 also can produce similar technique effect.
In addition, among Fig. 1 and Fig. 2 in the resistance and electric capacity of the series connection of every road, resistance is preferably 75 ohm, electric capacity and is preferably 1 nanofarad.
Embodiment two
In the present embodiment, first device selects for use clamper type device, second device to select the switching mode device for use, can largely the overvoltage electric current be released at non-supply lines.
Fig. 3 is the structural representation of gigabit PSE network port circuit among the utility model embodiment two.As shown in Figure 3, be example with gigabit PSE network port circuit, it comprises a POE control chip and network interface connector that is positioned at transformer one side and a drive circuit and a PHY chip that is positioned at the transformer opposite side, wherein:
POS of POE control chip and NEG are connected to the centre cap of corresponding transformer respectively and are driven by one drive circuit, and every POS and every NEG pass through a road corresponding resistance and capacitances in series respectively to ground, and every POS and every NEG distinguish corresponding series resistance and electric capacity two ends, piezo-resistance RV respectively in parallel;
The a pair of anodal supply lines differential lines of the corresponding POS of network interface connector and the anticathode supply lines differential lines of corresponding NEG are connected to the PHY chip by corresponding transformer, and the two pairs of non-supply lines differential lines also by corresponding transformer be connected to the PHY chip, and shared one road resistance and capacitances in series to ground, non-supply lines the series resistance of shared ground connection be connected the corresponding transformer centre cap that non-power supply differential lines is connected with electric capacity, and shared series resistance and electric capacity two ends TSS in parallel.
Fig. 4 is the structural representation of 100,000,000 PSE network port circuits among the utility model embodiment two.As shown in Figure 4, be example with 100,000,000 PSE network port circuits, it comprises POE control chip and two network interface connectors that are positioned at transformer one side and a drive circuit and two the PHY chips that are positioned at the transformer opposite side, wherein:
Two POS of POE control chip and two NEG are connected to the centre cap of corresponding transformer respectively and are driven by one drive circuit, and every POS and every NEG pass through a road corresponding resistance and capacitances in series respectively to ground, and every POS and every NEG distinguish corresponding series resistance and electric capacity two ends, piezo-resistance RV respectively in parallel;
The a pair of supply lines differential lines of the corresponding respectively POS of each network interface connector and a pair of supply lines differential lines of a corresponding NEG are connected to a PHY chip corresponding with this network interface connector by corresponding transformer; And two network interface connectors the totally four pairs of non-supply lines be idle line, and shared one road resistance and capacitances in series to ground, and altogether four pairs of non-supply lines shared series resistance and electric capacity two ends, TSS in parallel.
TSS is the FV that utilizes semiconductor technology to make; its operation principle is with different with piezo-resistance; when the overvoltage at TSS pipe two ends surpasses the puncture voltage of TSS pipe; the TSS pipe will be the overvoltage clamper to than on the lower level near 0V of puncture voltage, promptly be similar to short-circuit condition; afterwards; the TSS pipe can continue this short-circuit condition, drops to critical value just can recover open-circuit condition up to the overvoltage electric current that flows through the TSS pipe.That is to say that TSS pipe conducting voltage is lower, conduction impedance is also lower than piezo-resistance, thereby the piezo-resistance that is provided with than the supply lines place, the easier TSS that is provided with at non-supply lines place of overvoltage electric current releases.
Based on above-mentioned characteristic; what present embodiment was main is to test at the centralized procurement of PSE network interface: in the centralized procurement test; requirement is twisted the supply lines of network interface for one with non-supply lines and also is connected high pressure generator; if supply lines is selected the piezo-resistance of operation voltage about 270V for use; then non-supply lines can be selected the TSS pipe about 200V for use; thereby; because TSS pipe conducting voltage is low; and conduction impedance is also lower than piezo-resistance; therefore; twist supply lines and non-supply lines when beating high pressure simultaneously for one; high-tension current is most of can release from the TSS pipe of non-supply lines; the electric current of piezo-resistance RV by supply lines is reduced; the clamp voltage of piezo-resistance RV also can diminish, thus the POE control chip of level behind the catch net opening connector.
Certainly, GDT also has the similar characteristic with TSS, thereby the TSS that utilizes GDT to replace among Fig. 3 and Fig. 4 also can produce the similar techniques effect.
In addition, among Fig. 3 and Fig. 4 in the resistance and electric capacity of the series connection of every road, resistance is preferably 75 ohm, electric capacity and is preferably 1 nanofarad.
Embodiment three
In the present embodiment, first device and second device are all selected the switching mode device for use, can be largely at supply lines and the non-supply lines overvoltage electric current of releasing.
Fig. 5 is the structural representation of gigabit PSE network port circuit among the utility model embodiment three.As shown in Figure 5, be example with gigabit PSE network port circuit, it comprises a POE control chip and network interface connector that is positioned at transformer one side and a drive circuit and a PHY chip that is positioned at the transformer opposite side, wherein:
POS of POE control chip and NEG are connected to the centre cap of corresponding transformer respectively and are driven by one drive circuit, and every POS and every NEG pass through a road corresponding resistance and capacitances in series respectively to ground, and every POS and every NEG distinguish corresponding series resistance and electric capacity two ends, TSS respectively in parallel;
The a pair of anodal supply lines differential lines of the corresponding POS of network interface connector and the anticathode supply lines differential lines of corresponding NEG are connected to the PHY chip by corresponding transformer, and the two pairs of non-supply lines differential lines also by corresponding transformer be connected to the PHY chip, and shared one road resistance and capacitances in series to ground, non-supply lines the series resistance of shared ground connection be connected the corresponding transformer centre cap that non-power supply differential lines is connected with electric capacity, and shared series resistance and electric capacity two ends, TSS in parallel.
Fig. 6 is the structural representation of 100,000,000 PSE network port circuits among the utility model embodiment three.As shown in Figure 6, be example with 100,000,000 PSE network port circuits, it comprises POE control chip and two network interface connectors that are positioned at transformer one side and a drive circuit and two the PHY chips that are positioned at the transformer opposite side, wherein:
Two POS of POE control chip and two NEG are connected to the centre cap of corresponding transformer respectively and are driven by one drive circuit, and every POS and every NEG pass through a road corresponding resistance and capacitances in series respectively to ground, and every POS and every NEG distinguish corresponding series resistance and electric capacity two ends, TSS respectively in parallel;
The a pair of supply lines differential lines of the corresponding respectively POS of each network interface connector and a pair of supply lines differential lines of a corresponding NEG are connected to a PHY chip corresponding with this network interface connector by corresponding transformer; And two network interface connectors the totally four pairs of non-supply lines be idle line, and shared one road resistance and capacitances in series to ground, and altogether four pairs of non-supply lines shared series resistance and electric capacity two ends, TSS in parallel.
Need to prove that because there is the follow current interrupt problem in the TSS pipe, promptly the TSS pipe behind the over-voltage breakdown just recovers open-circuit condition after current value drops to below the critical restoring current, therefore, the normal state current of supply lines should be less than the critical restoring current of TSS pipe.In addition, the TSS that short-circuit condition can occur is not arranged in the circuit of direct current supply usually, but the direct current supply of PSE network port circuit also is different from direct current supply on the ordinary meaning, its direct voltage loads on network interface connector by the POE control chip, even if supply lines is because TSS is short-circuited, and the POE control chip also can cut off supply current automatically, and, after the POE control chip cut off supply current, TSS can return to open-circuit condition.
Certainly, GDT also has the similar characteristic with TSS, thereby the TSS that utilizes GDT to replace among Fig. 5 and Fig. 6 also can produce the similar techniques effect.
In addition, among Fig. 5 and Fig. 6 in the resistance and electric capacity of the series connection of every road, resistance is preferably 75 ohm, electric capacity and is preferably 1 nanofarad.
The above is preferred embodiment of the present utility model only, is not to be used to limit protection range of the present utility model.All within spirit of the present utility model and principle, any modification of being done, be equal to and replace and improvement etc., all should be included within the protection range of the present utility model.

Claims (10)

1. the network port circuit of a Power over Ethernet equipment comprises: be positioned at the Power over Ethernet POE control chip and the network interface connector of transformer one side and drive circuit and the phy chip that is positioned at the transformer opposite side, wherein,
The anodal supply lines centre cap of POE control chip and negative pole supply lines centre cap are connected to the centre cap of corresponding transformer respectively, and every anodal supply lines centre cap and negative pole supply lines centre cap respectively by a road corresponding resistance and capacitances in series to ground;
The anodal supply lines differential lines of network interface connector and negative pole supply lines differential lines are connected to phy chip, shared one road resistance of non-supply lines and capacitances in series to ground by corresponding transformer;
It is characterized in that,
Anodal supply lines centre cap and negative pole supply lines centre cap are distinguished the series resistance and the electric capacity two ends of correspondence, be parallel with respectively one can be when overvoltage produces first device of leakage current;
Non-supply lines shared series resistance and electric capacity two ends, be parallel with one can be when overvoltage produces second device of leakage current.
2. network port circuit as claimed in claim 1 is characterized in that,
Anodal supply lines centre cap and negative pole supply lines centre cap are one;
Network interface connector and phy chip are one;
And this network interface connector has the centre tapped a pair of anodal supply lines differential lines of corresponding anodal supply lines, the centre tapped anticathode supply lines differential lines of corresponding negative pole supply lines; The non-supply lines of this network interface connector comprises that two pairs of non-supply lines differential lines, every pair of non-supply lines differential lines further are connected to phy chip by corresponding transformer, non-supply lines shared ground connection series resistance and the electric capacity transformer centre cap that is connected non-power supply differential lines correspondence.
3. network port circuit as claimed in claim 1 is characterized in that,
Anodal supply lines centre cap and negative pole supply lines centre cap are two;
Network interface connector is two, the respectively corresponding phy chip of each network interface connector;
And each network interface connector has a corresponding centre tapped a pair of anodal supply lines differential lines of anodal supply lines, corresponding centre tapped anticathode supply lines differential lines of negative pole supply lines respectively; The non-supply lines of each network interface connector comprises two pairs of idle lines.
4. as each described network port circuit in the claim 1 to 3, it is characterized in that first device and second device are clamper type device.
5. network port circuit as claimed in claim 4 is characterized in that, described clamper type device is that piezo-resistance or transient voltage suppress diode TVS.
6. as each described network port circuit in the claim 1 to 3, it is characterized in that first device is that clamper type device, second device are the switching mode device.
7. network port circuit as claimed in claim 6 is characterized in that, described clamper type device is that piezo-resistance or TVS, described switching mode device are voltage switch type Transient Suppression Diode TSS or gas discharge tube GDT.
8. as each described network port circuit in the claim 1 to 3, it is characterized in that first device and second device are the switching mode device.
9. network port circuit as claimed in claim 8 is characterized in that, described switching mode device is TSS or GDT.
10. as each described network port circuit in the claim 1 to 3, it is characterized in that in the resistance and electric capacity of the series connection of every road, resistance is that 75 ohm, electric capacity are 1 nanofarad.
CN2010202268110U 2010-06-09 2010-06-09 Network port circuit of Ethernet power supply device Expired - Lifetime CN201797312U (en)

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103138251A (en) * 2011-11-24 2013-06-05 瑞昱半导体股份有限公司 Network communication device with instant energy protective capacity and printed circuit board thereof
CN104201662A (en) * 2014-09-17 2014-12-10 深圳科安达电子科技股份有限公司 System for providing surge energy control for POE (power over Ethernet) Ethernet
CN104934957A (en) * 2015-07-10 2015-09-23 上海斐讯数据通信技术有限公司 POE switch lightning protection circuit
CN106330466A (en) * 2015-07-10 2017-01-11 富士康(昆山)电脑接插件有限公司 Ethernet powered end circuit and RJ45 connector applying same
CN106786433A (en) * 2017-02-16 2017-05-31 深圳市菲菱科思通信技术股份有限公司 The new lightning Protection circuit of PoE electric power systems
CN107040444A (en) * 2015-11-09 2017-08-11 阿自倍尔株式会社 Node apparatus
CN110011290A (en) * 2019-05-14 2019-07-12 罗山县三通达电子科技有限公司 A kind of Ethernet interface anti-surge circuit
CN110521181A (en) * 2017-02-15 2019-11-29 莫列斯有限公司 System and method for beacon
US11639776B2 (en) 2016-02-15 2023-05-02 Molex, Llc Luminaire

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103138251A (en) * 2011-11-24 2013-06-05 瑞昱半导体股份有限公司 Network communication device with instant energy protective capacity and printed circuit board thereof
CN104201662A (en) * 2014-09-17 2014-12-10 深圳科安达电子科技股份有限公司 System for providing surge energy control for POE (power over Ethernet) Ethernet
CN104934957A (en) * 2015-07-10 2015-09-23 上海斐讯数据通信技术有限公司 POE switch lightning protection circuit
CN106330466A (en) * 2015-07-10 2017-01-11 富士康(昆山)电脑接插件有限公司 Ethernet powered end circuit and RJ45 connector applying same
CN106330466B (en) * 2015-07-10 2019-05-17 富士康(昆山)电脑接插件有限公司 Ethernet receiving end circuit and the RJ45 connector for applying it
CN107040444A (en) * 2015-11-09 2017-08-11 阿自倍尔株式会社 Node apparatus
US11639776B2 (en) 2016-02-15 2023-05-02 Molex, Llc Luminaire
CN110521181A (en) * 2017-02-15 2019-11-29 莫列斯有限公司 System and method for beacon
CN106786433A (en) * 2017-02-16 2017-05-31 深圳市菲菱科思通信技术股份有限公司 The new lightning Protection circuit of PoE electric power systems
CN110011290A (en) * 2019-05-14 2019-07-12 罗山县三通达电子科技有限公司 A kind of Ethernet interface anti-surge circuit
CN110011290B (en) * 2019-05-14 2021-10-22 罗山县三通达电子科技有限公司 Ethernet interface anti-surge circuit

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