CN201753063U - Intelligent fault-tolerance fault safety driving board - Google Patents

Intelligent fault-tolerance fault safety driving board Download PDF

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Publication number
CN201753063U
CN201753063U CN2010202835099U CN201020283509U CN201753063U CN 201753063 U CN201753063 U CN 201753063U CN 2010202835099 U CN2010202835099 U CN 2010202835099U CN 201020283509 U CN201020283509 U CN 201020283509U CN 201753063 U CN201753063 U CN 201753063U
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China
Prior art keywords
circuit
fault
fail safe
cpu
tolerance
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Expired - Lifetime
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CN2010202835099U
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Chinese (zh)
Inventor
张卫东
徐美发
王红如
胡博宇
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BEIJING GZXA SYSTEM CONTROL TECHNOLOGY Co Ltd
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BEIJING GZXA SYSTEM CONTROL TECHNOLOGY Co Ltd
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Abstract

The utility model discloses an intelligent fault-tolerance fault safety driving board, which comprises a microcomputer controller, a fault safety power supply and a driving circuit, wherein the microcomputer controller comprises two CPUs which are connected in parallel, the driving circuit comprises a logic circuit, two input ends of the logic circuit are respectively connected with the two CPUs, and output ends are connected with a driving output and indicating circuits. The two CPUs are respectively connected with the fault safety power supply, and the two CPUs are connected in communication manner. The intelligent fault-tolerance fault safety driving board uses double CPUs to commonly control and outputs in closed loop, thereby preventing error output because of mixed wires, well protecting the mixed wires, and achieving the purpose of safety fault guidance.

Description

The intelligent fault-tolerance fail safe drives integrated circuit board
Technical field
The utility model relates to a kind of signal pickup assembly, relates in particular to a kind of intelligent fault-tolerance fail safe and drives integrated circuit board.
Background technology
In recent years, along with the fast development of track traffic, more and more higher to the safety requirements of its control convenience.And along with the significantly raising of train speed, " fault-safety principle " promptly when equipment broke down, equipment can in time be found fault, and a side of failure to the safe side, avoid the generation of dangerous situation, very big variation has also taken place in the notion of such a kind of " fault-safety principle ".In case being the control convenience et out of order, the notion of fault-safety principle of the prior art can cut off the electricity supply by the whole audience, the speed of a motor vehicle is very fast at present, in the very fast speed of a motor vehicle in this case, the whole audience is cut off the electricity supply and certainly will be caused the high speed train sudden stop, so also can cause serious accident.
In the prior art, all cut off the I/O power supply with relay during the control convenience fault, exist like this and cut off insecure hidden danger, secondly there is swinging cross output hidden danger in the control convenience I/O before, be the circuit series-parallel connection make the mistake output safeguard function extremely thin a little less than, in case the circuit swinging cross is exported both dangerously, swinging cross will drive does not answer relay picked up to pick up, control that makes the mistake and startup, if such situation occurs in track switch, will cause track switch rotation, consequence is very serious; If occur in the circuit of railway section signal, the relay of malfunction can be given the information of release-locking device error of transmission, can cause very serious consequence equally.
The utility model content
The purpose of this utility model provides a kind of safe and reliable intelligent fault-tolerance fail safe and drives integrated circuit board.
The purpose of this utility model is achieved through the following technical solutions:
Intelligent fault-tolerance fail safe of the present utility model drives integrated circuit board, comprises microcomputerized controller, fail safe power supply and driving circuit, and described microcomputerized controller comprises the CPU of two parallel connections, and described driving circuit comprises the logical AND circuit;
Two input ends of described logical AND circuit are connected with two CPU respectively, and mouth is connected with driving output and indicating circuit;
Be connected with the retaking of a year or grade circuit respectively between described driving circuit and two CPU;
Described fail safe power supply is connected with described driving circuit.
The technical scheme that provides by above-mentioned the utility model as can be seen, intelligent fault-tolerance fail safe described in the utility model drives integrated circuit board because microcomputerized controller comprises the CPU of two parallel connections, driving circuit comprises the logical AND circuit; Two input ends of logical AND circuit are connected with two CPU respectively, and mouth is connected with driving output and indicating circuit; Be connected with the retaking of a year or grade circuit respectively between driving circuit and two CPU.Adopt the mistake that two CPU control jointly, closed loop output has been avoided causing because of swinging cross to export, swinging cross is had good protective action, reached the purpose of fault-safety principle.
Description of drawings
Fig. 1 is the overall structure scheme drawing that the utility model intelligent fault-tolerance fail safe drives integrated circuit board;
Fig. 2 is the structural representation of driving circuit in the utility model.
The specific embodiment
Intelligent fault-tolerance fail safe of the present utility model drives integrated circuit board, its preferable specific embodiment as shown in Figure 1:
Comprise microcomputerized controller, fail safe power supply and driving circuit, described microcomputerized controller comprises the CPU of two parallel connections, and described driving circuit comprises the logical AND circuit;
Two input ends of described logical AND circuit are connected with two CPU respectively, and mouth is connected with driving output and indicating circuit;
Be connected with the retaking of a year or grade circuit respectively between described driving circuit and two CPU;
Described fail safe power supply is connected with described driving circuit.
Described two CPU are connected respectively with described fail safe power supply.
Described driving output and indicating circuit have separate 16 the tunnel.
Communicate to connect between described two CPU.
As shown in Figure 2, described driving circuit comprises first Drive and Control Circuit and second Drive and Control Circuit;
Described first Drive and Control Circuit comprises first optic coupler, first switching valve and second optic coupler successively from input end to mouth, and its input end is connected with a CPU respectively with mouth;
Described second Drive and Control Circuit comprises the 3rd optic coupler, second switch pipe and the 4th optic coupler successively from input end to mouth, and its input end is connected with the 2nd CPU respectively with mouth;
Be connected with diode between described first switching valve and the second switch pipe;
The emitter-base bandgap grading of described second switch pipe is connected with described driving output and indicating circuit.
Intelligent fault-tolerance fail safe of the present utility model drives integrated circuit board, when breakdown of equipment, need not cut off the I/O power supply by relay, only need can cut off the I/O power supply by the control signal that the two CPU of in-to-in cut off out-put supply, avoid wrong output, reach the purpose of fault-safety principle; Circuit after this improvement simultaneously adopts the mistake that two CPU control jointly, closed loop output has been avoided causing because of swinging cross to export, and swinging cross is had good protective action, has reached the purpose of fault-safety principle.
Below in conjunction with the drawings and specific embodiments the application is described in detail:
Referring to Fig. 1, Fig. 2, intelligent fault-tolerance fail safe drive plate of the present utility model is arranged with safety power supply again, microcomputerized controller ACPU and BCPU, and driving circuit drives output and indicating circuit.
Microcomputerized controller is by ACPU, the two CPU of BCPU constitute, two the common control of CPU one tunnel drive output signal, and ACPU connects the output control signal and the AIN input port signal of AOUT mouth, AOUT is the drive output signal of ACPU, and AIN is the read back waveform of ACPU drive output signal.BCPU connects the output control signal and the BIN incoming signal of BOUT mouth, and BOUT is the drive output signal of BCPU, and BIN is the read back waveform of the drive output signal of BCPU.
The ACPU Drive and Control Circuit is by optic coupler U1, U2, switching valve Q1, and resistance R 1, R2, R3, R7, diode D1 constitutes.When the AOUT mouth is logic level 1, photoelectrical coupler U1 conducting, when the dividing potential drop of setting and current-limiting resistance R2, R3 make the basic emitter voltage of Q1 greater than 0.6V, the Q1 conducting, the U2 conducting, the voltage of diode D1 positive pole deducts the collection emitter-base bandgap grading saturation conduction pressure drop of Q1 for+24V.R3, U2, R7 constitute the retaking of a year or grade circuit that ACPU drives output, and AOUT is that ACPU drives output, and AIN is the driving output retaking of a year or grade of ACPU, and the U2 conducting makes the AIN end be logical one.When the logic level of AOUT changes when becoming logical zero, not conducting of U1, the basic emitter-base bandgap grading of Q1 does not have yet not conducting of pressure drop, also not conducting of U2, AIN becomes logic low 0 by R7 ground connection, and AIN and AOUT have constituted the loop that ACPU drives.
The BCPU Drive and Control Circuit is by optic coupler U3, U4, resistance R 4, R5, R6, R8, and diode D2, switching valve Q2 constitutes.When BOUT is logic high 1, the U3 conducting, if this moment, AOUT also was a logical one, then also conducting of Q2 conducting U4, BIN is connected to+and 5V is a logic high; When BOUT is logic low 0, not conducting of U3, this moment, Q2 ended not conducting no matter AOUT is that high level 1 still is a low level 0, also not conducting of U4, BIN becomes logic low 0 by R8 ground connection.BIN and BOUT have constituted BCPU and have driven the loop of exporting, and have guaranteed correct output.
The driving of ACPU and BCPU output constituted in logic and circuit.After system powers on, ACPU and BCPU carry out self check to driving output and the driving retaking of a year or grade circuit that they control respectively, the errorless back of self check is to the opposite control wave of safety power supply output cycle same phase, safety power supply starts generation+24 power supplys and supplies with driving circuit, ACPU and BCPU carry out the order that upper computer is assigned by serial ports then, output activation bit and retaking of a year or grade activation bit.Have only when ACPU and BCPU export simultaneously and could obtain in logic high level 1 output at drive output DA.All there is not output on all the other situation DA.And light the LED1 indication by the R9 current limliting output of driving is arranged having under the situation of output.
It is perfect that this circuit has structure, control rigorous, stable and reliable operation, fault can in time be found and the advantage of failure to the safe side.
Specific embodiment:
Intelligent fault-tolerance fail safe drive plate is arranged with safety power supply, microcomputerized controller ACPU and BCPU, and driving circuit drives output and indicating circuit.Microcomputerized controller is by ACPU, the two CPU of BCPU constitute, two the common control of CPU one tunnel drive output signal, and ACPU connects the output control signal and the AIN input port signal of AOUT mouth, AOUT is the drive output signal of ACPU, and AIN is the read back waveform of ACPU drive output signal.BCPU connects the output control signal and the BIN incoming signal of BOUT mouth, and BOUT is the drive output signal of BCPU, and BIN is the read back waveform of the drive output signal of BCPU.The ACPU Drive and Control Circuit is by optic coupler U1, U2, switching valve Q1, and resistance R 1, R2, R3, R7, diode D1 constitutes; The BCPU Drive and Control Circuit is by optic coupler U3, U4, resistance R 4, R5, R6, R8, and diode D2, switching valve Q2 constitutes.Wherein U1, U2, U3, U4 select light coupled device TLP521-1GB for use, R1, R4 are 510 ohm of Chip-Rs, R2, R5 are 1K ohm Chip-R, R3, R6 are 8.2K ohm Chip-R, and R7, R8 are 202K ohm Chip-R, and R9 is 10K ohm surface-mount resistor, R10 is 30 ohm of 2W power resistors, Q1, Q2 are KSH3055 low speed NPN switching valve, and D1, D2 are Surface Mount diode M7, and LED1 is the green emitting diode.
The utility model is through test and on probation, and effect is very good, has improved the safety of equipment greatly, well satisfies the requirement of fault-safety principle.
The above; it only is the preferable specific embodiment of the utility model; but protection domain of the present utility model is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; the variation that can expect easily or replacement all should be encompassed within the protection domain of the present utility model.

Claims (5)

1. an intelligent fault-tolerance fail safe drives integrated circuit board, it is characterized in that comprise microcomputerized controller, fail safe power supply and driving circuit, described microcomputerized controller comprises the CPU of two parallel connections, and described driving circuit comprises the logical AND circuit;
Two input ends of described logical AND circuit are connected with two CPU respectively, and mouth is connected with driving output and indicating circuit;
Be connected with the retaking of a year or grade circuit respectively between described driving circuit and two CPU;
Described fail safe power supply is connected with described driving circuit.
2. intelligent fault-tolerance fail safe according to claim 1 drives integrated circuit board, it is characterized in that described two CPU are connected respectively with described fail safe power supply.
3. intelligent fault-tolerance fail safe according to claim 2 drives integrated circuit board, it is characterized in that, described driving output and indicating circuit have separate 16 the tunnel.
4. intelligent fault-tolerance fail safe according to claim 3 drives integrated circuit board, it is characterized in that, communicates to connect between described two CPU.
5. drive integrated circuit board according to each described intelligent fault-tolerance fail safe of claim 1 to 4, it is characterized in that described driving circuit comprises first Drive and Control Circuit and second Drive and Control Circuit;
Described first Drive and Control Circuit comprises first optic coupler, first switching valve and second optic coupler successively from input end to mouth, and its input end is connected with a CPU respectively with mouth;
Described second Drive and Control Circuit comprises the 3rd optic coupler, second switch pipe and the 4th optic coupler successively from input end to mouth, and its input end is connected with the 2nd CPU respectively with mouth;
Be connected with diode between described first switching valve and the second switch pipe;
The emitter-base bandgap grading of described second switch pipe is connected with described driving output and indicating circuit.
CN2010202835099U 2010-08-05 2010-08-05 Intelligent fault-tolerance fault safety driving board Expired - Lifetime CN201753063U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101947963A (en) * 2010-08-05 2011-01-19 北京国正信安系统控制技术有限公司 Intelligent fault-tolerant fail safe driving board card
CN103885853A (en) * 2013-03-01 2014-06-25 上海富欣智能交通控制有限公司 Dual-CPU-based rail transit synchronous data voting system and method
CN106061023A (en) * 2016-07-08 2016-10-26 浙江众合科技股份有限公司 Novel indicating lamp control circuit

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101947963A (en) * 2010-08-05 2011-01-19 北京国正信安系统控制技术有限公司 Intelligent fault-tolerant fail safe driving board card
CN101947963B (en) * 2010-08-05 2013-03-27 北京国正信安系统控制技术有限公司 Intelligent fault-tolerant fail safe driving board card
CN103885853A (en) * 2013-03-01 2014-06-25 上海富欣智能交通控制有限公司 Dual-CPU-based rail transit synchronous data voting system and method
CN103885853B (en) * 2013-03-01 2017-09-29 上海富欣智能交通控制有限公司 Track traffic synchrodata voting system and method based on dual processors
CN106061023A (en) * 2016-07-08 2016-10-26 浙江众合科技股份有限公司 Novel indicating lamp control circuit
CN106061023B (en) * 2016-07-08 2018-05-08 浙江众合科技股份有限公司 New indicating lamp control circuit

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AV01 Patent right actively abandoned

Granted publication date: 20110302

Effective date of abandoning: 20130327

RGAV Abandon patent right to avoid regrant