CN201718002U - Video processor - Google Patents

Video processor Download PDF

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Publication number
CN201718002U
CN201718002U CN 201020258047 CN201020258047U CN201718002U CN 201718002 U CN201718002 U CN 201718002U CN 201020258047 CN201020258047 CN 201020258047 CN 201020258047 U CN201020258047 U CN 201020258047U CN 201718002 U CN201718002 U CN 201718002U
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CN
China
Prior art keywords
video
processor
driver
sdi
receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 201020258047
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Chinese (zh)
Inventor
宁喜峰
吴远清
刘华东
金文东
郑赐强
陈增旺
卢慧娟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xiamen Rgblink Science & Technology Co Ltd
Original Assignee
Xiamen Rgblink Science & Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xiamen Rgblink Science & Technology Co Ltd filed Critical Xiamen Rgblink Science & Technology Co Ltd
Priority to CN 201020258047 priority Critical patent/CN201718002U/en
Application granted granted Critical
Publication of CN201718002U publication Critical patent/CN201718002U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model discloses a video processor, which comprises a first-stage processor for format conversion, as well as at least one video decoder, at least one video ADC (analog to digital converter), at least one video receiver and at least one SDI (serial digital interface) receiver which are connected with the input end of the first-stage processor. The video processor further comprises a second-stage processor for image mosaicking, and a video encoder, a video DAC (digital to analog converter), a video driver, a SDI driver, a Gigabit network driver, an optical fiber driver connected with the output end of the second-stage processor. An output terminal of the first-stage processor is connected with an input end of the second-stage processor. The video processor also comprises a casing, wherein the components are all arranged inside the casing. The video processor can realize input/output of any signals, and has wide application range.

Description

A kind of video processor
Technical field
The utility model belongs to the image/video data processing field, particularly a kind of processor structure that vision signal is handled.
Background technology
Along with traditional CRT monitor and TV are withdrawn from the market gradually, become the main flow display in current demonstration market based on the flat-panel monitor of fixed pixel, comprise LCD (LiquidCrystal Display, liquid crystal), DLP (Digital Light Projector, digital light projection), LCoS (liquid cry stal on silicon, liquid crystal on silicon) and PDP (plasma display panel, Plasmia indicating panel).All these technology all are to create electronic image by different way, but they but have same characteristics: the imaging pixel of fixed matrix, this fixed pixel structures shape the physical resolution of display.
Current in professional audiovisual, radio, TV and film industries, specify the company of associated video, image international standard that 3 normal structures are arranged, be respectively ITU (International Telecommunication Association), SMPTE (Society of Motion Picture and Television Engineers) and VESA (VESA).These normal structures have been finished the fusion of video and image two big series standards substantially, thereby have further quickened video and the fusion of image product on products at different levels.Therefore, can see the interface that has occurred image on the DVD, and occur the interface of video on the computer.The standard difference that the physical interface of these products is different and compatible has brought a lot of obstacles for butt joint and connection between the equipment.
Owing to, brought unlimited opportunity for the birth and the development of video processor as the compatibility of the display and the equipment interconnection of display terminal.
In addition, along with professional audiovisual, radio, TV and film industries constantly promote for the requirement that signal monitoring, mux--out signal exhibits and multisystem light of stage merge, brought opportunity in the processing of many pictures, large-screen splicing, the development of looking technology such as audio sync, nonstandard video scaling, edge fusion, image co-registration for video processor.
The design people promptly is based on above-mentioned analysis, and the conventional video processing device is studied improvement, and this case produces thus.
The utility model content
Main purpose of the present utility model is to provide a kind of video processor, and it can realize the arbitrary signal I/O, and is applied widely.
In order to reach above-mentioned purpose, solution of the present utility model is:
A kind of video processor, comprise first order processor that can carry out format conversion and at least one Video Decoder that is connected with its input respectively, at least one video AD C, at least one video receiver, at least one SDI receiver, also comprise a second level processor that can carry out the image splicing and a video encoder that is connected with its output respectively, a video DAC, a video driver, a SDI driver, a kilomega network driver, an optical fiber driver, the output of first order processor connects the input of second level processor; Also comprise housing, aforementioned each parts all are located in this housing.
Also be provided with at least one radiator fan in the above-mentioned housing.
The outer surface of above-mentioned housing also offers some louvres.
After adopting such scheme, the utility model connects polytype receiver at the input of processor, optionally polytype signal is handled, roughly contained vision signal commonly used now, and at the also exportable polytype signal of output, the user can select suitable interface according to actual needs, thereby has expanded the scope of application of the present utility model, and versatility is wider.
Description of drawings
Fig. 1 is an integrated stand composition of the present utility model;
Fig. 2 is the structural representation of the utility model installing radiator fan;
Fig. 3 is the front view of Fig. 2.
Embodiment
Below with reference to accompanying drawing, concrete structure of the present utility model and function are elaborated.
With reference to shown in Figure 1, the utility model provides a kind of video processor, comprise housing 5 and be located at a first order processor 1, a second level processor 2, at least one Video Decoder 31, at least one video AD C32, at least one video receiver 33, at least one SDI receiver 34, a video encoder 41, a video DAC42, a video driver 43, a SDI driver 44, a kilomega network driver 45 and an optical fiber driver 46 in the housing 5, introduce respectively below.
In the present embodiment, Video Decoder 31, video AD C32, video receiver 33, SDI receiver 34 are equipped with two-way, input with first order processor 1 is connected respectively, wherein, each Video Decoder 31 all can be imported 3 tunnel composite video signals, video AD C32 is in order to input high standard sorting amount YpbPr signal and simulation VGA signal, and video receiver 33 is in order to input digit DVI signal and digital HDMI signal, and 34 of SDI receivers can be imported 2 way word sdi signals simultaneously.
The output of first order processor 1 connects the input of second level processor 2, will aforementioned various types of input signals carry out deinterlacing, motion compensation, noise reduction, format conversion, the processing of many pictures after, send in the second level processor 2.
Second level processor 2 is used for input signal is carried out processing such as image zoom, rotation and splicing, sends into video encoder 41, video DAC42, video driver 43, SDI driver 44, kilomega network driver 45 and optical fiber driver 46 then as required.
The input of video encoder 41 connects the output of second level processor 2, its exportable 3 tunnel composite video signals, video DAC42 is in order to output simulation VGA signal, video driver 43 is in order to export digital DVI signal or digital HDMI signal, SDI driver 44 is used to export the two-way sdi signal, kilomega network driver 45 is in order to output two-way network signal (CAT5), can be connected with extraneous category-5 cable, 46 of optical fiber drivers can transmit in order to the optical fiber that carries out signal in order to output two-way fiber-optic signal (FIBER).
By above-mentioned explanation, range of application of the present utility model as can be known is extremely wide, can satisfy the needs of different occasions, different medium, can input signal be converted to required output signal according to different needs, and market prospects are wide.
Below will summarize to characteristics of the present utility model:
(1) supports the arbitrary signal input, and can be exchanged into arbitrary signal output;
(2) interlace signal motion compensation self-adaptive processing is eliminated the sawtooth effect in slow motion and the rapid image, improves video effect;
(3) noise reduction and the bad effect of compiling are eliminated;
(4) stepless zooming disposal ability realizes the processing and the demonstration of various non-standard display screens;
(5) jumbotron spliced image splicing treatment technology;
(6) image co-registration supports the non-volume of live video to handle, and supports bright key and chroma key;
(7) support audio-visual synchronization to switch;
(8) support the special-purpose TSL agreement of broadcasting and TV;
(9) support DMX512 control, the slitless connection light of stage is used.
In addition, stable in order to ensure system works, also can in housing 5, be equiped with at least one radiator fan 6, with reference to figure 2 and (only showing the back cover portion of housing 5 among the figure) shown in Figure 3, present embodiment is to be provided with three radiator fans 5 in housing 5 successively, and offer some louvres 7 at the outer surface of housing 5, be convenient to distributing of heat.
Above embodiment only is explanation technological thought of the present utility model; can not limit protection range of the present utility model with this; every according to the technological thought that the utility model proposes, any change of being done on the technical scheme basis all falls within the utility model protection range.

Claims (3)

1. video processor, it is characterized in that: comprise first order processor that can carry out format conversion and at least one Video Decoder that is connected with its input respectively, at least one video AD C, at least one video receiver, at least one SDI receiver, also comprise a second level processor that can carry out the image splicing and a video encoder that is connected with its output respectively, a video DAC, a video driver, a SDI driver, a kilomega network driver, an optical fiber driver, the output of first order processor connects the input of second level processor; Also comprise housing, aforementioned each parts all are located in this housing.
2. a kind of video processor as claimed in claim 1 is characterized in that: also be provided with at least one radiator fan in the described housing.
3. a kind of video processor as claimed in claim 1 is characterized in that: the outer surface of described housing also offers some louvres.
CN 201020258047 2010-07-09 2010-07-09 Video processor Expired - Fee Related CN201718002U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201020258047 CN201718002U (en) 2010-07-09 2010-07-09 Video processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201020258047 CN201718002U (en) 2010-07-09 2010-07-09 Video processor

Publications (1)

Publication Number Publication Date
CN201718002U true CN201718002U (en) 2011-01-19

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201020258047 Expired - Fee Related CN201718002U (en) 2010-07-09 2010-07-09 Video processor

Country Status (1)

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CN (1) CN201718002U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112153335A (en) * 2020-09-21 2020-12-29 深圳创维-Rgb电子有限公司 Broadcast television monitor and control method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112153335A (en) * 2020-09-21 2020-12-29 深圳创维-Rgb电子有限公司 Broadcast television monitor and control method

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Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20110119

Termination date: 20130709