CN201699747U - Synchronous communication server - Google Patents
Synchronous communication server Download PDFInfo
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- CN201699747U CN201699747U CN2010202599876U CN201020259987U CN201699747U CN 201699747 U CN201699747 U CN 201699747U CN 2010202599876 U CN2010202599876 U CN 2010202599876U CN 201020259987 U CN201020259987 U CN 201020259987U CN 201699747 U CN201699747 U CN 201699747U
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Abstract
The utility model discloses a synchronous communication server comprising an inserted communication processor which contains an embedded core, and a system interface unit which is connected to the embedded core, a communication treatment module and a fast Ethernet controller; wherein a crystal oscillator, a reset circuit, a clock circuit and a background debugging model debugging port circuit are in external connection to the embedded core, a flash memory and a synchronous dynamic random memory distribution being connected to the embedded core through a bus, an Ethernet interface circuit and the fast Ethernet controller being connected to each other, high-grade data link path control interface circuit and a general asynchronous transmit-receive interface circuit being connected to the communication treatment module. The synchronous communication server access serial data into internet flexibly, fast, in real time and reliably.
Description
Technical field
The utility model relates to a kind of device with serial data equipment access the Internet, specifically is a kind of synchronous serial interface communication server that can realize that HDLC or UART protocol data and IP/TCP/UDP protocol data change mutually.
Background technology
In traditional serial device, HDLC (High-Level Data Link Control) or UART (universal asynchronous receiving-transmitting) are the communication protocol of using always.Along with popularizing of IP-based the Internet, these equipment need be inserted the Internet with convenient transmission and processing.Existing cut-in method mainly contains two kinds: the one, insert the plug-in card of a special use on computers, and another kind is based on the external protocol converter of ARM and Linux.First kind of mode need be equipped with special-purpose computer, is not suitable for the access of large number quipments; The second way is short of to some extent at aspects such as real-time, reliability, a large amount of high-speed data processing, and is comprehensive inadequately to the ICP/IP protocol support; Do not have the Remote Dynamic configuration feature simultaneously, can not realize user-friendly dynamic-configuration operation.
The utility model content
Technical problem to be solved in the utility model provides a kind of synchronous serial interface communication server, and it can be with serial data flexibly, fast, in real time, insert in the Internet reliably.
For addressing the above problem, the synchronous serial interface communication server that the utility model is designed mainly is made up of power supply, the embedded communication processor that links to each other with power supply, crystal oscillator, flash memory, synchronous DRAM, digital reset circuit, clock circuit, background debug pattern debug port circuit, High-Level Data Link Control interface circuit, universal asynchronous receiving-transmitting interface circuit and ethernet interface circuit; Above-mentioned embedded communication processor comprises embedded kernel and the system interface unit that links to each other with embedded kernel, Communications Processor Module and fast Ethernet controller; Crystal oscillator, reset circuit, clock circuit and background debug pattern debug port circuit are connected on outward on the embedded kernel, flash memory then distributes with synchronous DRAM and links to each other with embedded kernel by bus, ethernet interface circuit is connected with fast Ethernet controller, and High-Level Data Link Control interface circuit and universal asynchronous receiving-transmitting interface circuit are connected on the Communications Processor Module.
In the such scheme, the Communications Processor Module of described embedded communication processor includes Serial Management Controller and serial communication controller, universal asynchronous receiving-transmitting interface circuit and Serial Management Controller with link to each other, the High-Level Data Link Control interface circuit links to each other with serial communication controller through a level shifting circuit.
In the such scheme, the number of described serial communication controller is 4.
In the such scheme, described crystal oscillator is active crystal oscillator.
In the such scheme, described power supply is+DC power supply of 5V.
The utility model compared with prior art can make a plurality of serial devices insert the Internet fast, in real time, reliably, and real-time and good stability have been realized the mutual conversion of URAT or HDLC agreement and ICP/IP protocol; Can dispose and monitoring serial communication parameter by dynamic real-time simultaneously, in time understand communication conditions.For various serial devices provide access, monitoring means effectively.
Description of drawings
Fig. 1 is the principle schematic of a kind of preferred embodiment of the utility model.
Embodiment
The principle schematic of a kind of synchronous serial interface communication server of the utility model as shown in Figure 1, its hardware components mainly is made up of power supply, the embedded communication processor that links to each other with power supply, crystal oscillator, flash memory, synchronous DRAM, digital reset circuit, clock circuit, background debug pattern debug port circuit, High-Level Data Link Control interface circuit, universal asynchronous receiving-transmitting interface circuit and ethernet interface circuit.The embedded communication processor is the core processor of system, comprises 4 major parts such as embedded kernel, system interface unit SIU, Communications Processor Module CPM, fast Ethernet controller FEC.System interface unit, Communications Processor Module and fast Ethernet controller link to each other with the embedded kernel of embedded PowerPC respectively.Communications Processor Module includes 1 Serial Management Controller and 4 serial communication controllers.In the utility model preferred embodiment, the embedded communication processor is MPC860T.The software systems that are stored in the embedded communication processor mainly are made of 3 parts: VxWorks system, synchronous serial interface communication server plate level support package BSP and application, configurator.Realize that under the support of hardware system the HDLC or the serial data of UART form and the data of TCP/IP form change mutually; Can also realize simultaneously the messaging parameter of dynamic remote configuration serial ports.
Power supply of the present utility model comprises+5V and+DC power supply of 3.3V.The 5V DC circuit directly adopts external D.C. regulated power supply to obtain, and 3.3V then carries out DC-DC by 5V and converts.In our design, adopt linear LDO (low-drop) voltage stabilizing circuit of TPS75233, its maximum current is 2A.Crystal oscillator, clock circuit, reset circuit background debug pattern debug port circuit are connected on outward on the embedded kernel of embedded communication processor.The utility model preferred embodiment is selected the active crystal oscillator of 10MHz for use.Clock circuit is used to handle the active crystal oscillator of 10MHz, and arrives 50MHz by the inner PLL frequency multiplication of embedded communication processor.Reset circuit adopts MAX811 chip and LXTH125 chip, is used to the hand-reset of the system that realizes and automatically resets.In the process of electrification reset and hardware reset, if/RSTCONF is low, then from data wire D[0:15] sampling hardware reset word, if instead be high, then the internal default value is got in the hardware reset word select.Background debug pattern debug port circuit is the accurate background debug Mode B of 10 a pin marks DM interface, and the background debug pattern of embedded communication processor provides the serial communication port of a full duplex for the development support logic of outside developing instrument and CPU core.Flash memory FLASH is as operating system VxWorks and application storage district, be a kind of can be online erasable, the memory that the power down data are not lost.Have characteristics such as low-power consumption, big capacity.The speed of service of synchronous DRAM SDRAM is greatly faster than flash memory, and unit are memory capacity is big and relative low price, but the power down data will lose, it is mainly as program running space, data field and stack area.Flash memory distributes with synchronous DRAM and links to each other with embedded kernel by bus.In the utility model preferred embodiment, flash memory adopts TE28F320C3BA, and synchronous DRAM is then formed 32 by two HY57V281620HCT and is data-bus width.
Ethernet interface circuit mainly is made up of mac controller and physical layer interface PHY two parts, and ethernet interface circuit is connected with fast Ethernet controller.MPC860T carries the 100M fast Ethernet controller, and the outside connects the LXT972A access network based on ethernet.The ethernet controller that MPC860T carries can provide the access of 10M/100M Ethernet under the half-or full-duplex pattern.Universal asynchronous receiving-transmitting interface circuit and Serial Management Controller with link to each other, the High-Level Data Link Control interface circuit links to each other with serial communication controller through a level shifting circuit.The universal asynchronous receiving-transmitting interface circuit is used to provide 1 universal asynchronous receiving-transmitting UART protocol interface, and can be used as the serial debugging access that also can be used as universal asynchronous receiving-transmitting UART protocol data.The High-Level Data Link Control interface circuit then is used to provide 4 and expand to High-Level Data Link Control HDLC protocol interface more than 4, inserts to realize High-Level Data Link Control HDLC protocol data.
The operation principle of this synchronous serial interface communication server that is made of above-mentioned hardware and software part is divided into three parts: system start-up, data protocol format conversion and dynamic-configuration monitoring.
1) system's guiding starts: the communication server powers up, operation romInit carries out the initial words of minimum system, then with operating system nucleus and application copy in SDRAM, then move the initialization (mainly finishing) that OS carries out hardware by BSP, make each port in running order, guide at last run application (data transaction application program and dynamic-configuration monitoring program).
2) data protocol format conversion: application program FreeWindComm is based on multitask, and each task is finished an independently function, is used for being responsible for the network port, High-Level Data Link Control HDLC and universal asynchronous receiving-transmitting UART serial port respectively.Their receive data that HDLC or UART come, and send to data processing server with TCP or UDP form after converting thereof into the IP form; Or reception sends to the serial port of appointment from the TCP or the UDP message of communication service with HDLC or UART form through the conversion back.
3) dynamic-configuration monitoring: dynamic-configuration monitoring program HostServerConfig is with C/S model work, and a part runs on the communication server, and a part runs on the configuration server, and they are communicated by letter by Socket.The user can come the messaging parameter of 5 serial ports on the dynamic-configuration communication server by the program on the configuration server: clock selecting, baud rate, communication pattern etc.
Use the HDLC or the serial device of UART agreement and the serial ports of the communication server to be connected, serial data sends to the serial port of the communication server, receives data by corresponding task, converts the TCP/IP form then to and sends to data processing centre; Or data processing centre sends data to the communication server with the TCP/IP form, converts HDLC or UART form then to and the port by appointment sends to corresponding apparatus.Configuration server can be served the messaging parameter of each serial ports by client close friend's configuration interface Remote Dynamic configuration communication, and itself and corresponding apparatus operating state are mated.
The synchronous serial interface communication server design implementation that the utility model proposes, made full use of the advantage of embedded communication processor MPC860T and VxWorks system, have excellent real-time, reliability, can provide the Internet of HDLC or UART equipment to insert simultaneously; Can realize the Remote Dynamic configuration by the Internet simultaneously.System has independence preferably, disposes and implements conveniently.
Claims (5)
1. the synchronous serial interface communication server is characterized in that: mainly be made up of power supply, the embedded communication processor that links to each other with power supply, crystal oscillator, flash memory, synchronous DRAM, digital reset circuit, clock circuit, background debug pattern debug port circuit, High-Level Data Link Control interface circuit, universal asynchronous receiving-transmitting interface circuit and ethernet interface circuit; Above-mentioned embedded communication processor comprises embedded kernel and the system interface unit that links to each other with embedded kernel, Communications Processor Module and fast Ethernet controller; Crystal oscillator, reset circuit, clock circuit and background debug pattern debug port circuit are connected on outward on the embedded kernel of built-in PC, flash memory then distributes with synchronous DRAM and links to each other with embedded kernel by bus, ethernet interface circuit is connected with fast Ethernet controller, and High-Level Data Link Control interface circuit and universal asynchronous receiving-transmitting interface circuit are connected on the Communications Processor Module.
2. the synchronous serial interface communication server according to claim 1, it is characterized in that: the Communications Processor Module of described embedded communication processor includes Serial Management Controller and serial communication controller, universal asynchronous receiving-transmitting interface circuit and Serial Management Controller with link to each other, the High-Level Data Link Control interface circuit links to each other with serial communication controller through a level shifting circuit.
3. the synchronous serial interface communication server according to claim 2 is characterized in that: the number of described serial communication controller is 4.
4. the synchronous serial interface communication server according to claim 1 is characterized in that: described crystal oscillator is active crystal oscillator.
5. the synchronous serial interface communication server according to claim 1 is characterized in that: described power supply is included as+and the DC power supply of 5V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010202599876U CN201699747U (en) | 2010-07-14 | 2010-07-14 | Synchronous communication server |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2010202599876U CN201699747U (en) | 2010-07-14 | 2010-07-14 | Synchronous communication server |
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| CN201699747U true CN201699747U (en) | 2011-01-05 |
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| CN2010202599876U Expired - Fee Related CN201699747U (en) | 2010-07-14 | 2010-07-14 | Synchronous communication server |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106416196A (en) * | 2015-09-24 | 2017-02-15 | 广东欧珀移动通信有限公司 | Mobile terminal, power adapter and updating method thereof |
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2010
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106416196A (en) * | 2015-09-24 | 2017-02-15 | 广东欧珀移动通信有限公司 | Mobile terminal, power adapter and updating method thereof |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110105 Termination date: 20110714 |