CN201662562U - Ultrasonic fault detector - Google Patents
Ultrasonic fault detector Download PDFInfo
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- CN201662562U CN201662562U CN2010201134369U CN201020113436U CN201662562U CN 201662562 U CN201662562 U CN 201662562U CN 2010201134369 U CN2010201134369 U CN 2010201134369U CN 201020113436 U CN201020113436 U CN 201020113436U CN 201662562 U CN201662562 U CN 201662562U
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Abstract
The utility model discloses an ultrasonic fault detector comprising more than two probes, a power supply intelligent control system, a CPU control system, a DSP data process and USB output control circuit, and an analog signal acquisition and analog-to-digital conversion circuit, wherein the CPU control system consists of a CPLD and FPGA program control circuit and an FLAASH internal storage and SDRAM storage circuit. The ultrasonic fault detector can obviously improve the flaw detection efficiency and reduce the detection cost.
Description
Technical field
The utility model relates to a kind of industrial nondestructive testing device, relates in particular to a kind of ultra-sonic defect detector.
Background technology
At present, the scene flaw detection workload of Important Project such as large ship manufacturing, bridge and Construction of Steel Structure is more and more, and because by condition restriction such as the structure of flaw detection workpiece, shapes, ultra-sonic defect detector more than 90% needs manually to detect to finish, current manual portable ultra-sonic defect detector all is to have only a probe in work in the section at the same time, the efficient that UT (Ultrasonic Testing) detects can't be greatly improved, thereby influences whole engineering manufacturing schedule.Therefore for the scene flaw detection engineering of big workload, need increase substantially carrying out flaw detection efficient, to satisfy the whole production progress.Improve detection speed if desired, can only a plurality of flaw detection personnel dispose many ultra-sonic defect detectors and detect simultaneously, can't adapt to and improve carrying out flaw detection efficient and reduce the requirement that detects cost.
The utility model content
The technical problems to be solved in the utility model provides a kind of ultra-sonic defect detector that can significantly improve carrying out flaw detection efficient, reduce the detection cost.
In order to solve the problems of the technologies described above, the utility model ultra-sonic defect detector comprises probe, power supply smart control system, system control cpu, DSP data processing and USB output control circuit and collection of simulant signal and analog to digital conversion circuit more than two,
Described power supply smart control system is connected with analog to digital conversion circuit with system control cpu, DSP data processing and USB output control circuit and collection of simulant signal, is used for carrying out bus-powered to system control cpu, DSP data processing and USB output control circuit and collection of simulant signal and analog to digital conversion circuit;
Described collection of simulant signal is connected with probe, DSP data processing and USB output control circuit, system control cpu with analog to digital conversion circuit, is used for the signal of acquisition probe, and will transfer to DSP data processing and USB output control circuit after the conversion of signals;
Described DSP data processing is connected with analog to digital conversion circuit, system control cpu with collection of simulant signal with the USB output control circuit, be used for receiving and handling waveform and data-signal, and with its output demonstration, described system control cpu is used for this waveform of buffer memory and data-signal.
Described system control cpu comprises CPLD and FPGA sequence circuit, FLASH storage inside and SDRAM memory circuit.
Described CPLD and FPGA sequence circuit are read and write control to FLASH storage inside and SDRAM memory circuit.
The waveform of described output is cut apart demonstration on the TFT display.
When the described waveform of cutting apart demonstration is defective waveform, there is independent gate that this is cut apart the defective waveform difference alarm logging of demonstration.
Described probe is when detecting a flaw simultaneously more than two, and there are 32 independent defects detecting technology passages this defectoscope inside, preserves the non-destructive testing standard and the comparing data of different flaw detection workpiece respectively.
The utility model ultra-sonic defect detector can significantly improve the detection efficiency of on-the-spot ultra-sonic defect detector, and whole carrying out flaw detection efficient is obviously improved.In addition, the utility model volume small and exquisite (165*150*35mm), (1.5kg) in light weight, and carry at the scene of being convenient to, and preserve continuously more than data 3000 width of cloth, and stream time reaches 8 hours.
Description of drawings
Below in conjunction with the drawings and specific embodiments the utility model is described in further detail.
Fig. 1 is the schematic block circuit diagram of the utility model ultra-sonic defect detector.
Embodiment
As shown in Figure 1, the utility model ultra-sonic defect detector, comprise more than two and pop one's head in 1, power supply smart control system 2, system control cpu 3, DSP data processing and USB output control circuit 4, and collection of simulant signal and analog to digital conversion circuit 5, this system control cpu 3 comprises CPLD (CPLD) and FPGA (field programmable gate array) sequence circuit 6, FLASH storage inside and SDRAM (synchronous DRAM) memory circuit 7,6 pairs of FLASH storage inside of this CPLD and FPGA sequence circuit and SDRAM memory circuit 7 are read and write control.
Power supply smart control system 2 is connected with analog to digital conversion circuit 5 with system control cpu 3, DSP data processing and USB output control circuit 4 and collection of simulant signal, is used for carrying out bus-powered to system control cpu 3, DSP data processing and USB output control circuit 4 and collection of simulant signal and analog to digital conversion circuit 5.
Collection of simulant signal is connected with USB output control circuit 4, system control cpu 3 with probe 1, DSP data processing with analog to digital conversion circuit 5, is used for the signal of acquisition probe 1, and will transfers to DSP data processing and USB output control circuit 4 after the conversion of signals.
The DSP data processing is connected with analog to digital conversion circuit 5, system control cpu 3 with collection of simulant signal with USB output control circuit 4, be used for receiving and handling waveform and data-signal, and will on the TFT display, cut apart demonstration after this waveform and the data output, when the waveform of cutting apart demonstration is defective waveform, there is independent gate that this is cut apart the defective waveform difference alarm logging of demonstration.System control cpu 3 is used for this waveform of buffer memory and data-signal.
In an embodiment of the present utility model, design two collection of simulant signal and the analog to digital conversion circuit 5 that can work simultaneously and switch, the flaw detection personnel are that single channel work or two-way are worked simultaneously by software and interface control decision.When two of needs probe 1 is worked simultaneously, switch to two-way work, the input operation respectively of the defects detecting technology of two probes 1, the collection waveform of two probes 1 and data are cut apart simultaneously and are presented on the 640*480TFT display.When two probes were detected a flaw simultaneously, defectoscope inside can extend to 32 independent defects detecting technology passages, preserved the non-destructive testing standard and the comparing data of different flaw detection workpiece respectively.
The utility model ultra-sonic defect detector can not only normally detect by a probe, and can also detect simultaneously at one time by two or more probes, is equivalent to a plurality of flaw detection personnel and works simultaneously with many instruments, and whole carrying out flaw detection efficient is significantly improved.In addition, the utility model ultra-sonic defect detector, carry lightly, volume is small and exquisite, can realize that large tracts of land, the quick UT (Ultrasonic Testing) in high efficiency scene detect, rechargeable battery satisfies work in continuous 8 hours, demonstration independently detect a flaw waveform and data are cut apart in the ac power supply non-stop run, the on-the-spot defective waveform of preserving, print flaw detection form and waveform by terminal devices such as computing machines, realize the computing machine aftertreatment that UT (Ultrasonic Testing) detects.
Below only expressed embodiment of the present utility model, it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to the utility model patent scope.Should be pointed out that for the person of ordinary skill of the art under the prerequisite that does not break away from the utility model design, can also make some distortion and improvement, these all belong to protection domain of the present utility model.Therefore, the protection domain of the utility model patent should be as the criterion with claims.
Claims (6)
1. ultra-sonic defect detector, it is characterized in that, comprise probe (1), power supply smart control system (2), system control cpu (3), DSP data processing and USB output control circuit (4) and collection of simulant signal and analog to digital conversion circuit (5) more than two;
Described power supply smart control system (2) is connected with analog to digital conversion circuit (5) with system control cpu (3), DSP data processing and USB output control circuit (4) and collection of simulant signal respectively, is used for carrying out bus-powered to system control cpu (3), DSP data processing and USB output control circuit (4) and collection of simulant signal and analog to digital conversion circuit (5);
Described collection of simulant signal is connected with USB output control circuit (4), system control cpu (3) with probe (1), DSP data processing respectively with analog to digital conversion circuit (5), the signal that is used for acquisition probe (1), and will transfer to DSP data processing and USB output control circuit (4) after the conversion of signals;
Described DSP data processing is connected with analog to digital conversion circuit (5), system control cpu (3) with collection of simulant signal respectively with USB output control circuit (4), be used for receiving and handling waveform and data-signal, and with its output demonstration, described system control cpu (3) is used for this waveform of buffer memory and data-signal.
2. ultra-sonic defect detector according to claim 1 is characterized in that, described system control cpu (3) comprises CPLD and FPGA sequence circuit (6), FLASH storage inside and SDRAM memory circuit (7).
3. ultra-sonic defect detector according to claim 2 is characterized in that, described CPLD and FPGA sequence circuit are read and write control to FLASH storage inside and SDRAM memory circuit.
4. ultra-sonic defect detector according to claim 1 is characterized in that the waveform of described output is cut apart demonstration on the TFT display.
5. ultra-sonic defect detector according to claim 4 is characterized in that, when the described waveform of cutting apart demonstration is defective waveform, has independent gate that this is cut apart the defective waveform difference alarm logging of demonstration.
6. according to each described ultra-sonic defect detector in the claim 1 to 5, it is characterized in that, described probe is when detecting a flaw simultaneously more than two, and there are 32 independent defects detecting technology passages this defectoscope inside, preserves the non-destructive testing standard and the comparing data of different flaw detection workpiece respectively.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN2010201134369U CN201662562U (en) | 2010-02-11 | 2010-02-11 | Ultrasonic fault detector |
Applications Claiming Priority (1)
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CN2010201134369U CN201662562U (en) | 2010-02-11 | 2010-02-11 | Ultrasonic fault detector |
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CN2010201134369U Expired - Fee Related CN201662562U (en) | 2010-02-11 | 2010-02-11 | Ultrasonic fault detector |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104931591A (en) * | 2015-06-12 | 2015-09-23 | 汕头市超声仪器研究所有限公司 | Method improving real-time display speed of A scanning waveform of flaw detector |
CN105092715A (en) * | 2015-07-29 | 2015-11-25 | 武汉大学 | Ultrasonic flaw detection data acquisition device and method based on digital IO |
CN105403165A (en) * | 2015-11-15 | 2016-03-16 | 魏姚毛 | Ship crack detection apparatus |
-
2010
- 2010-02-11 CN CN2010201134369U patent/CN201662562U/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104931591A (en) * | 2015-06-12 | 2015-09-23 | 汕头市超声仪器研究所有限公司 | Method improving real-time display speed of A scanning waveform of flaw detector |
CN104931591B (en) * | 2015-06-12 | 2017-08-25 | 汕头市超声仪器研究所有限公司 | A kind of method that lifting defectoscope A sweeps the real-time display speed of waveform |
CN105092715A (en) * | 2015-07-29 | 2015-11-25 | 武汉大学 | Ultrasonic flaw detection data acquisition device and method based on digital IO |
CN105403165A (en) * | 2015-11-15 | 2016-03-16 | 魏姚毛 | Ship crack detection apparatus |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20101201 Termination date: 20110211 |